Index of /~tb-builder/tor-browser-build/git_clones/llvm-project/llvm/test/CodeGen/Thumb

[ICO]NameLast modifiedSizeDescription
[PARENTDIR]Parent Directory  -  
[ ]2007-01-31-RegInfoAssert.ll2025-07-15 07:15 358  
[ ]2007-02-02-JoinIntervalsCrash.ll2025-07-15 07:15 590  
[ ]2007-05-05-InvalidPushPop.ll2025-07-15 07:15 1.5K 
[ ]2009-06-18-ThumbCommuteMul.ll2025-07-15 07:15 184  
[ ]2009-07-20-TwoAddrBug.ll2025-07-15 07:15 295  
[ ]2009-07-27-PEIAssert.ll2025-07-15 07:15 655  
[ ]2009-08-12-ConstIslandAssert.ll2025-07-15 07:15 48K 
[ ]2009-08-12-RegInfoAssert.ll2025-07-15 07:15 1.6K 
[ ]2009-08-20-ISelBug.ll2025-07-15 07:15 3.1K 
[ ]2009-12-17-pre-regalloc-taildup.ll2025-07-15 07:15 3.9K 
[ ]2010-06-18-SibCallCrash.ll2025-07-15 07:15 201  
[ ]2010-07-01-FuncAlign.ll2025-07-15 07:15 179  
[ ]2010-07-15-debugOrdering.ll2025-07-15 07:15 14K 
[ ]2011-05-11-DAGLegalizer.ll2025-07-15 07:15 2.4K 
[ ]2011-06-16-NoGPRs.ll2025-07-15 07:15 916  
[ ]2011-EpilogueBug.ll2025-07-15 07:15 609  
[ ]2012-04-26-M0ISelBug.ll2025-07-15 07:15 387  
[ ]2014-06-10-thumb1-ldst-opt-bug.ll2025-07-15 07:15 441  
[ ]DbgValueOtherTargets.test2025-07-15 07:15 137  
[ ]PR17309.ll2025-07-15 07:15 2.0K 
[ ]PR35481.ll2025-07-15 07:15 1.8K 
[ ]PR36658.mir2025-07-15 07:15 12K 
[ ]addr-modes.ll2025-07-15 07:15 1.4K 
[ ]and_neg.ll2025-07-15 07:15 430  
[ ]arm_q15_to_q31.ll2025-07-15 07:15 38K 
[ ]asmprinter-bug.ll2025-07-15 07:15 14K 
[ ]barrier.ll2025-07-15 07:15 391  
[ ]bic_imm.ll2025-07-15 07:15 3.0K 
[ ]branch-to-return.ll2025-07-15 07:15 2.6K 
[ ]branchless-cmp.ll2025-07-15 07:15 2.8K 
[ ]callee_save.ll2025-07-15 07:15 11K 
[ ]cmp-add-fold.ll2025-07-15 07:15 1.4K 
[ ]cmp-and-fold.ll2025-07-15 07:15 4.6K 
[ ]cmp-fold.ll2025-07-15 07:15 1.9K 
[ ]constants.ll2025-07-15 07:15 1.0K 
[ ]consthoist-few-dependents.ll2025-07-15 07:15 5.2K 
[ ]consthoist-imm8-costs-1.ll2025-07-15 07:15 1.2K 
[ ]consthoist-physical-addr.ll2025-07-15 07:15 2.5K 
[ ]copy_thumb.ll2025-07-15 07:15 1.4K 
[ ]cortex-m0-unaligned-access.ll2025-07-15 07:15 393  
[ ]dyn-stackalloc.ll2025-07-15 07:15 2.4K 
[ ]emergency-spill-slot.ll2025-07-15 07:15 17K 
[ ]fastcc.ll2025-07-15 07:15 1.4K 
[ ]fpconv.ll2025-07-15 07:15 1.1K 
[ ]fpow.ll2025-07-15 07:15 277  
[ ]frame-access.ll2025-07-15 07:15 16K 
[ ]frame-chain-reserved-fp.ll2025-07-15 07:15 2.0K 
[ ]frame-chain.ll2025-07-15 07:15 8.9K 
[ ]frame_thumb.ll2025-07-15 07:15 227  
[ ]high-reg-clobber.mir2025-07-15 07:15 2.3K 
[ ]i8-phi-ext.ll2025-07-15 07:15 580  
[ ]iabs-vector.ll2025-07-15 07:15 737  
[ ]iabs.ll2025-07-15 07:15 1.5K 
[ ]inline-asm-i-constraint-i1.ll2025-07-15 07:15 377  
[ ]inlineasm-imm-thumb.ll2025-07-15 07:15 1.3K 
[ ]inlineasm-thumb.ll2025-07-15 07:15 560  
[ ]ispositive.ll2025-07-15 07:15 664  
[ ]large-fn-switch.ll2025-07-15 07:15 17K 
[ ]large-stack.ll2025-07-15 07:15 3.5K 
[ ]ldm-merge-call.ll2025-07-15 07:15 1.2K 
[ ]ldm-merge-struct.ll2025-07-15 07:15 662  
[ ]ldm-stm-base-materialization-thumb2.ll2025-07-15 07:15 3.6K 
[ ]ldm-stm-base-materialization.ll2025-07-15 07:15 3.6K 
[ ]ldm-stm-postinc.ll2025-07-15 07:15 3.4K 
[ ]ldr_ext.ll2025-07-15 07:15 1.0K 
[ ]ldr_frame.ll2025-07-15 07:15 806  
[ ]lit.local.cfg2025-07-15 07:15 67  
[ ]litpoolremat.ll2025-07-15 07:15 814  
[ ]long-setcc.ll2025-07-15 07:15 436  
[ ]long.ll2025-07-15 07:15 5.1K 
[ ]long_shift.ll2025-07-15 07:15 559  
[ ]machine-cse-deadreg.mir2025-07-15 07:15 2.8K 
[ ]machine-cse-physreg.mir2025-07-15 07:15 840  
[ ]mature-mc-support.ll2025-07-15 07:15 404  
[ ]mul.ll2025-07-15 07:15 459  
[ ]mvn.ll2025-07-15 07:15 5.6K 
[ ]opt-phis.mir2025-07-15 07:15 1.1K 
[ ]optionaldef-scheduling.ll2025-07-15 07:15 1.8K 
[ ]peephole-cmp.mir2025-07-15 07:15 8.8K 
[ ]peephole-mi.mir2025-07-15 07:15 16K 
[ ]pop.ll2025-07-15 07:15 365  
[ ]pr35836.ll2025-07-15 07:15 1.7K 
[ ]pr35836_2.ll2025-07-15 07:15 1.9K 
[ ]pr42760.ll2025-07-15 07:15 1.8K 
[ ]push.ll2025-07-15 07:15 257  
[ ]ragreedy-implicit-def.ll2025-07-15 07:15 3.4K 
[ ]returnaddress.ll2025-07-15 07:15 13K 
[ ]rev.ll2025-07-15 07:15 2.1K 
[ ]scheduler-clone-cpsr-def.ll2025-07-15 07:15 1.3K 
[ ]scmp.ll2025-07-15 07:15 4.2K 
[ ]segmented-stacks-dynamic.ll2025-07-15 07:15 1.9K 
[ ]segmented-stacks.ll2025-07-15 07:15 8.3K 
[ ]select.ll2025-07-15 07:15 2.2K 
[ ]shift-and.ll2025-07-15 07:15 5.5K 
[ ]sjljehprepare-lower-vector.ll2025-07-15 07:15 560  
[ ]smul_fix.ll2025-07-15 07:15 7.7K 
[ ]smul_fix_sat.ll2025-07-15 07:15 17K 
[ ]srem-seteq-illegal-types.ll2025-07-15 07:15 4.1K 
[ ]stack-access.ll2025-07-15 07:15 3.5K 
[ ]stack-coloring-without-frame-ptr.ll2025-07-15 07:15 885  
[ ]stack-frame.ll2025-07-15 07:15 179  
[ ]stack-guard-xo.ll2025-07-15 07:15 9.5K 
[ ]stack-mis-alignment.ll2025-07-15 07:15 528  
[ ]stack_guard_remat.ll2025-07-15 07:15 2.5K 
[ ]stm-deprecated.ll2025-07-15 07:15 2.5K 
[ ]stm-merge.ll2025-07-15 07:15 1.6K 
[ ]stm-scavenging.ll2025-07-15 07:15 1.6K 
[ ]tbb-reuse.mir2025-07-15 07:15 5.2K 
[ ]thumb-execute-only-long-calls.ll2025-07-15 07:15 1.0K 
[ ]thumb-imm.ll2025-07-15 07:15 153  
[ ]thumb-ldm.ll2025-07-15 07:15 1.6K 
[ ]thumb-shrink-wrapping.ll2025-07-15 07:15 54K 
[ ]thumb1-cmp.ll2025-07-15 07:15 1.8K 
[ ]trap.ll2025-07-15 07:15 216  
[ ]triple.ll2025-07-15 07:15 98  
[ ]tst_teq.ll2025-07-15 07:15 449  
[ ]ucmp.ll2025-07-15 07:15 4.2K 
[ ]umul_fix.ll2025-07-15 07:15 8.7K 
[ ]umul_fix_sat.ll2025-07-15 07:15 13K 
[ ]umulo-32-legalisation-lowering.ll2025-07-15 07:15 1.2K 
[ ]umulo-128-legalisation-lowering.ll2025-07-15 07:15 8.1K 
[ ]unord.ll2025-07-15 07:15 483  
[ ]urem-seteq-illegal-types.ll2025-07-15 07:15 4.9K 
[ ]uxth.ll2025-07-15 07:15 3.8K 
[ ]vargs.ll2025-07-15 07:15 1.7K 
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