Index of /~tb-builder/tor-browser-build/git_clones/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel

[ICO]NameLast modifiedSizeDescription
[PARENTDIR]Parent Directory  -  
[ ]add.v2i16.ll2025-07-15 07:15 24K 
[ ]add.vni16.ll2025-07-15 07:15 39K 
[ ]add_shl.ll2025-07-15 07:15 4.8K 
[ ]addo.ll2025-07-15 07:15 40K 
[ ]addsubu64.ll2025-07-15 07:15 3.6K 
[ ]amdgpu-irtranslator.ll2025-07-15 07:15 419  
[ ]amdgpu-prelegalizer-combiner-crash.mir2025-07-15 07:15 1.0K 
[ ]and.ll2025-07-15 07:15 40K 
[ ]andn2.i1.ll2025-07-15 07:15 6.1K 
[ ]andn2.ll2025-07-15 07:15 40K 
[ ]artifact-combiner-anyext.mir2025-07-15 07:15 2.5K 
[ ]artifact-combiner-asserts.ll2025-07-15 07:15 1.5K 
[ ]artifact-combiner-build-vector.mir2025-07-15 07:15 11K 
[ ]artifact-combiner-concat-vectors.mir2025-07-15 07:15 2.3K 
[ ]artifact-combiner-cse-leaves-dead-cast.mir2025-07-15 07:15 6.5K 
[ ]artifact-combiner-extract.mir2025-07-15 07:15 15K 
[ ]artifact-combiner-sext.mir2025-07-15 07:15 4.3K 
[ ]artifact-combiner-trunc.mir2025-07-15 07:15 6.0K 
[ ]artifact-combiner-unmerge-values.mir2025-07-15 07:15 85K 
[ ]artifact-combiner-zext.mir2025-07-15 07:15 12K 
[ ]ashr.ll2025-07-15 07:15 73K 
[ ]assert-align.ll2025-07-15 07:15 2.3K 
[ ]atomic_load_flat.ll2025-07-15 07:15 10K 
[ ]atomic_load_global.ll2025-07-15 07:15 24K 
[ ]atomic_load_local.ll2025-07-15 07:15 5.2K 
[ ]atomic_load_local_2.ll2025-07-15 07:15 18K 
[ ]atomic_optimizations_mul_one.ll2025-07-15 07:15 29K 
[ ]atomic_store_local.ll2025-07-15 07:15 3.4K 
[ ]atomicrmw_fmax.ll2025-07-15 07:15 91K 
[ ]atomicrmw_fmin.ll2025-07-15 07:15 91K 
[ ]atomicrmw_udec_wrap.ll2025-07-15 07:15 137K 
[ ]atomicrmw_uinc_wrap.ll2025-07-15 07:15 170K 
[ ]bitcast_38_i16.ll2025-07-15 07:15 3.5K 
[ ]bool-legalization.ll2025-07-15 07:15 5.7K 
[ ]br-constant-invalid-sgpr-copy.ll2025-07-15 07:15 4.1K 
[ ]bswap.ll2025-07-15 07:15 24K 
[ ]buffer-atomic-fadd.f32-no-rtn.ll2025-07-15 07:15 29K 
[ ]buffer-atomic-fadd.f32-rtn.ll2025-07-15 07:15 32K 
[ ]buffer-atomic-fadd.f64.ll2025-07-15 07:15 32K 
[ ]buffer-atomic-fadd.v2f16-no-rtn.ll2025-07-15 07:15 20K 
[ ]buffer-atomic-fadd.v2f16-rtn.ll2025-07-15 07:15 14K 
[ ]buffer-load-store-pointers.ll2025-07-15 07:15 20K 
[ ]buffer-schedule.ll2025-07-15 07:15 2.3K 
[ ]bug-legalization-artifact-combiner-dead-def.ll2025-07-15 07:15 1.0K 
[ ]bug-legalization-artifact-combiner-dead-def.mir2025-07-15 07:15 5.1K 
[ ]bug_shuffle_vector_to_scalar.ll2025-07-15 07:15 1.7K 
[ ]call-outgoing-stack-args.ll2025-07-15 07:15 23K 
[ ]clamp-fmed3-const-combine.ll2025-07-15 07:15 7.9K 
[ ]clamp-minmax-const-combine.ll2025-07-15 07:15 16K 
[ ]combine-add-nullptr.mir2025-07-15 07:15 2.6K 
[ ]combine-add-to-ptradd.mir2025-07-15 07:15 6.1K 
[ ]combine-amdgpu-cvt-f32-ubyte.mir2025-07-15 07:15 18K 
[ ]combine-ashr-narrow.mir2025-07-15 07:15 6.7K 
[ ]combine-ext-legalizer.mir2025-07-15 07:15 2.6K 
[ ]combine-extract-vector-load.mir2025-07-15 07:15 1.8K 
[ ]combine-fabs-fneg.mir2025-07-15 07:15 2.9K 
[ ]combine-fcanonicalize.mir2025-07-15 07:15 14K 
[ ]combine-fdiv-sqrt-to-rsq.mir2025-07-15 07:15 18K 
[ ]combine-fma-add-ext-fma.ll2025-07-15 07:15 24K 
[ ]combine-fma-add-ext-mul.ll2025-07-15 07:15 7.2K 
[ ]combine-fma-add-fma-mul.ll2025-07-15 07:15 53K 
[ ]combine-fma-add-mul-post-legalize.mir2025-07-15 07:15 188K 
[ ]combine-fma-add-mul-pre-legalize.mir2025-07-15 07:15 173K 
[ ]combine-fma-add-mul.ll2025-07-15 07:15 41K 
[ ]combine-fma-sub-ext-mul.ll2025-07-15 07:15 4.8K 
[ ]combine-fma-sub-ext-neg-mul.ll2025-07-15 07:15 10K 
[ ]combine-fma-sub-mul.ll2025-07-15 07:15 42K 
[ ]combine-fma-sub-neg-mul.ll2025-07-15 07:15 16K 
[ ]combine-fma-unmerge-values.mir2025-07-15 07:15 18K 
[ ]combine-fold-binop-into-select.mir2025-07-15 07:15 56K 
[ ]combine-foldable-fneg.mir2025-07-15 07:15 28K 
[ ]combine-fpneg-one-fneg.mir2025-07-15 07:15 6.0K 
[ ]combine-fsh.mir2025-07-15 07:15 7.8K 
[ ]combine-fsub-fneg.mir2025-07-15 07:15 13K 
[ ]combine-itofp.mir2025-07-15 07:15 9.1K 
[ ]combine-lshr-narrow.mir2025-07-15 07:15 6.3K 
[ ]combine-or-redundant.mir2025-07-15 07:15 7.5K 
[ ]combine-redundant-and.mir2025-07-15 07:15 7.5K 
[ ]combine-redundant-neg.mir2025-07-15 07:15 4.3K 
[ ]combine-redundant-sext-inreg.mir2025-07-15 07:15 5.1K 
[ ]combine-rot.mir2025-07-15 07:15 6.9K 
[ ]combine-rsq.ll2025-07-15 07:15 8.6K 
[ ]combine-rsq.mir2025-07-15 07:15 5.6K 
[ ]combine-sext-inreg.mir2025-07-15 07:15 14K 
[ ]combine-sext-trunc-sextinreg.mir2025-07-15 07:15 2.7K 
[ ]combine-shift-amount-zext.mir2025-07-15 07:15 4.6K 
[ ]combine-shift-imm-chain-illegal-types.mir2025-07-15 07:15 14K 
[ ]combine-shift-imm-chain-shlsat.mir2025-07-15 07:15 8.0K 
[ ]combine-shift-imm-chain.ll2025-07-15 07:15 4.1K 
[ ]combine-shift-of-shifted-logic-shlsat.mir2025-07-15 07:15 15K 
[ ]combine-shift-of-shifted-logic.ll2025-07-15 07:15 9.1K 
[ ]combine-shifts.mir2025-07-15 07:15 6.9K 
[ ]combine-shl-from-extend-narrow.postlegal.mir2025-07-15 07:15 15K 
[ ]combine-shl-from-extend-narrow.prelegal.mir2025-07-15 07:15 12K 
[ ]combine-shl-narrow.mir2025-07-15 07:15 6.4K 
[ ]combine-short-clamp.ll2025-07-15 07:15 4.7K 
[ ]combine-trunc-sext.mir2025-07-15 07:15 4.4K 
[ ]combine-trunc-shift.mir2025-07-15 07:15 6.8K 
[ ]combine-urem-pow-2.mir2025-07-15 07:15 8.8K 
[ ]combine-zext-trunc.mir2025-07-15 07:15 7.2K 
[ ]combiner-crash.ll2025-07-15 07:15 255  
[ ]compute-num-sign-bits-med3.mir2025-07-15 07:15 5.4K 
[ ]constant-bus-restriction.ll2025-07-15 07:15 9.5K 
[ ]crash-stack-address-O0.ll2025-07-15 07:15 1.0K 
[ ]cvt_f32_ubyte.ll2025-07-15 07:15 59K 
[ ]dereferenceable-declaration.ll2025-07-15 07:15 15K 
[ ]divergence-divergent-i1-phis-no-lane-mask-merging.ll2025-07-15 07:15 13K 
[ ]divergence-divergent-i1-phis-no-lane-mask-merging.mir2025-07-15 07:15 27K 
[ ]divergence-divergent-i1-used-outside-loop.ll2025-07-15 07:15 24K 
[ ]divergence-divergent-i1-used-outside-loop.mir2025-07-15 07:15 59K 
[ ]divergence-structurizer.ll2025-07-15 07:15 23K 
[ ]divergence-structurizer.mir2025-07-15 07:15 69K 
[ ]divergence-temporal-divergent-i1.ll2025-07-15 07:15 17K 
[ ]divergence-temporal-divergent-i1.mir2025-07-15 07:15 37K 
[ ]divergence-temporal-divergent-reg.ll2025-07-15 07:15 2.6K 
[ ]divergence-temporal-divergent-reg.mir2025-07-15 07:15 6.1K 
[ ]divergent-control-flow.ll2025-07-15 07:15 8.5K 
[ ]dropped_debug_info_assert.ll2025-07-15 07:15 6.2K 
[ ]dummy-target.ll2025-07-15 07:15 3.5K 
[ ]dynamic-alloca-uniform.ll2025-07-15 07:15 17K 
[ ]extractelement-stack-lower.ll2025-07-15 07:15 4.3K 
[ ]extractelement.i8.ll2025-07-15 07:15 100K 
[ ]extractelement.i16.ll2025-07-15 07:15 62K 
[ ]extractelement.i128.ll2025-07-15 07:15 23K 
[ ]extractelement.ll2025-07-15 07:15 201K 
[ ]fdiv.f16.ll2025-07-15 07:15 265K 
[ ]fdiv.f32.ll2025-07-15 07:15 252K 
[ ]fdiv.f64.ll2025-07-15 07:15 102K 
[ ]flat-atomic-fadd.f32.ll2025-07-15 07:15 7.1K 
[ ]flat-atomic-fadd.f64.ll2025-07-15 07:15 3.3K 
[ ]flat-atomic-fadd.v2f16.ll2025-07-15 07:15 4.1K 
[ ]flat-scratch-init.gfx.ll2025-07-15 07:15 1.8K 
[ ]flat-scratch-init.ll2025-07-15 07:15 3.1K 
[ ]flat-scratch.ll2025-07-15 07:15 203K 
[ ]floor.f64.ll2025-07-15 07:15 11K 
[ ]fma.ll2025-07-15 07:15 38K 
[ ]fmamix-constant-bus-violation.ll2025-07-15 07:15 4.3K 
[ ]fmamix-constant-bus-violation.mir2025-07-15 07:15 2.0K 
[ ]fmax_legacy.ll2025-07-15 07:15 9.8K 
[ ]fmed3-min-max-const-combine.ll2025-07-15 07:15 21K 
[ ]fmin_legacy.ll2025-07-15 07:15 14K 
[ ]fmul.v2f16.ll2025-07-15 07:15 31K 
[ ]fp-atomics-gfx942.ll2025-07-15 07:15 5.5K 
[ ]fp64-atomics-gfx90a.ll2025-07-15 07:15 73K 
[ ]fpow.ll2025-07-15 07:15 85K 
[ ]frem.ll2025-07-15 07:15 47K 
[ ]fshl.ll2025-07-15 07:15 324K 
[ ]fshr.ll2025-07-15 07:15 326K 
[ ]function-returns.ll2025-07-15 07:15 77K 
[ ]function-returns.v2i65.ll2025-07-15 07:15 1.2K 
[ ]global-atomic-fadd.f32-no-rtn.ll2025-07-15 07:15 26K 
[ ]global-atomic-fadd.f32-rtn.ll2025-07-15 07:15 25K 
[ ]global-atomic-fadd.f64.ll2025-07-15 07:15 12K 
[ ]global-atomic-fadd.v2f16-no-rtn.ll2025-07-15 07:15 3.9K 
[ ]global-atomic-fadd.v2f16-rtn.ll2025-07-15 07:15 2.7K 
[ ]global-value.illegal.ll2025-07-15 07:15 652  
[ ]global-value.ll2025-07-15 07:15 9.5K 
[ ]hip.extern.shared.array.ll2025-07-15 07:15 6.3K 
[ ]i1-copy.ll2025-07-15 07:15 2.5K 
[ ]image-waterfall-loop-O0.ll2025-07-15 07:15 10K 
[ ]implicit-kernarg-backend-usage-global-isel.ll2025-07-15 07:15 15K 
[ ]inline-asm-mismatched-size.ll2025-07-15 07:15 9.1K 
[ ]inline-asm.ll2025-07-15 07:15 2.9K 
[ ]insertelement-stack-lower.ll2025-07-15 07:15 13K 
[ ]insertelement.i8.ll2025-07-15 07:15 160K 
[ ]insertelement.i16.ll2025-07-15 07:15 200K 
[ ]insertelement.large.ll2025-07-15 07:15 9.1K 
[ ]insertelement.ll2025-07-15 07:15 278K 
[ ]inst-select-abs.mir2025-07-15 07:15 3.8K 
[ ]inst-select-add.mir2025-07-15 07:15 7.3K 
[ ]inst-select-add.s16.mir2025-07-15 07:15 7.3K 
[ ]inst-select-amdgcn.class.mir2025-07-15 07:15 7.1K 
[ ]inst-select-amdgcn.class.s16.mir2025-07-15 07:15 4.5K 
[ ]inst-select-amdgcn.cos.mir2025-07-15 07:15 1.4K 
[ ]inst-select-amdgcn.cos.s16.mir2025-07-15 07:15 1.9K 
[ ]inst-select-amdgcn.cvt.pk.i16.mir2025-07-15 07:15 2.4K 
[ ]inst-select-amdgcn.cvt.pk.u16.mir2025-07-15 07:15 2.4K 
[ ]inst-select-amdgcn.cvt.pknorm.i16.mir2025-07-15 07:15 2.5K 
[ ]inst-select-amdgcn.cvt.pknorm.u16.mir2025-07-15 07:15 2.5K 
[ ]inst-select-amdgcn.cvt.pkrtz.mir2025-07-15 07:15 2.3K 
[ ]inst-select-amdgcn.ds.swizzle.mir2025-07-15 07:15 1.4K 
[ ]inst-select-amdgcn.exp.compr.mir2025-07-15 07:15 1.2K 
[ ]inst-select-amdgcn.exp.mir2025-07-15 07:15 780  
[ ]inst-select-amdgcn.fcmp.constants.w32.mir2025-07-15 07:15 8.0K 
[ ]inst-select-amdgcn.fcmp.constants.w64.mir2025-07-15 07:15 8.0K 
[ ]inst-select-amdgcn.fmad.ftz.mir2025-07-15 07:15 8.3K 
[ ]inst-select-amdgcn.fmed3.mir2025-07-15 07:15 6.6K 
[ ]inst-select-amdgcn.fmed3.s16.mir2025-07-15 07:15 2.6K 
[ ]inst-select-amdgcn.fract.mir2025-07-15 07:15 2.5K 
[ ]inst-select-amdgcn.fract.s16.mir2025-07-15 07:15 1.9K 
[ ]inst-select-amdgcn.groupstaticsize.mir2025-07-15 07:15 1.8K 
[ ]inst-select-amdgcn.mbcnt.lo.mir2025-07-15 07:15 2.5K 
[ ]inst-select-amdgcn.mul.u24.mir2025-07-15 07:15 2.2K 
[ ]inst-select-amdgcn.mulhi.i24.mir2025-07-15 07:15 2.2K 
[ ]inst-select-amdgcn.mulhi.u24.mir2025-07-15 07:15 2.2K 
[ ]inst-select-amdgcn.rcp.legacy.mir2025-07-15 07:15 2.0K 
[ ]inst-select-amdgcn.rcp.mir2025-07-15 07:15 2.5K 
[ ]inst-select-amdgcn.rcp.s16.mir2025-07-15 07:15 1.9K 
[ ]inst-select-amdgcn.readfirstlane.mir2025-07-15 07:15 2.2K 
[ ]inst-select-amdgcn.reloc.constant.mir2025-07-15 07:15 1.4K 
[ ]inst-select-amdgcn.rsq.clamp.mir2025-07-15 07:15 2.0K 
[ ]inst-select-amdgcn.rsq.legacy.mir2025-07-15 07:15 2.0K 
[ ]inst-select-amdgcn.rsq.mir2025-07-15 07:15 2.5K 
[ ]inst-select-amdgcn.rsq.s16.mir2025-07-15 07:15 1.9K 
[ ]inst-select-amdgcn.s.barrier.mir2025-07-15 07:15 441  
[ ]inst-select-amdgcn.s.sendmsg.mir2025-07-15 07:15 741  
[ ]inst-select-amdgcn.sffbh.mir2025-07-15 07:15 1.8K 
[ ]inst-select-amdgcn.sin.mir2025-07-15 07:15 1.4K 
[ ]inst-select-amdgcn.sin.s16.mir2025-07-15 07:15 1.9K 
[ ]inst-select-amdgpu-atomic-cmpxchg-flat.mir2025-07-15 07:15 34K 
[ ]inst-select-amdgpu-atomic-cmpxchg-global.mir2025-07-15 07:15 60K 
[ ]inst-select-amdgpu-ffbh-u32.mir2025-07-15 07:15 1.8K 
[ ]inst-select-amdgpu-ffbl-b32.mir2025-07-15 07:15 1.8K 
[ ]inst-select-amdgpu-wave-address.mir2025-07-15 07:15 1.6K 
[ ]inst-select-and.mir2025-07-15 07:15 23K 
[ ]inst-select-anyext.mir2025-07-15 07:15 7.5K 
[ ]inst-select-ashr.mir2025-07-15 07:15 18K 
[ ]inst-select-ashr.s16.mir2025-07-15 07:15 23K 
[ ]inst-select-ashr.v2s16.mir2025-07-15 07:15 5.0K 
[ ]inst-select-atomic-cmpxchg-local.mir2025-07-15 07:15 12K 
[ ]inst-select-atomic-cmpxchg-region.mir2025-07-15 07:15 12K 
[ ]inst-select-atomicrmw-add-flat.mir2025-07-15 07:15 43K 
[ ]inst-select-atomicrmw-add-global.mir2025-07-15 07:15 68K 
[ ]inst-select-atomicrmw-fadd-local.mir2025-07-15 07:15 6.1K 
[ ]inst-select-atomicrmw-fadd-region.mir2025-07-15 07:15 6.1K 
[ ]inst-select-atomicrmw-xchg-local.mir2025-07-15 07:15 4.7K 
[ ]inst-select-atomicrmw-xchg-region.mir2025-07-15 07:15 4.7K 
[ ]inst-select-bitcast.mir2025-07-15 07:15 495  
[ ]inst-select-bitreverse.mir2025-07-15 07:15 4.2K 
[ ]inst-select-br.mir2025-07-15 07:15 495  
[ ]inst-select-brcond.mir2025-07-15 07:15 9.5K 
[ ]inst-select-bswap.mir2025-07-15 07:15 2.6K 
[ ]inst-select-build-vector-trunc.v2s16.mir2025-07-15 07:15 25K 
[ ]inst-select-build-vector.mir2025-07-15 07:15 3.7K 
[ ]inst-select-concat-vectors.mir2025-07-15 07:15 36K 
[ ]inst-select-constant.mir2025-07-15 07:15 40K 
[ ]inst-select-copy.mir2025-07-15 07:15 16K 
[ ]inst-select-ctlz-zero-undef.mir2025-07-15 07:15 2.3K 
[ ]inst-select-ctpop.mir2025-07-15 07:15 6.7K 
[ ]inst-select-cttz-zero-undef.mir2025-07-15 07:15 2.3K 
[ ]inst-select-extract-vector-elt.mir2025-07-15 07:15 49K 
[ ]inst-select-extract.mir2025-07-15 07:15 9.6K 
[ ]inst-select-fabs.mir2025-07-15 07:15 28K 
[ ]inst-select-fadd.s16.mir2025-07-15 07:15 5.9K 
[ ]inst-select-fadd.s32.mir2025-07-15 07:15 9.1K 
[ ]inst-select-fadd.s64.mir2025-07-15 07:15 8.8K 
[ ]inst-select-fcanonicalize.mir2025-07-15 07:15 29K 
[ ]inst-select-fceil.mir2025-07-15 07:15 2.2K 
[ ]inst-select-fceil.s16.mir2025-07-15 07:15 6.1K 
[ ]inst-select-fcmp.mir2025-07-15 07:15 36K 
[ ]inst-select-fcmp.s16.gfx11plus-fake16.mir2025-07-15 07:15 12K 
[ ]inst-select-fcmp.s16.gfx11plus.mir2025-07-15 07:15 14K 
[ ]inst-select-fcmp.s16.mir2025-07-15 07:15 20K 
[ ]inst-select-fconstant.mir2025-07-15 07:15 5.9K 
[ ]inst-select-fexp2.mir2025-07-15 07:15 1.3K 
[ ]inst-select-ffloor.s16.mir2025-07-15 07:15 6.5K 
[ ]inst-select-ffloor.s32.mir2025-07-15 07:15 2.2K 
[ ]inst-select-ffloor.s64.mir2025-07-15 07:15 1.6K 
[ ]inst-select-fma.s32.mir2025-07-15 07:15 11K 
[ ]inst-select-fmad.s32.mir2025-07-15 07:15 8.0K 
[ ]inst-select-fmaxnum-ieee.mir2025-07-15 07:15 5.9K 
[ ]inst-select-fmaxnum-ieee.s16.mir2025-07-15 07:15 3.0K 
[ ]inst-select-fmaxnum-ieee.v2s16.mir2025-07-15 07:15 1.1K 
[ ]inst-select-fmaxnum.mir2025-07-15 07:15 5.8K 
[ ]inst-select-fmaxnum.s16.mir2025-07-15 07:15 3.0K 
[ ]inst-select-fmaxnum.v2s16.mir2025-07-15 07:15 1.2K 
[ ]inst-select-fminnum-ieee.mir2025-07-15 07:15 5.9K 
[ ]inst-select-fminnum-ieee.s16.mir2025-07-15 07:15 3.0K 
[ ]inst-select-fminnum-ieee.v2s16.mir2025-07-15 07:15 1.1K 
[ ]inst-select-fminnum.mir2025-07-15 07:15 5.8K 
[ ]inst-select-fminnum.s16.mir2025-07-15 07:15 3.0K 
[ ]inst-select-fminnum.v2s16.mir2025-07-15 07:15 1.1K 
[ ]inst-select-fmul.mir2025-07-15 07:15 15K 
[ ]inst-select-fmul.v2s16.mir2025-07-15 07:15 3.2K 
[ ]inst-select-fneg.mir2025-07-15 07:15 49K 
[ ]inst-select-fptosi.mir2025-07-15 07:15 20K 
[ ]inst-select-fptoui.mir2025-07-15 07:15 19K 
[ ]inst-select-fract.f64.mir2025-07-15 07:15 8.7K 
[ ]inst-select-frame-index.mir2025-07-15 07:15 911  
[ ]inst-select-freeze.mir2025-07-15 07:15 26K 
[ ]inst-select-fshr.mir2025-07-15 07:15 3.0K 
[ ]inst-select-i1-copy.mir2025-07-15 07:15 7.8K 
[ ]inst-select-icmp.mir2025-07-15 07:15 11K 
[ ]inst-select-icmp.s16.mir2025-07-15 07:15 26K 
[ ]inst-select-icmp.s64.mir2025-07-15 07:15 27K 
[ ]inst-select-implicit-def.mir2025-07-15 07:15 5.2K 
[ ]inst-select-insert-vector-elt.mir2025-07-15 07:15 48K 
[ ]inst-select-insert.mir2025-07-15 07:15 20K 
[ ]inst-select-intrinsic-trunc.mir2025-07-15 07:15 2.3K 
[ ]inst-select-intrinsic-trunc.s16.mir2025-07-15 07:15 1.9K 
[ ]inst-select-inttoptr.mir2025-07-15 07:15 852  
[ ]inst-select-load-atomic-flat.mir2025-07-15 07:15 26K 
[ ]inst-select-load-atomic-global.mir2025-07-15 07:15 36K 
[ ]inst-select-load-atomic-local.mir2025-07-15 07:15 13K 
[ ]inst-select-load-constant.mir2025-07-15 07:15 69K 
[ ]inst-select-load-flat.mir2025-07-15 07:15 151K 
[ ]inst-select-load-global-old-legalization.mir2025-07-15 07:15 206K 
[ ]inst-select-load-global-saddr.mir2025-07-15 07:15 63K 
[ ]inst-select-load-global.mir2025-07-15 07:15 202K 
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[ ]llvm.amdgcn.image.gather4.dim.ll2025-07-15 07:15 50K 
[ ]llvm.amdgcn.image.gather4.o.dim.ll2025-07-15 07:15 24K 
[ ]llvm.amdgcn.image.getresinfo.a16.ll2025-07-15 07:15 16K 
[ ]llvm.amdgcn.image.getresinfo.ll2025-07-15 07:15 27K 
[ ]llvm.amdgcn.image.load.1d.d16.ll2025-07-15 07:15 46K 
[ ]llvm.amdgcn.image.load.1d.ll2025-07-15 07:15 37K 
[ ]llvm.amdgcn.image.load.2d.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.image.load.2darraymsaa.a16.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.image.load.2darraymsaa.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.image.load.3d.a16.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.image.load.3d.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.image.sample.cd.g16.ll2025-07-15 07:15 7.4K 
[ ]llvm.amdgcn.image.sample.g16.ll2025-07-15 07:15 20K 
[ ]llvm.amdgcn.image.store.2d.d16.ll2025-07-15 07:15 6.3K 
[ ]llvm.amdgcn.image.store.2d.ll2025-07-15 07:15 28K 
[ ]llvm.amdgcn.implicit.ptr.buffer.ll2025-07-15 07:15 579  
[ ]llvm.amdgcn.interp.inreg.ll2025-07-15 07:15 24K 
[ ]llvm.amdgcn.interp.p1.f16.ll2025-07-15 07:15 5.1K 
[ ]llvm.amdgcn.intersect_ray.ll2025-07-15 07:15 53K 
[ ]llvm.amdgcn.kernarg.segment.ptr.ll2025-07-15 07:15 5.5K 
[ ]llvm.amdgcn.make.buffer.rsrc.ll2025-07-15 07:15 19K 
[ ]llvm.amdgcn.mfma.gfx90a.ll2025-07-15 07:15 17K 
[VID]llvm.amdgcn.mov.dpp.ll2025-07-15 07:15 5.5K 
[ ]llvm.amdgcn.queue.ptr.ll2025-07-15 07:15 1.1K 
[ ]llvm.amdgcn.raw.buffer.atomic.add.ll2025-07-15 07:15 33K 
[ ]llvm.amdgcn.raw.buffer.atomic.cmpswap.ll2025-07-15 07:15 60K 
[ ]llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll2025-07-15 07:15 1.7K 
[ ]llvm.amdgcn.raw.buffer.atomic.fadd.ll2025-07-15 07:15 35K 
[ ]llvm.amdgcn.raw.buffer.load.format.f16.ll2025-07-15 07:15 33K 
[ ]llvm.amdgcn.raw.buffer.load.format.ll2025-07-15 07:15 33K 
[ ]llvm.amdgcn.raw.buffer.load.ll2025-07-15 07:15 116K 
[ ]llvm.amdgcn.raw.buffer.load.tfe.ll2025-07-15 07:15 123K 
[ ]llvm.amdgcn.raw.buffer.store.format.f16.ll2025-07-15 07:15 59K 
[ ]llvm.amdgcn.raw.buffer.store.format.f32.ll2025-07-15 07:15 43K 
[ ]llvm.amdgcn.raw.buffer.store.ll2025-07-15 07:15 106K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.add.ll2025-07-15 07:15 18K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll2025-07-15 07:15 33K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll2025-07-15 07:15 1.7K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll2025-07-15 07:15 35K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.format.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.ll2025-07-15 07:15 67K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll2025-07-15 07:15 43K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.ll2025-07-15 07:15 62K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll2025-07-15 07:15 30K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.load.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll2025-07-15 07:15 42K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.store.ll2025-07-15 07:15 49K 
[ ]llvm.amdgcn.raw.tbuffer.load.f16.ll2025-07-15 07:15 41K 
[ ]llvm.amdgcn.raw.tbuffer.load.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.raw.tbuffer.store.f16.ll2025-07-15 07:15 59K 
[ ]llvm.amdgcn.raw.tbuffer.store.i8.ll2025-07-15 07:15 37K 
[ ]llvm.amdgcn.raw.tbuffer.store.ll2025-07-15 07:15 90K 
[ ]llvm.amdgcn.rsq.clamp.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.s.buffer.load.ll2025-07-15 07:15 488K 
[ ]llvm.amdgcn.s.setreg.ll2025-07-15 07:15 61K 
[ ]llvm.amdgcn.s.sleep.ll2025-07-15 07:15 1.4K 
[ ]llvm.amdgcn.sbfe.ll2025-07-15 07:15 35K 
[ ]llvm.amdgcn.sdot2.ll2025-07-15 07:15 14K 
[ ]llvm.amdgcn.sdot4.ll2025-07-15 07:15 5.4K 
[ ]llvm.amdgcn.sdot8.ll2025-07-15 07:15 3.3K 
[ ]llvm.amdgcn.set.inactive.ll2025-07-15 07:15 20K 
[ ]llvm.amdgcn.softwqm.ll2025-07-15 07:15 3.7K 
[ ]llvm.amdgcn.struct.buffer.atomic.add.ll2025-07-15 07:15 34K 
[ ]llvm.amdgcn.struct.buffer.atomic.cmpswap.ll2025-07-15 07:15 65K 
[ ]llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll2025-07-15 07:15 1.7K 
[ ]llvm.amdgcn.struct.buffer.atomic.fadd.ll2025-07-15 07:15 38K 
[ ]llvm.amdgcn.struct.buffer.load.format.f16.ll2025-07-15 07:15 41K 
[ ]llvm.amdgcn.struct.buffer.load.format.ll2025-07-15 07:15 44K 
[ ]llvm.amdgcn.struct.buffer.load.ll2025-07-15 07:15 61K 
[ ]llvm.amdgcn.struct.buffer.load.tfe.ll2025-07-15 07:15 127K 
[ ]llvm.amdgcn.struct.buffer.store.format.f16.ll2025-07-15 07:15 32K 
[ ]llvm.amdgcn.struct.buffer.store.format.f32.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.struct.buffer.store.ll2025-07-15 07:15 37K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.add.ll2025-07-15 07:15 19K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll2025-07-15 07:15 35K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll2025-07-15 07:15 1.8K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll2025-07-15 07:15 38K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll2025-07-15 07:15 30K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.format.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll2025-07-15 07:15 23K 
[ ]llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll2025-07-15 07:15 14K 
[ ]llvm.amdgcn.struct.ptr.buffer.store.ll2025-07-15 07:15 22K 
[ ]llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.struct.ptr.tbuffer.load.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.struct.tbuffer.load.f16.ll2025-07-15 07:15 41K 
[ ]llvm.amdgcn.struct.tbuffer.load.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.sudot4.ll2025-07-15 07:15 4.4K 
[ ]llvm.amdgcn.sudot8.ll2025-07-15 07:15 4.4K 
[ ]llvm.amdgcn.trig.preop.ll2025-07-15 07:15 7.5K 
[ ]llvm.amdgcn.ubfe.ll2025-07-15 07:15 38K 
[ ]llvm.amdgcn.udot2.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.udot4.ll2025-07-15 07:15 6.4K 
[ ]llvm.amdgcn.udot8.ll2025-07-15 07:15 3.5K 
[ ]llvm.amdgcn.update.dpp.ll2025-07-15 07:15 19K 
[ ]llvm.amdgcn.wmma_32.ll2025-07-15 07:15 21K 
[ ]llvm.amdgcn.wmma_64.ll2025-07-15 07:15 18K 
[ ]llvm.amdgcn.workgroup.id.ll2025-07-15 07:15 4.0K 
[ ]llvm.amdgcn.workitem.id.ll2025-07-15 07:15 7.8K 
[ ]llvm.amdgcn.wqm.demote.ll2025-07-15 07:15 49K 
[ ]llvm.amdgcn.wqm.ll2025-07-15 07:15 3.6K 
[ ]llvm.amdgcn.writelane.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.wwm.ll2025-07-15 07:15 7.3K 
[ ]llvm.memcpy.inline.ll2025-07-15 07:15 1.5K 
[ ]llvm.memcpy.ll2025-07-15 07:15 19K 
[ ]llvm.memmove.ll2025-07-15 07:15 4.7K 
[ ]llvm.memset.ll2025-07-15 07:15 1.8K 
[ ]llvm.powi.ll2025-07-15 07:15 21K 
[ ]load-constant.96.ll2025-07-15 07:15 55K 
[ ]load-constant32bit.ll2025-07-15 07:15 3.8K 
[ ]load-legalize-range-metadata.ll2025-07-15 07:15 7.6K 
[ ]load-local.96.ll2025-07-15 07:15 15K 
[ ]load-local.128.ll2025-07-15 07:15 17K 
[ ]load-unaligned.ll2025-07-15 07:15 13K 
[ ]localizer-wrong-insert-point.mir2025-07-15 07:15 1.1K 
[ ]localizer.ll2025-07-15 07:15 9.5K 
[ ]lshr.ll2025-07-15 07:15 66K 
[ ]madmix-constant-bus-violation.ll2025-07-15 07:15 4.4K 
[ ]madmix-constant-bus-violation.mir2025-07-15 07:15 2.0K 
[ ]memory-legalizer-atomic-fence.ll2025-07-15 07:15 46K 
[ ]merge-buffer-stores.ll2025-07-15 07:15 6.4K 
[ ]minmaxabs.ll2025-07-15 07:15 3.5K 
[ ]mmra.ll2025-07-15 07:15 1.6K 
[ ]mubuf-global.ll2025-07-15 07:15 65K 
[ ]mul-known-bits.i64.ll2025-07-15 07:15 24K 
[ ]mul-known-bits.i64.mir2025-07-15 07:15 13K 
[ ]mul.ll2025-07-15 07:15 115K 
[ ]mul.v2i16.ll2025-07-15 07:15 4.6K 
[ ]no-cse-nonlocal-convergent-instrs.mir2025-07-15 07:15 3.2K 
[ ]no-ctlz-from-umul-to-lshr-in-postlegalizer.ll2025-07-15 07:15 3.8K 
[ ]no-ctlz-from-umul-to-lshr-in-postlegalizer.mir2025-07-15 07:15 835  
[ ]no-legalize-atomic.mir2025-07-15 07:15 1.6K 
[ ]non-entry-alloca.ll2025-07-15 07:15 10K 
[ ]or.ll2025-07-15 07:15 38K 
[ ]orn2.ll2025-07-15 07:15 40K 
[ ]postlegalizer-combiner-buildvector-identities.mir2025-07-15 07:15 5.0K 
[ ]postlegalizer-combiner-divrem.mir2025-07-15 07:15 10K 
[ ]postlegalizer-combiner-fcanonicalize.mir2025-07-15 07:15 3.6K 
[ ]postlegalizer-combiner-freeze.mir2025-07-15 07:15 3.2K 
[ ]postlegalizer-combiner-reassoc.mir2025-07-15 07:15 1.1K 
[ ]postlegalizer-combiner-sextload-from-sextinreg.mir2025-07-15 07:15 5.9K 
[ ]postlegalizer-combiner-trunc-bitcast-buildvector.mir2025-07-15 07:15 6.2K 
[ ]postlegalizer-combiner-unmerge-undef.mir2025-07-15 07:15 915  
[ ]postlegalizer-combiner-zextload-from-and.mir2025-07-15 07:15 6.2K 
[ ]postlegalizercombiner-and.mir2025-07-15 07:15 12K 
[ ]postlegalizercombiner-ashr.mir2025-07-15 07:15 4.7K 
[ ]postlegalizercombiner-load-and-mask.mir2025-07-15 07:15 1.0K 
[ ]postlegalizercombiner-lshr.mir2025-07-15 07:15 4.7K 
[ ]postlegalizercombiner-mul.mir2025-07-15 07:15 2.0K 
[ ]postlegalizercombiner-sbfx.mir2025-07-15 07:15 4.9K 
[ ]postlegalizercombiner-select.mir2025-07-15 07:15 3.7K 
[ ]postlegalizercombiner-shl.mir2025-07-15 07:15 4.7K 
[ ]postlegalizercombiner-ubfx.mir2025-07-15 07:15 4.6K 
[ ]prelegalizer-combiner-divrem.mir2025-07-15 07:15 25K 
[ ]prelegalizer-combiner-fptrunc_fpext.mir2025-07-15 07:15 2.4K 
[ ]prelegalizer-combiner-redundant-bitcast.mir2025-07-15 07:15 1.6K 
[ ]prelegalizer-combiner-sext_inreg-to-and.mir2025-07-15 07:15 4.1K 
[ ]prelegalizer-combiner-shuffle.mir2025-07-15 07:15 7.9K 
[ ]promote-dependency-on-invariant-result.ll2025-07-15 07:15 1.1K 
[ ]regbankcombiner-clamp-fmed3-const.mir2025-07-15 07:15 14K 
[ ]regbankcombiner-clamp-minmax-const.mir2025-07-15 07:15 21K 
[ ]regbankcombiner-fmed3-minmax-const.mir2025-07-15 07:15 20K 
[ ]regbankcombiner-redundant-and.mir2025-07-15 07:15 1.1K 
[ ]regbankcombiner-smed3.mir2025-07-15 07:15 13K 
[ ]regbankcombiner-umed3.mir2025-07-15 07:15 13K 
[ ]regbankselect-abs.mir2025-07-15 07:15 2.8K 
[ ]regbankselect-add.s16.mir2025-07-15 07:15 3.6K 
[ ]regbankselect-add.s32.mir2025-07-15 07:15 2.1K 
[ ]regbankselect-add.v2s16.mir2025-07-15 07:15 3.3K 
[ ]regbankselect-amdgcn-exp-compr.mir2025-07-15 07:15 1.7K 
[ ]regbankselect-amdgcn-exp.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-amdgcn-s-buffer-load.mir2025-07-15 07:15 8.5K 
[ ]regbankselect-amdgcn.ballot.i64.mir2025-07-15 07:15 2.6K 
[ ]regbankselect-amdgcn.class.mir2025-07-15 07:15 2.8K 
[ ]regbankselect-amdgcn.cvt.pkrtz.mir2025-07-15 07:15 2.8K 
[ ]regbankselect-amdgcn.div.fmas.mir2025-07-15 07:15 5.2K 
[ ]regbankselect-amdgcn.div.scale.mir2025-07-15 07:15 2.9K 
[ ]regbankselect-amdgcn.ds.append.mir2025-07-15 07:15 1.5K 
[ ]regbankselect-amdgcn.ds.bpermute.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-amdgcn.ds.consume.mir2025-07-15 07:15 1.5K 
[ ]regbankselect-amdgcn.ds.gws.init.mir2025-07-15 07:15 3.1K 
[ ]regbankselect-amdgcn.ds.gws.sema.v.mir2025-07-15 07:15 1.4K 
[ ]regbankselect-amdgcn.ds.ordered.add.mir2025-07-15 07:15 3.2K 
[ ]regbankselect-amdgcn.ds.ordered.swap.mir2025-07-15 07:15 3.3K 
[ ]regbankselect-amdgcn.ds.permute.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-amdgcn.ds.swizzle.mir2025-07-15 07:15 893  
[ ]regbankselect-amdgcn.else.32.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-amdgcn.else.64.mir2025-07-15 07:15 832  
[ ]regbankselect-amdgcn.fcmp.mir2025-07-15 07:15 2.8K 
[ ]regbankselect-amdgcn.fmul.legacy.mir2025-07-15 07:15 2.8K 
[ ]regbankselect-amdgcn.groupstaticsize.mir2025-07-15 07:15 602  
[ ]regbankselect-amdgcn.icmp.mir2025-07-15 07:15 2.8K 
[ ]regbankselect-amdgcn.image.load.1d.ll2025-07-15 07:15 28K 
[ ]regbankselect-amdgcn.image.sample.1d.ll2025-07-15 07:15 43K 
[VID]regbankselect-amdgcn.interp.mov.mir2025-07-15 07:15 1.6K 
[ ]regbankselect-amdgcn.interp.p1.f16.mir2025-07-15 07:15 1.8K 
[ ]regbankselect-amdgcn.interp.p1.mir2025-07-15 07:15 3.1K 
[ ]regbankselect-amdgcn.interp.p2.f16.mir2025-07-15 07:15 2.2K 
[ ]regbankselect-amdgcn.interp.p2.mir2025-07-15 07:15 2.1K 
[ ]regbankselect-amdgcn.kernarg.segment.ptr.mir2025-07-15 07:15 614  
[ ]regbankselect-amdgcn.kill.mir2025-07-15 07:15 2.7K 
[ ]regbankselect-amdgcn.lds.direct.load.mir2025-07-15 07:15 1.5K 
[ ]regbankselect-amdgcn.lds.param.load.mir2025-07-15 07:15 1.4K 
[ ]regbankselect-amdgcn.live.mask.mir2025-07-15 07:15 682  
[ ]regbankselect-amdgcn.mfma.gfx90a.mir2025-07-15 07:15 16K 
[ ]regbankselect-amdgcn.mfma.gfx942.mir2025-07-15 07:15 22K 
[ ]regbankselect-amdgcn.mfma.mir2025-07-15 07:15 61K 
[ ]regbankselect-amdgcn.ps.live.mir2025-07-15 07:15 645  
[ ]regbankselect-amdgcn.raw.buffer.load.ll2025-07-15 07:15 14K 
[ ]regbankselect-amdgcn.raw.ptr.buffer.load.ll2025-07-15 07:15 15K 
[ ]regbankselect-amdgcn.readfirstlane.mir2025-07-15 07:15 1.3K 
[ ]regbankselect-amdgcn.readlane.mir2025-07-15 07:15 6.1K 
[ ]regbankselect-amdgcn.s.buffer.load.ll2025-07-15 07:15 249K 
[ ]regbankselect-amdgcn.s.buffer.load.mir2025-07-15 07:15 4.8K 
[ ]regbankselect-amdgcn.s.get.waveid.in.workgroup.mir2025-07-15 07:15 672  
[ ]regbankselect-amdgcn.s.getpc.mir2025-07-15 07:15 566  
[ ]regbankselect-amdgcn.s.getreg.mir2025-07-15 07:15 606  
[ ]regbankselect-amdgcn.s.memrealtime.mir2025-07-15 07:15 620  
[ ]regbankselect-amdgcn.s.memtime.mir2025-07-15 07:15 604  
[ ]regbankselect-amdgcn.s.sendmsg.mir2025-07-15 07:15 1.3K 
[ ]regbankselect-amdgcn.s.sendmsghalt.mir2025-07-15 07:15 1.3K 
[ ]regbankselect-amdgcn.struct.buffer.load.ll2025-07-15 07:15 14K 
[ ]regbankselect-amdgcn.struct.buffer.store.ll2025-07-15 07:15 14K 
[ ]regbankselect-amdgcn.struct.ptr.buffer.load.ll2025-07-15 07:15 15K 
[ ]regbankselect-amdgcn.struct.ptr.buffer.store.ll2025-07-15 07:15 15K 
[ ]regbankselect-amdgcn.update.dpp.mir2025-07-15 07:15 2.9K 
[ ]regbankselect-amdgcn.wqm.demote.mir2025-07-15 07:15 2.8K 
[ ]regbankselect-amdgcn.wqm.mir2025-07-15 07:15 1.2K 
[ ]regbankselect-amdgcn.wqm.vote.mir2025-07-15 07:15 2.4K 
[ ]regbankselect-amdgcn.writelane.mir2025-07-15 07:15 4.4K 
[ ]regbankselect-amdgcn.wwm.mir2025-07-15 07:15 1.3K 
[ ]regbankselect-amdgpu-ffbh-u32.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-amdgpu-ffbl-b32.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-amdgpu-wave-address.mir2025-07-15 07:15 1.3K 
[ ]regbankselect-and-s1.mir2025-07-15 07:15 10K 
[ ]regbankselect-and.mir2025-07-15 07:15 25K 
[ ]regbankselect-anyext.mir2025-07-15 07:15 8.7K 
[ ]regbankselect-ashr.mir2025-07-15 07:15 9.0K 
[ ]regbankselect-assert-align.mir2025-07-15 07:15 1.9K 
[ ]regbankselect-assert-zext.mir2025-07-15 07:15 2.9K 
[ ]regbankselect-atomic-cmpxchg.mir2025-07-15 07:15 3.1K 
[ ]regbankselect-atomicrmw-add.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-atomicrmw-and.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-atomicrmw-fadd.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-atomicrmw-max.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-atomicrmw-min.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-atomicrmw-or.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-atomicrmw-sub.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-atomicrmw-umax.mir2025-07-15 07:15 2.6K 
[ ]regbankselect-atomicrmw-umin.mir2025-07-15 07:15 2.6K 
[ ]regbankselect-atomicrmw-xchg.mir2025-07-15 07:15 2.6K 
[ ]regbankselect-atomicrmw-xor.mir2025-07-15 07:15 2.5K 
[ ]regbankselect-bitcast.mir2025-07-15 07:15 1.0K 
[ ]regbankselect-bitreverse.mir2025-07-15 07:15 2.1K 
[ ]regbankselect-block-addr.mir2025-07-15 07:15 906  
[ ]regbankselect-brcond.mir2025-07-15 07:15 5.9K 
[ ]regbankselect-bswap.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-build-vector.mir2025-07-15 07:15 12K 
[ ]regbankselect-concat-vector.mir2025-07-15 07:15 6.5K 
[ ]regbankselect-constant.mir2025-07-15 07:15 1.3K 
[ ]regbankselect-copy.mir2025-07-15 07:15 14K 
[ ]regbankselect-ctlz-zero-undef.mir2025-07-15 07:15 2.7K 
[ ]regbankselect-ctpop.mir2025-07-15 07:15 2.3K 
[ ]regbankselect-cttz-zero-undef.mir2025-07-15 07:15 2.7K 
[ ]regbankselect-default.mir2025-07-15 07:15 1.4K 
[ ]regbankselect-dyn-stackalloc.mir2025-07-15 07:15 27K 
[ ]regbankselect-extract-vector-elt.mir2025-07-15 07:15 100K 
[ ]regbankselect-extract.mir2025-07-15 07:15 4.0K 
[ ]regbankselect-fabs.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-fadd.mir2025-07-15 07:15 2.4K 
[ ]regbankselect-fcanonicalize.mir2025-07-15 07:15 1.3K 
[ ]regbankselect-fceil.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-fcmp.mir2025-07-15 07:15 3.2K 
[ ]regbankselect-fexp2.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-flog2.mir2025-07-15 07:15 1.1K 
[ ]regbankselect-fma.mir2025-07-15 07:15 5.6K 
[ ]regbankselect-fmul.mir2025-07-15 07:15 2.4K 
[ ]regbankselect-fneg.mir2025-07-15 07:15 1.1K 
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