Index of /~tb-builder/tor-browser-build/git_clones/llvm-project/llvm/test/CodeGen/AMDGPU

[ICO]NameLast modifiedSizeDescription
[PARENTDIR]Parent Directory  -  
[ ]32-bit-local-address-space.ll2025-07-15 07:15 14K 
[DIR]GlobalISel/2025-07-15 07:15 -  
[ ]InlineAsmCrash.ll2025-07-15 07:15 1.8K 
[ ]README2025-07-15 07:15 1.1K 
[ ]SRSRC-GIT-clobber-check.mir2025-07-15 07:15 1.6K 
[ ]aa-as-infer.ll2025-07-15 07:15 17K 
[ ]aa-points-to-constant-memory.ll2025-07-15 07:15 3.2K 
[ ]abi-attribute-hints-undefined-behavior.ll2025-07-15 07:15 18K 
[ ]abs_i16.ll2025-07-15 07:15 64K 
[ ]acc-ldst.ll2025-07-15 07:15 15K 
[ ]accvgpr-copy.mir2025-07-15 07:15 128K 
[ ]accvgpr-spill-scc-clobber.mir2025-07-15 07:15 945K 
[ ]add-debug.ll2025-07-15 07:15 572  
[ ]add.i16.ll2025-07-15 07:15 6.7K 
[ ]add.ll2025-07-15 07:15 52K 
[ ]add.v2i16.ll2025-07-15 07:15 46K 
[ ]add3.ll2025-07-15 07:15 8.3K 
[ ]add64-low-32-bits-known-zero.ll2025-07-15 07:15 6.9K 
[ ]add_i1.ll2025-07-15 07:15 9.5K 
[ ]add_i64.ll2025-07-15 07:15 2.9K 
[ ]add_i128.ll2025-07-15 07:15 4.3K 
[ ]add_shl.ll2025-07-15 07:15 4.9K 
[ ]add_sub_u64_pseudos.mir2025-07-15 07:15 3.3K 
[ ]addrspacecast-captured.ll2025-07-15 07:15 1.7K 
[ ]addrspacecast-constantexpr.ll2025-07-15 07:15 11K 
[ ]addrspacecast-initializer-unsupported.ll2025-07-15 07:15 673  
[ ]addrspacecast-initializer.ll2025-07-15 07:15 1.1K 
[ ]addrspacecast-known-non-null.ll2025-07-15 07:15 2.3K 
[ ]addrspacecast.gfx6.ll2025-07-15 07:15 7.8K 
[ ]addrspacecast.ll2025-07-15 07:15 65K 
[ ]addrspacecast.r600.ll2025-07-15 07:15 3.2K 
[ ]adjust-writemask-cse.ll2025-07-15 07:15 2.2K 
[ ]adjust-writemask-invalid-copy.ll2025-07-15 07:15 3.9K 
[ ]adjust-writemask-vectorized.ll2025-07-15 07:15 735  
[ ]agpr-copy-no-free-registers-assertion-after-ra-failure.ll2025-07-15 07:15 1.5K 
[ ]agpr-copy-no-free-registers.ll2025-07-15 07:15 54K 
[ ]agpr-copy-no-vgprs.mir2025-07-15 07:15 26K 
[ ]agpr-copy-propagation.mir2025-07-15 07:15 4.8K 
[ ]agpr-copy-reuse-writes.mir2025-07-15 07:15 4.5K 
[ ]agpr-copy-sgpr-no-vgprs.mir2025-07-15 07:15 26K 
[ ]agpr-csr.ll2025-07-15 07:15 37K 
[ ]agpr-register-count.ll2025-07-15 07:15 6.2K 
[ ]agpr-remat.ll2025-07-15 07:15 2.2K 
[ ]agpr-spill-copy.mir2025-07-15 07:15 4.6K 
[ ]agpr-to-agpr-copy.mir2025-07-15 07:15 8.7K 
[ ]alignbit-pat.ll2025-07-15 07:15 3.5K 
[ ]alloc-aligned-tuples-gfx90a.mir2025-07-15 07:15 8.5K 
[ ]alloc-aligned-tuples-gfx908.mir2025-07-15 07:15 7.9K 
[ ]alloc-aligned-tuples-gfx1250.mir2025-07-15 07:15 5.1K 
[ ]alloc-all-regs-reserved-in-class.mir2025-07-15 07:15 582  
[ ]alloca.ll2025-07-15 07:15 389  
[ ]allow-check.ll2025-07-15 07:15 1.1K 
[ ]always-uniform.ll2025-07-15 07:15 1.6K 
[ ]amd.endpgm.ll2025-07-15 07:15 3.0K 
[ ]amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll2025-07-15 07:15 4.9K 
[ ]amdgcn-ieee.ll2025-07-15 07:15 7.4K 
[ ]amdgcn-load-offset-from-reg.ll2025-07-15 07:15 14K 
[ ]amdgcn.bitcast.16bit.ll2025-07-15 07:15 48K 
[ ]amdgcn.bitcast.32bit.ll2025-07-15 07:15 393K 
[ ]amdgcn.bitcast.48bit.ll2025-07-15 07:15 67K 
[ ]amdgcn.bitcast.64bit.ll2025-07-15 07:15 686K 
[ ]amdgcn.bitcast.96bit.ll2025-07-15 07:15 556K 
[ ]amdgcn.bitcast.128bit.ll2025-07-15 07:15 1.0M 
[ ]amdgcn.bitcast.160bit.ll2025-07-15 07:15 131K 
[ ]amdgcn.bitcast.192bit.ll2025-07-15 07:15 316K 
[ ]amdgcn.bitcast.224bit.ll2025-07-15 07:15 160K 
[ ]amdgcn.bitcast.256bit.ll2025-07-15 07:15 1.8M 
[ ]amdgcn.bitcast.288bit.ll2025-07-15 07:15 192K 
[ ]amdgcn.bitcast.320bit.ll2025-07-15 07:15 1.6M 
[ ]amdgcn.bitcast.352bit.ll2025-07-15 07:15 222K 
[ ]amdgcn.bitcast.384bit.ll2025-07-15 07:15 503K 
[ ]amdgcn.bitcast.448bit.ll2025-07-15 07:15 568K 
[ ]amdgcn.bitcast.512bit.ll2025-07-15 07:15 4.4M 
[ ]amdgcn.bitcast.576bit.ll2025-07-15 07:15 1.3M 
[ ]amdgcn.bitcast.640bit.ll2025-07-15 07:15 1.5M 
[ ]amdgcn.bitcast.704bit.ll2025-07-15 07:15 1.7M 
[ ]amdgcn.bitcast.768bit.ll2025-07-15 07:15 1.9M 
[ ]amdgcn.bitcast.832bit.ll2025-07-15 07:15 2.1M 
[ ]amdgcn.bitcast.896bit.ll2025-07-15 07:15 2.3M 
[ ]amdgcn.bitcast.960bit.ll2025-07-15 07:15 2.5M 
[ ]amdgcn.bitcast.1024bit.ll2025-07-15 07:15 12M 
[ ]amdgcn.bitcast.ptr.ll2025-07-15 07:15 2.6K 
[ ]amdgcn.private-memory.ll2025-07-15 07:15 1.9K 
[ ]amdgpu-alias-analysis.ll2025-07-15 07:15 10K 
[ ]amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll2025-07-15 07:15 5.1K 
[ ]amdgpu-attributor-no-agpr.ll2025-07-15 07:15 10K 
[ ]amdgpu-branch-weight-metadata.ll2025-07-15 07:15 14K 
[ ]amdgpu-codegenprepare-break-large-phis-heuristics.ll2025-07-15 07:15 78K 
[ ]amdgpu-codegenprepare-break-large-phis.ll2025-07-15 07:15 88K 
[ ]amdgpu-codegenprepare-fdiv.ll2025-07-15 07:15 349K 
[ ]amdgpu-codegenprepare-fold-binop-select.ll2025-07-15 07:15 21K 
[ ]amdgpu-codegenprepare-i16-to-i32.ll2025-07-15 07:15 112K 
[ ]amdgpu-codegenprepare-idiv.ll2025-07-15 07:15 452K 
[ ]amdgpu-codegenprepare-mul24.ll2025-07-15 07:15 36K 
[ ]amdgpu-codegenprepare-sqrt.ll2025-07-15 07:15 38K 
[ ]amdgpu-cs-chain-cc.ll2025-07-15 07:15 47K 
[ ]amdgpu-cs-chain-preserve-cc.ll2025-07-15 07:15 31K 
[ ]amdgpu-export-kernel-runtime-handles.ll2025-07-15 07:15 2.3K 
[ ]amdgpu-function-calls-option.ll2025-07-15 07:15 844  
[ ]amdgpu-inline.ll2025-07-15 07:15 8.1K 
[ ]amdgpu-late-codegenprepare-crash-splat.ll2025-07-15 07:15 2.9K 
[ ]amdgpu-late-codegenprepare.ll2025-07-15 07:15 7.3K 
[ ]amdgpu-libcall-sincos-pass-ordering.ll2025-07-15 07:15 3.9K 
[ ]amdgpu-max-num-workgroups-load-annotate.ll2025-07-15 07:15 6.1K 
[ ]amdgpu-mul24-knownbits.ll2025-07-15 07:15 1.9K 
[ ]amdgpu-no-agprs-violations.ll2025-07-15 07:15 1.7K 
[ ]amdgpu-nsa-threshold.ll2025-07-15 07:15 13K 
[ ]amdgpu-num-agpr.ll2025-07-15 07:15 26K 
[ ]amdgpu-reloc-const.ll2025-07-15 07:15 1.5K 
[ ]amdgpu-shader-calling-convention.ll2025-07-15 07:15 759  
[ ]amdgpu-simplify-libcall-ceil.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-copysign.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-exp.ll2025-07-15 07:15 20K 
[ ]amdgpu-simplify-libcall-exp2.ll2025-07-15 07:15 21K 
[ ]amdgpu-simplify-libcall-fabs.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-floor.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-fma.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-fmax-splat.ll2025-07-15 07:15 24K 
[ ]amdgpu-simplify-libcall-fmax.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-fmin-splat.ll2025-07-15 07:15 24K 
[ ]amdgpu-simplify-libcall-fmin.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-image-function-signatures.ll2025-07-15 07:15 14K 
[ ]amdgpu-simplify-libcall-ldexp-splat.ll2025-07-15 07:15 11K 
[ ]amdgpu-simplify-libcall-ldexp.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-log.ll2025-07-15 07:15 20K 
[ ]amdgpu-simplify-libcall-log2.ll2025-07-15 07:15 21K 
[ ]amdgpu-simplify-libcall-log10.ll2025-07-15 07:15 21K 
[ ]amdgpu-simplify-libcall-mad.ll2025-07-15 07:15 13K 
[ ]amdgpu-simplify-libcall-pow-codegen.ll2025-07-15 07:15 33K 
[ ]amdgpu-simplify-libcall-pow.ll2025-07-15 07:15 118K 
[ ]amdgpu-simplify-libcall-pown.ll2025-07-15 07:15 47K 
[ ]amdgpu-simplify-libcall-powr.ll2025-07-15 07:15 53K 
[ ]amdgpu-simplify-libcall-rint.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-rootn.ll2025-07-15 07:15 56K 
[ ]amdgpu-simplify-libcall-round.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-sincos.defined.ll2025-07-15 07:15 8.7K 
[ ]amdgpu-simplify-libcall-sincos.defined.nobuiltin.ll2025-07-15 07:15 3.1K 
[ ]amdgpu-simplify-libcall-sincos.defined.sin.cos.ll2025-07-15 07:15 5.2K 
[ ]amdgpu-simplify-libcall-sincos.ll2025-07-15 07:15 75K 
[ ]amdgpu-simplify-libcall-sincos.nobuiltins.ll2025-07-15 07:15 10K 
[ ]amdgpu-simplify-libcall-sincos.weak.ll2025-07-15 07:15 2.2K 
[ ]amdgpu-simplify-libcall-sqrt.ll2025-07-15 07:15 17K 
[ ]amdgpu-simplify-libcall-trunc.ll2025-07-15 07:15 12K 
[ ]amdgpu-simplify-libcall-unexpected-types.ll2025-07-15 07:15 1.3K 
[ ]amdgpu-snop-padding.mir2025-07-15 07:15 5.0K 
[ ]amdgpu-sw-lower-lds-dynamic-indirect-access-asan.ll2025-07-15 07:15 17K 
[ ]amdgpu-sw-lower-lds-dynamic-indirect-access.ll2025-07-15 07:15 11K 
[ ]amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll2025-07-15 07:15 7.2K 
[ ]amdgpu-sw-lower-lds-dynamic-lds-test.ll2025-07-15 07:15 5.7K 
[ ]amdgpu-sw-lower-lds-lower-all.ll2025-07-15 07:15 8.3K 
[ ]amdgpu-sw-lower-lds-lower-none.ll2025-07-15 07:15 1.4K 
[ ]amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll2025-07-15 07:15 25K 
[ ]amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll2025-07-15 07:15 16K 
[ ]amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll2025-07-15 07:15 6.5K 
[ ]amdgpu-sw-lower-lds-multiple-blocks-return.ll2025-07-15 07:15 6.6K 
[ ]amdgpu-sw-lower-lds-non-kernel-declaration.ll2025-07-15 07:15 6.5K 
[ ]amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll2025-07-15 07:15 17K 
[ ]amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll2025-07-15 07:15 11K 
[ ]amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll2025-07-15 07:15 14K 
[ ]amdgpu-sw-lower-lds-static-dynamic-lds-test.ll2025-07-15 07:15 9.2K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-asan.ll2025-07-15 07:15 15K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll2025-07-15 07:15 9.2K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-function-param.ll2025-07-15 07:15 6.4K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll2025-07-15 07:15 9.4K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-lower-none.ll2025-07-15 07:15 2.1K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll2025-07-15 07:15 20K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-nested.ll2025-07-15 07:15 20K 
[ ]amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll2025-07-15 07:15 9.7K 
[ ]amdgpu-sw-lower-lds-static-indirect-access.ll2025-07-15 07:15 9.5K 
[ ]amdgpu-sw-lower-lds-static-lds-O0.ll2025-07-15 07:15 4.9K 
[ ]amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll2025-07-15 07:15 9.9K 
[ ]amdgpu-sw-lower-lds-static-lds-test-asan.ll2025-07-15 07:15 9.7K 
[ ]amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll2025-07-15 07:15 8.4K 
[ ]amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll2025-07-15 07:15 13K 
[ ]amdgpu-sw-lower-lds-static-lds-test.ll2025-07-15 07:15 5.7K 
[ ]amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll2025-07-15 07:15 6.5K 
[ ]amdgpu-unroll-threshold.ll2025-07-15 07:15 1.5K 
[ ]amdgpu.private-memory.ll2025-07-15 07:15 23K 
[ ]amdgpu.work-item-intrinsics.deprecated.ll2025-07-15 07:15 3.9K 
[ ]amdhsa-kernarg-preload-num-sgprs.ll2025-07-15 07:15 3.7K 
[ ]amdhsa-trap-num-sgprs.ll2025-07-15 07:15 2.9K 
[ ]amdpal-callable.ll2025-07-15 07:15 9.3K 
[ ]amdpal-chain-metadata.ll2025-07-15 07:15 2.2K 
[ ]amdpal-cs.ll2025-07-15 07:15 961  
[ ]amdpal-elf.ll2025-07-15 07:15 1.2K 
[ ]amdpal-es.ll2025-07-15 07:15 813  
[ ]amdpal-gs.ll2025-07-15 07:15 939  
[ ]amdpal-hs.ll2025-07-15 07:15 934  
[ ]amdpal-ls.ll2025-07-15 07:15 813  
[ ]amdpal-metadata-agpr-register-count.ll2025-07-15 07:15 2.2K 
[ ]amdpal-msgpack-cs.ll2025-07-15 07:15 713  
[ ]amdpal-msgpack-default.ll2025-07-15 07:15 3.4K 
[ ]amdpal-msgpack-denormal.ll2025-07-15 07:15 3.5K 
[ ]amdpal-msgpack-dx10-clamp.ll2025-07-15 07:15 3.4K 
[ ]amdpal-msgpack-es.ll2025-07-15 07:15 566  
[ ]amdpal-msgpack-gs.ll2025-07-15 07:15 690  
[ ]amdpal-msgpack-hs.ll2025-07-15 07:15 686  
[ ]amdpal-msgpack-ieee.ll2025-07-15 07:15 4.0K 
[ ]amdpal-msgpack-ls.ll2025-07-15 07:15 560  
[ ]amdpal-msgpack-ps.ll2025-07-15 07:15 1.6K 
[ ]amdpal-msgpack-psenable.ll2025-07-15 07:15 1.4K 
[ ]amdpal-msgpack-vs.ll2025-07-15 07:15 687  
[ ]amdpal-ps.ll2025-07-15 07:15 928  
[ ]amdpal-psenable.ll2025-07-15 07:15 1.8K 
[ ]amdpal-usersgpr-init.ll2025-07-15 07:15 1.0K 
[ ]amdpal-vs.ll2025-07-15 07:15 939  
[ ]amdpal.ll2025-07-15 07:15 3.7K 
[ ]amdpal_scratch_mergedshader.ll2025-07-15 07:15 1.8K 
[ ]and-gcn.ll2025-07-15 07:15 877  
[ ]and.ll2025-07-15 07:15 85K 
[ ]and_or.ll2025-07-15 07:15 4.7K 
[ ]andorbitset.ll2025-07-15 07:15 5.4K 
[ ]andorn2.ll2025-07-15 07:15 2.8K 
[ ]andorxorinvimm.ll2025-07-15 07:15 3.4K 
[ ]annotate-existing-abi-attributes.ll2025-07-15 07:15 4.7K 
[ ]annotate-kernel-features-hsa-call.ll2025-07-15 07:15 36K 
[ ]annotate-kernel-features-hsa.ll2025-07-15 07:15 26K 
[ ]annotate-kernel-features.ll2025-07-15 07:15 17K 
[ ]annotate-noclobber.ll2025-07-15 07:15 1.5K 
[ ]anonymous-gv.ll2025-07-15 07:15 451  
[ ]any_extend_vector_inreg.ll2025-07-15 07:15 7.3K 
[ ]anyext.ll2025-07-15 07:15 7.7K 
[ ]are-loads-from-same-base-ptr.ll2025-07-15 07:15 716  
[ ]array-ptr-calc-i32.ll2025-07-15 07:15 2.4K 
[ ]array-ptr-calc-i64.ll2025-07-15 07:15 895  
[ ]artificial-terminators.mir2025-07-15 07:15 6.3K 
[ ]ashr.v2i16.ll2025-07-15 07:15 29K 
[ ]ashr64_reduce.ll2025-07-15 07:15 24K 
[ ]ashr64_reduce_flags.ll2025-07-15 07:15 2.1K 
[ ]asm-printer-check-vcc.mir2025-07-15 07:15 1.0K 
[ ]at-least-one-def-value-assert.mir2025-07-15 07:15 1.4K 
[ ]atomic-optimizer-promote-i8.ll2025-07-15 07:15 9.9K 
[ ]atomic-optimizer-strict-wqm.ll2025-07-15 07:15 2.3K 
[ ]atomic_cmp_swap_local.ll2025-07-15 07:15 6.1K 
[ ]atomic_load_add.ll2025-07-15 07:15 2.0K 
[ ]atomic_load_local.ll2025-07-15 07:15 18K 
[ ]atomic_load_sub.ll2025-07-15 07:15 2.1K 
[ ]atomic_optimization_split_dt_update.ll2025-07-15 07:15 4.1K 
[ ]atomic_optimizations_buffer.ll2025-07-15 07:15 106K 
[ ]atomic_optimizations_global_pointer.ll2025-07-15 07:15 613K 
[ ]atomic_optimizations_local_pointer.ll2025-07-15 07:15 883K 
[ ]atomic_optimizations_pixelshader.ll2025-07-15 07:15 29K 
[ ]atomic_optimizations_raw_buffer.ll2025-07-15 07:15 89K 
[ ]atomic_optimizations_struct_buffer.ll2025-07-15 07:15 101K 
[ ]atomic_store_local.ll2025-07-15 07:15 18K 
[ ]atomicrmw-expand.ll2025-07-15 07:15 49K 
[ ]atomicrmw-nand.ll2025-07-15 07:15 3.2K 
[ ]atomics-cas-remarks-gfx90a.ll2025-07-15 07:15 4.2K 
[ ]atomics-hw-remarks-gfx90a.ll2025-07-15 07:15 4.5K 
[ ]atomics_cond_sub.ll2025-07-15 07:15 11K 
[ ]attr-amdgpu-flat-work-group-size-vgpr-limit.ll2025-07-15 07:15 32K 
[ ]attr-amdgpu-flat-work-group-size.ll2025-07-15 07:15 6.0K 
[ ]attr-amdgpu-max-num-workgroups-propagate.ll2025-07-15 07:15 7.9K 
[ ]attr-amdgpu-max-num-workgroups.ll2025-07-15 07:15 4.4K 
[ ]attr-amdgpu-num-sgpr.ll2025-07-15 07:15 5.5K 
[ ]attr-amdgpu-num-vgpr.ll2025-07-15 07:15 3.5K 
[ ]attr-amdgpu-num-workgroups_error_check.ll2025-07-15 07:15 2.4K 
[ ]attr-amdgpu-waves-per-eu.ll2025-07-15 07:15 7.9K 
[ ]attr-unparseable.ll2025-07-15 07:15 1.6K 
[ ]attributor-flatscratchinit-globalisel.ll2025-07-15 07:15 24K 
[ ]attributor-flatscratchinit-undefined-behavior.ll2025-07-15 07:15 8.2K 
[ ]attributor-flatscratchinit-undefined-behavior2.ll2025-07-15 07:15 39K 
[ ]attributor-flatscratchinit.ll2025-07-15 07:15 41K 
[ ]attributor-loop-issue-58639.ll2025-07-15 07:15 2.4K 
[ ]attributor-noalias-addrspace.ll2025-07-15 07:15 40K 
[ ]attributor-noopt.ll2025-07-15 07:15 1.9K 
[ ]av-spill-expansion-with-machine-cp.mir2025-07-15 07:15 7.6K 
[ ]av_movimm_pseudo_expansion.mir2025-07-15 07:15 1.6K 
[ ]av_spill_cross_bb_usage.mir2025-07-15 07:15 12K 
[ ]back-off-barrier-subtarget-feature.ll2025-07-15 07:15 6.1K 
[ ]barrier-elimination-gfx12.ll2025-07-15 07:15 2.0K 
[ ]barrier-elimination.ll2025-07-15 07:15 871  
[ ]basic-branch.ll2025-07-15 07:15 2.1K 
[ ]basic-call-return.ll2025-07-15 07:15 877  
[ ]basic-loop.ll2025-07-15 07:15 568  
[ ]bb-prolog-spill-during-regalloc.ll2025-07-15 07:15 5.6K 
[ ]bf16-conversions.ll2025-07-15 07:15 19K 
[ ]bf16-ops.ll2025-07-15 07:15 1.0K 
[ ]bf16.ll2025-07-15 07:15 2.0M 
[ ]bfe-combine.ll2025-07-15 07:15 5.5K 
[ ]bfe-patterns.ll2025-07-15 07:15 20K 
[ ]bfe_uint.ll2025-07-15 07:15 782  
[ ]bfi_int.ll2025-07-15 07:15 63K 
[ ]bfi_int.r600.ll2025-07-15 07:15 7.7K 
[ ]bfi_nested.ll2025-07-15 07:15 13K 
[ ]bfm.ll2025-07-15 07:15 3.8K 
[ ]big_alu.ll2025-07-15 07:15 72K 
[ ]bit-op-reduce-width-known-bits.ll2025-07-15 07:15 5.8K 
[ ]bitcast-constant-to-vector.ll2025-07-15 07:15 2.0K 
[ ]bitcast-v4f16-v4i16.ll2025-07-15 07:15 1.5K 
[ ]bitcast-vector-extract.ll2025-07-15 07:15 3.8K 
[ ]bitcast_vector_bigint.ll2025-07-15 07:15 13K 
[ ]bitop3.ll2025-07-15 07:15 14K 
[ ]bitreverse-inline-immediates.ll2025-07-15 07:15 13K 
[ ]bitreverse.ll2025-07-15 07:15 37K 
[ ]blender-coalescer-verifier-error-empty-subrange.mir2025-07-15 07:15 3.2K 
[ ]blender-no-live-segment-at-def-implicit-def.ll2025-07-15 07:15 5.9K 
[ ]block-should-not-be-in-alive-blocks.mir2025-07-15 07:15 6.3K 
[ ]br_cc.f16.ll2025-07-15 07:15 13K 
[ ]branch-condition-and.ll2025-07-15 07:15 1.6K 
[ ]branch-folder-requires-no-phis.mir2025-07-15 07:15 1.3K 
[ ]branch-folding-implicit-def-subreg.ll2025-07-15 07:15 125K 
[ ]branch-relax-bundle.ll2025-07-15 07:15 1.3K 
[ ]branch-relax-indirect-branch.mir2025-07-15 07:15 21K 
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[ ]branch-relaxation-debug-info.mir2025-07-15 07:15 6.5K 
[ ]branch-relaxation-gfx10-branch-offset-bug.ll2025-07-15 07:15 3.2K 
[ ]branch-relaxation-inst-size-gfx10.ll2025-07-15 07:15 1.2K 
[ ]branch-relaxation.ll2025-07-15 07:15 54K 
[ ]branch-uniformity.ll2025-07-15 07:15 1.5K 
[ ]break-smem-soft-clauses.mir2025-07-15 07:15 12K 
[ ]break-vmem-soft-clauses.mir2025-07-15 07:15 24K 
[ ]bswap.ll2025-07-15 07:15 29K 
[ ]buffer-atomic-fadd.f32-no-rtn.ll2025-07-15 07:15 26K 
[ ]buffer-atomic-fadd.f32-rtn.ll2025-07-15 07:15 27K 
[ ]buffer-atomic-fadd.f64.ll2025-07-15 07:15 38K 
[ ]buffer-atomic-fadd.v2f16-no-rtn.ll2025-07-15 07:15 25K 
[ ]buffer-atomic-fadd.v2f16-rtn.ll2025-07-15 07:15 16K 
[ ]buffer-fat-pointer-atomicrmw-fadd.ll2025-07-15 07:15 598K 
[ ]buffer-fat-pointer-atomicrmw-fmax.ll2025-07-15 07:15 446K 
[ ]buffer-fat-pointer-atomicrmw-fmin.ll2025-07-15 07:15 446K 
[ ]buffer-fat-pointer-unsupported-errors.ll2025-07-15 07:15 1.5K 
[ ]buffer-fat-pointers-contents-legalization.ll2025-07-15 07:15 154K 
[ ]buffer-fat-pointers-memcpy.ll2025-07-15 07:15 81K 
[ ]buffer-intrinsic-mmo-type.ll2025-07-15 07:15 4.4K 
[ ]buffer-intrinsics-mmo-offsets.ll2025-07-15 07:15 64K 
[ ]buffer-rsrc-ptr-ops.ll2025-07-15 07:15 5.1K 
[ ]buffer-schedule.ll2025-07-15 07:15 2.5K 
[ ]bug-cselect-b64.ll2025-07-15 07:15 1.5K 
[ ]bug-deadlanes.ll2025-07-15 07:15 6.3K 
[ ]bug-sdag-emitcopyfromreg.ll2025-07-15 07:15 2.7K 
[ ]bug-sdag-scheduler-cycle.ll2025-07-15 07:15 891  
[ ]bug-v4f64-subvector.ll2025-07-15 07:15 3.6K 
[ ]bug-vopc-commute.ll2025-07-15 07:15 3.2K 
[ ]build-vector-insert-elt-infloop.ll2025-07-15 07:15 882  
[ ]build-vector-packed-partial-undef.ll2025-07-15 07:15 12K 
[ ]build_vector-r600.ll2025-07-15 07:15 4.1K 
[ ]build_vector.ll2025-07-15 07:15 12K 
[ ]bundle-latency.mir2025-07-15 07:15 2.3K 
[ ]bypass-div.ll2025-07-15 07:15 52K 
[ ]byval-frame-setup.ll2025-07-15 07:15 2.0K 
[ ]call-alias-register-usage-agpr.ll2025-07-15 07:15 1.5K 
[ ]call-alias-register-usage0.ll2025-07-15 07:15 1.2K 
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[ ]call-alias-register-usage2.ll2025-07-15 07:15 1.4K 
[ ]call-alias-register-usage3.ll2025-07-15 07:15 1.5K 
[ ]call-args-inreg-no-sgpr-for-csrspill-xfail.ll2025-07-15 07:15 1.1K 
[ ]call-args-inreg.ll2025-07-15 07:15 67K 
[ ]call-argument-types.ll2025-07-15 07:15 298K 
[ ]call-c-function.ll2025-07-15 07:15 736  
[ ]call-constant.ll2025-07-15 07:15 1.1K 
[ ]call-constexpr.ll2025-07-15 07:15 3.6K 
[ ]call-defs-mode-register.ll2025-07-15 07:15 3.6K 
[ ]call-encoding.ll2025-07-15 07:15 880  
[ ]call-graph-register-usage.ll2025-07-15 07:15 9.9K 
[ ]call-preserved-registers.ll2025-07-15 07:15 31K 
[ ]call-reqd-group-size.ll2025-07-15 07:15 8.1K 
[ ]call-return-types.ll2025-07-15 07:15 12K 
[ ]call-skip.ll2025-07-15 07:15 1.4K 
[ ]call-waitcnt.ll2025-07-15 07:15 5.9K 
[ ]call-waw-waitcnt.mir2025-07-15 07:15 2.7K 
[ ]call_fs.ll2025-07-15 07:15 466  
[ ]callee-frame-setup.ll2025-07-15 07:15 82K 
[ ]callee-special-input-sgprs-fixed-abi.ll2025-07-15 07:15 18K 
[ ]callee-special-input-vgprs-packed.ll2025-07-15 07:15 28K 
[ ]callee-special-input-vgprs.ll2025-07-15 07:15 29K 
[ ]calling-conventions.ll2025-07-15 07:15 131K 
[ ]captured-frame-index.ll2025-07-15 07:15 14K 
[ ]carryout-selection.ll2025-07-15 07:15 114K 
[ ]cayman-loop-bug.ll2025-07-15 07:15 866  
[ ]cc-sgpr-limit.ll2025-07-15 07:15 9.5K 
[ ]cc-sgpr-over-limit.ll2025-07-15 07:15 14K 
[ ]cc-update.ll2025-07-15 07:15 23K 
[ ]cf-loop-on-constant.ll2025-07-15 07:15 18K 
[ ]cf-stack-bug.ll2025-07-15 07:15 5.5K 
[ ]cf_end.ll2025-07-15 07:15 469  
[ ]cgp-addressing-modes-flat.ll2025-07-15 07:15 36K 
[ ]cgp-addressing-modes-gfx908.ll2025-07-15 07:15 3.6K 
[ ]cgp-addressing-modes-gfx1030.ll2025-07-15 07:15 2.9K 
[ ]cgp-addressing-modes-smem.ll2025-07-15 07:15 13K 
[ ]cgp-addressing-modes.ll2025-07-15 07:15 25K 
[ ]cgp-bitfield-extract.ll2025-07-15 07:15 6.4K 
[ ]chain-hi-to-lo.ll2025-07-15 07:15 50K 
[ ]change-scc-to-vcc.mir2025-07-15 07:15 3.9K 
[ ]check-subtarget-features.ll2025-07-15 07:15 484  
[ ]clamp-modifier.ll2025-07-15 07:15 95K 
[ ]clamp-omod-special-case.mir2025-07-15 07:15 18K 
[ ]clamp.ll2025-07-15 07:15 188K 
[ ]cluster-flat-loads-postra.mir2025-07-15 07:15 1.3K 
[ ]cluster-flat-loads.mir2025-07-15 07:15 835  
[ ]cluster_stores.ll2025-07-15 07:15 22K 
[ ]cmp_shrink.mir2025-07-15 07:15 932  
[ ]cndmask-no-def-vcc.ll2025-07-15 07:15 1.6K 
[ ]coalesce-copy-to-agpr-to-av-registers.mir2025-07-15 07:15 99K 
[ ]coalesce-identity-copies-undef-subregs.mir2025-07-15 07:15 14K 
[ ]coalesce-into-dead-subreg-copies.mir2025-07-15 07:15 1.2K 
[ ]coalesce-liveout-undef-copy.mir2025-07-15 07:15 2.2K 
[ ]coalesce-vgpr-alignment.ll2025-07-15 07:15 2.2K 
[ ]coalescer-early-clobber-subreg.mir2025-07-15 07:15 4.0K 
[ ]coalescer-extend-pruned-subrange.mir2025-07-15 07:15 3.8K 
[ ]coalescer-identical-values-undef.mir2025-07-15 07:15 660  
[ ]coalescer-remat-dead-use.mir2025-07-15 07:15 3.6K 
[ ]coalescer-removepartial-extend-undef-subrange.mir2025-07-15 07:15 2.9K 
[ ]coalescer-subranges-another-copymi-not-live.mir2025-07-15 07:15 4.3K 
[ ]coalescer-subranges-another-prune-error.mir2025-07-15 07:15 9.9K 
[ ]coalescer-subranges-prune-kill-copy.mir2025-07-15 07:15 1.4K 
[ ]coalescer-subreg-join.mir2025-07-15 07:15 2.1K 
[ ]coalescer-subregjoin-fullcopy.mir2025-07-15 07:15 6.4K 
[ ]coalescer-undef-subreg-use-invalid-lanemask.mir2025-07-15 07:15 2.1K 
[ ]coalescer-with-subregs-bad-identical.mir2025-07-15 07:15 6.6K 
[ ]coalescer_distribute.ll2025-07-15 07:15 2.1K 
[ ]coalescer_remat.ll2025-07-15 07:15 2.3K 
[ ]coalescing-subreg-was-undef-but-became-def.mir2025-07-15 07:15 1.7K 
[ ]coalescing-with-subregs-in-loop-bug.mir2025-07-15 07:15 3.9K 
[ ]coalescing_makes_lanes_undef.mir2025-07-15 07:15 1.8K 
[ ]code-object-v3.ll2025-07-15 07:15 4.0K 
[ ]code-size-estimate.ll2025-07-15 07:15 41K 
[ ]code-size-estimate.mir2025-07-15 07:15 3.9K 
[ ]codegen-internal-only-func.ll2025-07-15 07:15 230  
[ ]codegen-prepare-addrmode-sext.ll2025-07-15 07:15 561  
[ ]codegen-prepare-addrspacecast-non-null-vector.ll2025-07-15 07:15 640  
[ ]codegen-prepare-addrspacecast-non-null.ll2025-07-15 07:15 21K 
[ ]collapse-endcf-broken.mir2025-07-15 07:15 2.0K 
[ ]collapse-endcf.ll2025-07-15 07:15 62K 
[ ]collapse-endcf.mir2025-07-15 07:15 35K 
[ ]collapse-endcf2.mir2025-07-15 07:15 6.3K 
[ ]combine-add-zext-xor.ll2025-07-15 07:15 23K 
[ ]combine-and-sext-bool.ll2025-07-15 07:15 5.5K 
[ ]combine-cond-add-sub.ll2025-07-15 07:15 29K 
[ ]combine-ftrunc.ll2025-07-15 07:15 3.7K 
[ ]combine-reg-or-const.ll2025-07-15 07:15 2.2K 
[ ]combine-sreg64-inits.mir2025-07-15 07:15 5.0K 
[ ]combine-vload-extract.ll2025-07-15 07:15 9.1K 
[ ]combine_andor_with_cmps.ll2025-07-15 07:15 123K 
[ ]combine_vloads.ll2025-07-15 07:15 6.7K 
[ ]comdat.ll2025-07-15 07:15 408  
[ ]commute-compares-scalar-float.ll2025-07-15 07:15 16K 
[ ]commute-compares.ll2025-07-15 07:15 58K 
[ ]commute-frame-index-operand.mir2025-07-15 07:15 3.7K 
[ ]commute-op-sel.mir2025-07-15 07:15 5.3K 
[ ]commute-shifts.ll2025-07-15 07:15 2.1K 
[ ]commute-vop3.mir2025-07-15 07:15 3.8K 
[ ]commute_modifiers.ll2025-07-15 07:15 8.4K 
[ ]complex-folding.ll2025-07-15 07:15 536  
[ ]computeKnownBits-scalar-to-vector-crash.ll2025-07-15 07:15 382  
[ ]computeNumSignBits-mul.ll2025-07-15 07:15 5.4K 
[ ]concat_vectors.ll2025-07-15 07:15 16K 
[ ]constant-address-space-32bit.ll2025-07-15 07:15 16K 
[ ]constant-fold-imm-immreg.mir2025-07-15 07:15 35K 
[ ]constant-fold-mi-operands.ll2025-07-15 07:15 5.0K 
[ ]constrained-shift.ll2025-07-15 07:15 13K 
[ ]control-flow-fastregalloc.ll2025-07-15 07:15 12K 
[ ]control-flow-optnone.ll2025-07-15 07:15 1.8K 
[ ]convergence-laneops.ll2025-07-15 07:15 2.8K 
[ ]convergence-tokens.ll2025-07-15 07:15 5.1K 
[ ]convergent-inlineasm.ll2025-07-15 07:15 1.5K 
[ ]copy-hoist-no-spills.ll2025-07-15 07:15 3.6K 
[ ]copy-illegal-type.ll2025-07-15 07:15 25K 
[ ]copy-overlap-sgpr-kill.mir2025-07-15 07:15 2.7K 
[ ]copy-overlap-vgpr-kill.mir2025-07-15 07:15 4.6K 
[ ]copy-phys-reg-implicit-operand-kills-subregs.mir2025-07-15 07:15 1.2K 
[ ]copy-to-reg-frameindex.ll2025-07-15 07:15 3.3K 
[ ]copy-to-reg-scc-clobber.ll2025-07-15 07:15 2.8K 
[ ]copy-to-reg.ll2025-07-15 07:15 3.2K 
[ ]copy-vgpr-clobber-spill-vgpr.mir2025-07-15 07:15 21K 
[ ]copy_phys_vgpr64.mir2025-07-15 07:15 43K 
[ ]copy_to_scc.ll2025-07-15 07:15 1.7K 
[ ]copyprop_regsequence_with_undef.mir2025-07-15 07:15 1.2K 
[ ]copysign-simplify-demanded-bits.ll2025-07-15 07:15 16K 
[ ]couldnt-join-subrange-3.mir2025-07-15 07:15 6.8K 
[ ]cross-block-use-is-not-abi-copy.ll2025-07-15 07:15 11K 
[ ]cse-convergent.ll2025-07-15 07:15 2.6K 
[ ]cse-phi-incoming-val.ll2025-07-15 07:15 1.6K 
[ ]csr-gfx10.ll2025-07-15 07:15 638  
[ ]csr-sgpr-spill-live-ins.mir2025-07-15 07:15 893  
[ ]ctlz.ll2025-07-15 07:15 71K 
[ ]ctlz_zero_undef.ll2025-07-15 07:15 99K 
[ ]ctpop.ll2025-07-15 07:15 13K 
[ ]ctpop16.ll2025-07-15 07:15 54K 
[ ]ctpop64.ll2025-07-15 07:15 20K 
[ ]cttz.ll2025-07-15 07:15 60K 
[ ]cttz_zero_undef.ll2025-07-15 07:15 62K 
[ ]cube.ll2025-07-15 07:15 1.5K 
[ ]cvt_f32_ubyte.ll2025-07-15 07:15 121K 
[ ]cvt_flr_i32_f32.ll2025-07-15 07:15 3.1K 
[ ]cvt_rpi_i32_f32.ll2025-07-15 07:15 3.1K 
[ ]dag-divergence-atomic.ll2025-07-15 07:15 39K 
[ ]dag-divergence.ll2025-07-15 07:15 4.1K 
[ ]dag-preserve-disjoint-flag.ll2025-07-15 07:15 7.1K 
[ ]dagcomb-extract-vec-elt-different-sizes.ll2025-07-15 07:15 4.5K 
[ ]dagcomb-mullohi.ll2025-07-15 07:15 5.5K 
[ ]dagcomb-shuffle-vecextend-non2.ll2025-07-15 07:15 1.4K 
[ ]dagcombine-fma-crash.ll2025-07-15 07:15 6.4K 
[ ]dagcombine-fma-fmad.ll2025-07-15 07:15 22K 
[ ]dagcombine-fmul-sel.ll2025-07-15 07:15 213K 
[ ]dagcombine-lshr-and-cmp.ll2025-07-15 07:15 5.2K 
[ ]dagcombine-reassociate-bug.ll2025-07-15 07:15 1.4K 
[ ]dagcombine-select.ll2025-07-15 07:15 19K 
[ ]dagcombine-setcc-select.ll2025-07-15 07:15 2.7K 
[ ]dagcombine-v1i8-extractvecelt-crash.ll2025-07-15 07:15 1.1K 
[ ]dagcombiner-bug-illegal-vec4-int-to-fp.ll2025-07-15 07:15 1.3K 
[ ]dbg-info-inline-at.ll2025-07-15 07:15 3.3K 
[ ]dbg-value-ends-sched-region.mir2025-07-15 07:15 7.2K 
[ ]dbg-value-starts-sched-region.mir2025-07-15 07:15 812  
[ ]dce-disjoint-intervals.mir2025-07-15 07:15 1.0K 
[ ]dead-lane.mir2025-07-15 07:15 1.1K 
[ ]dead-machine-elim-after-dead-lane.ll2025-07-15 07:15 1.2K 
[ ]dead_bundle.mir2025-07-15 07:15 2.7K 
[ ]dead_copy.mir2025-07-15 07:15 1.0K 
[ ]debug-value-scheduler-crash.mir2025-07-15 07:15 7.2K 
[ ]debug-value-scheduler-liveins.mir2025-07-15 07:15 3.8K 
[ ]debug-value-scheduler.mir2025-07-15 07:15 18K 
[ ]debug-value.ll2025-07-15 07:15 4.9K 
[ ]debug-value2.ll2025-07-15 07:15 30K 
[ ]debug.ll2025-07-15 07:15 460  
[ ]debug_frame.ll2025-07-15 07:15 1.1K 
[ ]default-flat-work-group-size-overrides-waves-per-eu.ll2025-07-15 07:15 3.0K 
[ ]default-fp-mode.ll2025-07-15 07:15 6.6K 
[ ]default_amdhsa_code_object_version.ll2025-07-15 07:15 153  
[ ]detect-dead-lanes.mir2025-07-15 07:15 12K 
[ ]direct-indirect-call.ll2025-07-15 07:15 2.2K 
[ ]directive-amdgcn-target.ll2025-07-15 07:15 19K 
[ ]disable_form_clauses.ll2025-07-15 07:15 3.4K 
[ ]disconnected-predset-break-bug.ll2025-07-15 07:15 1.1K 
[ ]div-rem-by-constant-64.ll2025-07-15 07:15 56K 
[ ]div_i128.ll2025-07-15 07:15 247K 
[ ]div_v2i128.ll2025-07-15 07:15 150K 
[ ]diverge-extra-formal-args.ll2025-07-15 07:15 1.5K 
[ ]diverge-interp-mov-lower.ll2025-07-15 07:15 1.6K 
[ ]diverge-switch-default.ll2025-07-15 07:15 2.2K 
[ ]divergence-at-use.ll2025-07-15 07:15 1.2K 
[ ]divergence-driven-abs.ll2025-07-15 07:15 2.9K 
[ ]divergence-driven-bfe-isel.ll2025-07-15 07:15 760  
[ ]divergence-driven-bitreverse.ll2025-07-15 07:15 1.5K 
[ ]divergence-driven-buildvector.ll2025-07-15 07:15 27K 
[ ]divergence-driven-ctlz-cttz.ll2025-07-15 07:15 2.6K 
[ ]divergence-driven-ctpop.ll2025-07-15 07:15 2.4K 
[ ]divergence-driven-min-max.ll2025-07-15 07:15 2.3K 
[ ]divergence-driven-negsubinlineconst.ll2025-07-15 07:15 1.4K 
[ ]divergence-driven-not-isel.ll2025-07-15 07:15 1.0K 
[ ]divergence-driven-sext-inreg.ll2025-07-15 07:15 3.4K 
[ ]divergence-driven-trunc-to-i1.ll2025-07-15 07:15 12K 
[ ]divergence-driven-xnor.ll2025-07-15 07:15 1.5K 
[ ]divergent-branch-uniform-condition.ll2025-07-15 07:15 7.8K 
[ ]divrem24-assume.ll2025-07-15 07:15 2.1K 
[ ]do-not-fold-copy.mir2025-07-15 07:15 2.5K 
[ ]do-not-unify-divergent-exit-nodes-with-musttail.ll2025-07-15 07:15 1.5K 
[ ]dpp64_combine.ll2025-07-15 07:15 4.6K 
[ ]dpp64_combine.mir2025-07-15 07:15 2.3K 
[ ]dpp_combine-true16.mir2025-07-15 07:15 1.3K 
[ ]dpp_combine.ll2025-07-15 07:15 4.8K 
[ ]dpp_combine.mir2025-07-15 07:15 37K 
[ ]dpp_combine_gfx11.mir2025-07-15 07:15 40K 
[ ]drop-mem-operand-move-smrd.ll2025-07-15 07:15 2.1K 
[ ]ds-alignment.ll2025-07-15 07:15 42K 
[ ]ds-combine-large-stride.ll2025-07-15 07:15 24K 
[ ]ds-combine-with-dependence.ll2025-07-15 07:15 4.9K 
[ ]ds-negative-offset-addressing-mode-loop.ll2025-07-15 07:15 3.4K 
[ ]ds-sub-offset.ll2025-07-15 07:15 27K 
[ ]ds-vectorization-alignment.ll2025-07-15 07:15 4.0K 
[ ]ds_gws_align.ll2025-07-15 07:15 2.7K 
[ ]ds_read2.ll2025-07-15 07:15 64K 
[ ]ds_read2_offset_order.ll2025-07-15 07:15 1.8K 
[ ]ds_read2_superreg.ll2025-07-15 07:15 10K 
[ ]ds_read2st64.ll2025-07-15 07:15 13K 
[ ]ds_write2.ll2025-07-15 07:15 46K 
[ ]ds_write2st64.ll2025-07-15 07:15 6.8K 
[ ]dst-sel-hazard.mir2025-07-15 07:15 22K 
[ ]dual-source-blend-export.ll2025-07-15 07:15 5.5K 
[ ]dummy-regalloc-priority-advisor.mir2025-07-15 07:15 3.1K 
[ ]dumpcode.ll2025-07-15 07:15 1.3K 
[ ]duplicate-attribute-indirect.ll2025-07-15 07:15 2.2K 
[ ]dwarf-multi-register-use-crash.ll2025-07-15 07:15 9.1K 
[ ]dynamic-vgpr-reserve-stack-for-cwsr.ll2025-07-15 07:15 15K 
[ ]dynamic_stackalloc.ll2025-07-15 07:15 120K 
[ ]early-if-convert-cost.ll2025-07-15 07:15 3.7K 
[ ]early-if-convert.ll2025-07-15 07:15 12K 
[ ]early-inline-alias.ll2025-07-15 07:15 321  
[ ]early-inline.ll2025-07-15 07:15 797  
[ ]early-lis-two-address-partial-def.mir2025-07-15 07:15 3.3K 
[ ]early-tailduplicator-nophis.mir2025-07-15 07:15 1.5K 
[ ]early-tailduplicator-terminator.mir2025-07-15 07:15 1.8K 
[ ]early-term.mir2025-07-15 07:15 9.8K 
[ ]eh_frame.ll2025-07-15 07:15 1.3K 
[ ]elf-header-flags-mach.ll2025-07-15 07:15 16K 
[ ]elf-header-flags-sramecc.ll2025-07-15 07:15 3.1K 
[ ]elf-header-flags-xnack.ll2025-07-15 07:15 927  
[ ]elf-header-osabi.ll2025-07-15 07:15 3.1K 
[ ]elf-notes.ll2025-07-15 07:15 4.2K 
[ ]elf.ll2025-07-15 07:15 1.8K 
[ ]elf.metadata.ll2025-07-15 07:15 1.7K 
[ ]elf.r600.ll2025-07-15 07:15 574  
[ ]eliminate-frame-index-s-add-i32.mir2025-07-15 07:15 99K 
[ ]eliminate-frame-index-s-add-u32.mir2025-07-15 07:15 6.3K 
[ ]eliminate-frame-index-s-mov-b32.mir2025-07-15 07:15 94K 
[ ]eliminate-frame-index-scalar-bit-ops.mir2025-07-15 07:15 10K 
[ ]eliminate-frame-index-v-add-co-u32-wave32.mir2025-07-15 07:15 31K 
[ ]eliminate-frame-index-v-add-co-u32.mir2025-07-15 07:15 195K 
[ ]eliminate-frame-index-v-add-u32.mir2025-07-15 07:15 79K 
[ ]else.ll2025-07-15 07:15 1.9K 
[ ]empty-function.ll2025-07-15 07:15 589  
[ ]enable-no-signed-zeros-fp-math.ll2025-07-15 07:15 1.6K 
[ ]enable-scratch-only-dynamic-stack.ll2025-07-15 07:15 1.0K 
[ ]endcf-loop-header.ll2025-07-15 07:15 1.1K 
[ ]endpgm-dce.mir2025-07-15 07:15 9.4K 
[ ]exceed-max-sgprs.ll2025-07-15 07:15 4.5K 
[ ]exec-mask-opt-cannot-create-empty-or-backward-segment.ll2025-07-15 07:15 6.9K 
[ ]expand-atomicrmw-syncscope.ll2025-07-15 07:15 3.1K 
[ ]expand-scalar-carry-out-select-user.ll2025-07-15 07:15 8.0K 
[ ]expand-si-indirect.mir2025-07-15 07:15 5.4K 
[ ]expand-variadic-call.ll2025-07-15 07:15 29K 
[ ]export-cluster-postra.mir2025-07-15 07:15 3.3K 
[ ]extend-bit-ops-i16.ll2025-07-15 07:15 1.8K 
[ ]extend-phi-subrange-not-in-parent.mir2025-07-15 07:15 3.8K 
[ ]extend-wwm-virt-reg-liveness.mir2025-07-15 07:15 11K 
[ ]extload-align.ll2025-07-15 07:15 1.0K 
[ ]extload-private.ll2025-07-15 07:15 1.7K 
[ ]extload.ll2025-07-15 07:15 2.3K 
[ ]extra-lds-size.ll2025-07-15 07:15 1.5K 
[ ]extra-sroa-after-unroll.ll2025-07-15 07:15 3.3K 
[ ]extract-load-i1.ll2025-07-15 07:15 1.5K 
[ ]extract-lowbits.ll2025-07-15 07:15 8.6K 
[ ]extract-subvector-16bit.ll2025-07-15 07:15 96K 
[ ]extract-subvector-equal-length.ll2025-07-15 07:15 1.1K 
[ ]extract-subvector.ll2025-07-15 07:15 26K 
[ ]extract-vector-elt-build-vector-combine.ll2025-07-15 07:15 4.8K 
[ ]extract_subvector_vec4_vec3.ll2025-07-15 07:15 2.6K 
[ ]extract_vector_dynelt.ll2025-07-15 07:15 46K 
[ ]extract_vector_elt-f16.ll2025-07-15 07:15 45K 
[ ]extract_vector_elt-f64.ll2025-07-15 07:15 2.1K 
[ ]extract_vector_elt-i8.ll2025-07-15 07:15 29K 
[ ]extract_vector_elt-i16.ll2025-07-15 07:15 23K 
[ ]extract_vector_elt-i64.ll2025-07-15 07:15 4.0K 
[ ]extractelt-to-trunc.ll2025-07-15 07:15 6.8K 
[ ]fabs-r600.ll2025-07-15 07:15 5.7K 
[ ]fabs.bf16.ll2025-07-15 07:15 49K 
[ ]fabs.f16.ll2025-07-15 07:15 33K 
[ ]fabs.f64.ll2025-07-15 07:15 6.6K 
[ ]fabs.ll2025-07-15 07:15 8.9K 
[ ]fadd-fma-fmul-combine.ll2025-07-15 07:15 43K 
[ ]fadd.f16.ll2025-07-15 07:15 37K 
[ ]fadd.ll2025-07-15 07:15 2.5K 
[ ]fadd64.ll2025-07-15 07:15 2.0K 
[ ]fast-ra-kills-vcc.mir2025-07-15 07:15 2.5K 
[ ]fast-regalloc-bundles.mir2025-07-15 07:15 1.1K 
[ ]fast-unaligned-load-store.global.ll2025-07-15 07:15 17K 
[ ]fast-unaligned-load-store.private.ll2025-07-15 07:15 24K 
[ ]fastregalloc-illegal-subreg-physreg.mir2025-07-15 07:15 1.2K 
[ ]fastregalloc-self-loop-heuristic.mir2025-07-15 07:15 7.7K 
[ ]fastregalloc-sgpr-only.mir2025-07-15 07:15 1.2K 
[ ]fcanonicalize-elimination.ll2025-07-15 07:15 40K 
[ ]fcanonicalize.f16.ll2025-07-15 07:15 163K 
[ ]fcanonicalize.ll2025-07-15 07:15 131K 
[ ]fceil.ll2025-07-15 07:15 4.8K 
[ ]fceil64.ll2025-07-15 07:15 31K 
[ ]fcmp-cnd.ll2025-07-15 07:15 510  
[ ]fcmp-cnde-int-args.ll2025-07-15 07:15 572  
[ ]fcmp.f16.ll2025-07-15 07:15 215K 
[ ]fcmp.ll2025-07-15 07:15 1.1K 
[ ]fcmp64.ll2025-07-15 07:15 2.8K 
[ ]fconst64.ll2025-07-15 07:15 734  
[ ]fcopysign.bf16.ll2025-07-15 07:15 337K 
[ ]fcopysign.f16.ll2025-07-15 07:15 288K 
[ ]fcopysign.f32.ll2025-07-15 07:15 41K 
[ ]fcopysign.f32.r600.ll2025-07-15 07:15 1.2K 
[ ]fcopysign.f64.ll2025-07-15 07:15 40K 
[ ]fdiv-nofpexcept.ll2025-07-15 07:15 6.3K 
[ ]fdiv.f16.ll2025-07-15 07:15 102K 
[ ]fdiv.f64.ll2025-07-15 07:15 6.7K 
[ ]fdiv.ll2025-07-15 07:15 328K 
[ ]fdiv32-to-rcp-folding.ll2025-07-15 07:15 35K 
[ ]fdiv_flags.f32.ll2025-07-15 07:15 88K 
[ ]fdot2.ll2025-07-15 07:15 16K 
[ ]fence-barrier.ll2025-07-15 07:15 7.5K 
[ ]fence-lds-read2-write2.ll2025-07-15 07:15 3.5K 
[ ]fetch-limits.r600.ll2025-07-15 07:15 3.9K 
[ ]fetch-limits.r700+.ll2025-07-15 07:15 7.1K 
[ ]ffloor.f64.ll2025-07-15 07:15 4.3K 
[ ]ffloor.ll2025-07-15 07:15 1.5K 
[ ]finalize-isel-kill-scc-vcc.mir2025-07-15 07:15 3.8K 
[ ]fix-crash-valu-hazard.ll2025-07-15 07:15 2.9K 
[ ]fix-frame-ptr-reg-copy-livein.ll2025-07-15 07:15 2.0K 
[ ]fix-frame-reg-in-custom-csr-spills.ll2025-07-15 07:15 3.8K 
[ ]fix-sgpr-copies-f16-fake16.mir2025-07-15 07:15 2.3K 
[ ]fix-sgpr-copies-f16-gfx12-fake16.mir2025-07-15 07:15 3.8K 
[ ]fix-sgpr-copies-f16-gfx12-true16.mir2025-07-15 07:15 3.8K 
[ ]fix-sgpr-copies-f16-true16.mir2025-07-15 07:15 14K 
[ ]fix-sgpr-copies-f16.mir2025-07-15 07:15 4.2K 
[ ]fix-sgpr-copies-nondeterminism.ll2025-07-15 07:15 1.9K 
[ ]fix-sgpr-copies-phi-block-end-iterator-debugloc.ll2025-07-15 07:15 1.9K 
[ ]fix-sgpr-copies-phi-regression-issue130646-issue130119.ll2025-07-15 07:15 6.4K 
[ ]fix-sgpr-copies-phi-regression-issue130646.mir2025-07-15 07:15 3.8K 
[ ]fix-sgpr-copies-vgpr16-to-spgr32.ll2025-07-15 07:15 1.5K 
[ ]fix-sgpr-copies-wwm.ll2025-07-15 07:15 1.4K 
[ ]fix-sgpr-copies-wwm.mir2025-07-15 07:15 1.6K 
[ ]fix-sgpr-copies.mir2025-07-15 07:15 7.5K 
[ ]fix-vgpr-copies.mir2025-07-15 07:15 1.5K 
[ ]fix-wwm-vgpr-copy.ll2025-07-15 07:15 3.8K 
[ ]flat-address-space.ll2025-07-15 07:15 10K 
[ ]flat-atomic-fadd.f32.ll2025-07-15 07:15 7.7K 
[ ]flat-atomic-fadd.f64.ll2025-07-15 07:15 12K 
[ ]flat-atomicrmw-fadd.ll2025-07-15 07:15 1.0M 
[ ]flat-atomicrmw-fmax.ll2025-07-15 07:15 933K 
[ ]flat-atomicrmw-fmin.ll2025-07-15 07:15 933K 
[ ]flat-atomicrmw-fsub.ll2025-07-15 07:15 886K 
[ ]flat-error-unsupported-gpu-hsa.ll2025-07-15 07:15 903  
[ ]flat-for-global-subtarget-feature.ll2025-07-15 07:15 2.2K 
[ ]flat-load-clustering.mir2025-07-15 07:15 3.5K 
[ ]flat-offset-bug.ll2025-07-15 07:15 13K 
[ ]flat-scratch-fold-fi.mir2025-07-15 07:15 3.6K 
[ ]flat-scratch-i8-i16.ll2025-07-15 07:15 52K 
[ ]flat-scratch-init.ll2025-07-15 07:15 10K 
[ ]flat-scratch-reg.ll2025-07-15 07:15 6.9K 
[ ]flat-scratch-svs.ll2025-07-15 07:15 83K 
[ ]flat-scratch.ll2025-07-15 07:15 243K 
[ ]flat_atomics.ll2025-07-15 07:15 405K 
[ ]flat_atomics_i32_system.ll2025-07-15 07:15 313K 
[ ]flat_atomics_i64.ll2025-07-15 07:15 677K 
[ ]flat_atomics_i64_noprivate.ll2025-07-15 07:15 264K 
[ ]flat_atomics_i64_system.ll2025-07-15 07:15 1.0M 
[ ]flat_atomics_i64_system_noprivate.ll2025-07-15 07:15 373K 
[ ]floor.ll2025-07-15 07:15 501  
[ ]fma-combine.ll2025-07-15 07:15 101K 
[ ]fma.f16.ll2025-07-15 07:15 38K 
[ ]fma.f64.ll2025-07-15 07:15 11K 
[ ]fma.ll2025-07-15 07:15 8.4K 
[ ]fmac.sdwa.ll2025-07-15 07:15 4.6K 
[ ]fmad-formation-fmul-distribute-denormal-mode.ll2025-07-15 07:15 12K 
[ ]fmad.ll2025-07-15 07:15 657  
[ ]fmax.ll2025-07-15 07:15 566  
[ ]fmax3-maximumnum.ll2025-07-15 07:15 163K 
[ ]fmax3.f64.ll2025-07-15 07:15 1.6K 
[ ]fmax3.ll2025-07-15 07:15 35K 
[ ]fmax_legacy.f16.ll2025-07-15 07:15 35K 
[ ]fmax_legacy.f64.ll2025-07-15 07:15 8.2K 
[ ]fmax_legacy.ll2025-07-15 07:15 8.3K 
[ ]fmaximum.ll2025-07-15 07:15 16K 
[ ]fmaximum3.ll2025-07-15 07:15 165K 
[ ]fmaxnum.f64.ll2025-07-15 07:15 2.5K 
[ ]fmaxnum.ll2025-07-15 07:15 7.9K 
[ ]fmaxnum.r600.ll2025-07-15 07:15 7.8K 
[ ]fmed3-cast-combine.ll2025-07-15 07:15 56K 
[ ]fmed3.bf16.ll2025-07-15 07:15 13K 
[ ]fmed3.ll2025-07-15 07:15 393K 
[ ]fmin.ll2025-07-15 07:15 566  
[ ]fmin3-minimumnum.ll2025-07-15 07:15 164K 
[ ]fmin3.ll2025-07-15 07:15 49K 
[ ]fmin_fmax_legacy.amdgcn.ll2025-07-15 07:15 8.2K 
[ ]fmin_legacy.f16.ll2025-07-15 07:15 35K 
[ ]fmin_legacy.f64.ll2025-07-15 07:15 16K 
[ ]fmin_legacy.ll2025-07-15 07:15 11K 
[ ]fminimum.ll2025-07-15 07:15 16K 
[ ]fminimum3.ll2025-07-15 07:15 165K 
[ ]fminnum.f64.ll2025-07-15 07:15 4.3K 
[ ]fminnum.ll2025-07-15 07:15 8.0K 
[ ]fminnum.r600.ll2025-07-15 07:15 7.8K 
[ ]fmul-2-combine-multi-use.ll2025-07-15 07:15 52K 
[ ]fmul-to-ldexp.ll2025-07-15 07:15 364K 
[ ]fmul.f16.ll2025-07-15 07:15 31K 
[ ]fmul.ll2025-07-15 07:15 2.7K 
[ ]fmul64.ll2025-07-15 07:15 1.9K 
[ ]fmuladd.f16.ll2025-07-15 07:15 193K 
[ ]fmuladd.f32.ll2025-07-15 07:15 29K 
[ ]fmuladd.f64.ll2025-07-15 07:15 34K 
[ ]fmuladd.v2f16.ll2025-07-15 07:15 7.3K 
[ ]fnearbyint.ll2025-07-15 07:15 17K 
[ ]fneg-combines-gfx1200.ll2025-07-15 07:15 12K 
[ ]fneg-combines.f16.ll2025-07-15 07:15 270K 
[ ]fneg-combines.legal.f16.ll2025-07-15 07:15 6.7K 
[ ]fneg-combines.ll2025-07-15 07:15 331K 
[ ]fneg-combines.new.ll2025-07-15 07:15 173K 
[TXT]fneg-combines.si.ll2025-07-15 07:15 1.4K 
[ ]fneg-fabs-divergence-driven-isel.ll2025-07-15 07:15 22K 
[ ]fneg-fabs-r600.ll2025-07-15 07:15 6.7K 
[ ]fneg-fabs.bf16.ll2025-07-15 07:15 43K 
[ ]fneg-fabs.f16.ll2025-07-15 07:15 30K 
[ ]fneg-fabs.f64.ll2025-07-15 07:15 11K 
[ ]fneg-fabs.ll2025-07-15 07:15 9.7K 
[ ]fneg-fold-legalize-dag-increase-insts.ll2025-07-15 07:15 2.0K 
[ ]fneg-modifier-casting.ll2025-07-15 07:15 77K 
[ ]fneg.bf16.ll2025-07-15 07:15 40K 
[ ]fneg.f16.ll2025-07-15 07:15 30K 
[ ]fneg.f64.ll2025-07-15 07:15 2.2K 
[ ]fneg.ll2025-07-15 07:15 27K 
[ ]fold-agpr-phis.mir2025-07-15 07:15 42K 
[ ]fold-cndmask-wave32.mir2025-07-15 07:15 776  
[ ]fold-cndmask.mir2025-07-15 07:15 1.1K 
[ ]fold-fabs.ll2025-07-15 07:15 8.7K 
[ ]fold-fi-mubuf.mir2025-07-15 07:15 11K 
[ ]fold-fi-operand-shrink.mir2025-07-15 07:15 8.8K 
[ ]fold-fmaak-bug.ll2025-07-15 07:15 1.1K 
[ ]fold-fmul-to-neg-abs.ll2025-07-15 07:15 1.3K 
[ ]fold-freeze-fmul-to-fma.ll2025-07-15 07:15 4.9K 
[ ]fold-gep-offset.ll2025-07-15 07:15 7.0K 
[ ]fold-imm-copy-agpr.mir2025-07-15 07:15 4.2K 
[ ]fold-imm-copy.mir2025-07-15 07:15 31K 
[ ]fold-imm-f16-f32.mir2025-07-15 07:15 26K 
[ ]fold-immediate-operand-shrink-with-carry.mir2025-07-15 07:15 4.2K 
[ ]fold-immediate-operand-shrink.mir2025-07-15 07:15 23K 
[ ]fold-immediate-output-mods.mir2025-07-15 07:15 10K 
[ ]fold-implicit-operand.mir2025-07-15 07:15 424  
[ ]fold-int-pow2-with-fmul-or-fdiv.ll2025-07-15 07:15 87K 
[ ]fold-literal-multiple-gfx10.mir2025-07-15 07:15 2.8K 
[ ]fold-multiple-commute.mir2025-07-15 07:15 1.3K 
[ ]fold-multiple.mir2025-07-15 07:15 1.3K 
[ ]fold-omod-crash.mir2025-07-15 07:15 2.1K 
[ ]fold-operands-frame-index.gfx10.mir2025-07-15 07:15 4.4K 
[ ]fold-operands-frame-index.mir2025-07-15 07:15 25K 
[ ]fold-operands-order.mir2025-07-15 07:15 924  
[ ]fold-operands-remove-m0-redef.mir2025-07-15 07:15 14K 
[ ]fold-operands-s-add-copy-to-vgpr.mir2025-07-15 07:15 24K 
[ ]fold-operands-scalar-fmac.mir2025-07-15 07:15 8.9K 
[ ]fold-over-exec.mir2025-07-15 07:15 1.2K 
[ ]fold-readlane.mir2025-07-15 07:15 12K 
[ ]fold-reload-into-exec.mir2025-07-15 07:15 6.9K 
[ ]fold-reload-into-m0.mir2025-07-15 07:15 2.3K 
[ ]fold-restore-undef-use.mir2025-07-15 07:15 4.8K 
[ ]fold-sgpr-copy.mir2025-07-15 07:15 1.3K 
[ ]fold-sgpr-multi-imm.mir2025-07-15 07:15 7.2K 
[ ]fold-short-64-bit-literals.mir2025-07-15 07:15 20K 
[ ]fold-vgpr-copy.mir2025-07-15 07:15 2.4K 
[ ]fold-vgpr-phyreg.mir2025-07-15 07:15 2.4K 
[ ]fold-zero-high-bits-clear-kill-flags.mir2025-07-15 07:15 2.6K 
[ ]fold-zero-high-bits-skips-non-reg.mir2025-07-15 07:15 898  
[ ]fold_acc_copy_into_valu.mir2025-07-15 07:15 513  
[ ]folding-of-i32-as-i64.mir2025-07-15 07:15 4.5K 
[ ]force-alwaysinline-lds-global-address-codegen.ll2025-07-15 07:15 874  
[ ]force-alwaysinline-lds-global-address.ll2025-07-15 07:15 3.4K 
[ ]force-wait-after-always-gds.mir2025-07-15 07:15 962  
[ ]fp-atomic-to-s_denormmode.mir2025-07-15 07:15 15K 
[ ]fp-atomics-gfx942.ll2025-07-15 07:15 7.6K 
[ ]fp-atomics-gfx950.ll2025-07-15 07:15 4.8K 
[ ]fp-atomics-gfx1200.ll2025-07-15 07:15 9.3K 
[ ]fp-classify.ll2025-07-15 07:15 28K 
[ ]fp-min-max-buffer-atomics.ll2025-07-15 07:15 30K 
[ ]fp-min-max-buffer-ptr-atomics.ll2025-07-15 07:15 28K 
[ ]fp-min-max-image-atomics.ll2025-07-15 07:15 5.7K 
[ ]fp-min-max-num-flat-atomics.ll2025-07-15 07:15 2.3K 
[ ]fp-min-max-num-global-atomics.ll2025-07-15 07:15 2.4K 
[ ]fp16_to_fp32.ll2025-07-15 07:15 5.3K 
[ ]fp16_to_fp64.ll2025-07-15 07:15 4.0K 
[ ]fp32_to_fp16.ll2025-07-15 07:15 5.1K 
[ ]fp64-atomics-gfx90a.ll2025-07-15 07:15 72K 
[ ]fp64-min-max-buffer-atomics.ll2025-07-15 07:15 22K 
[ ]fp64-min-max-buffer-ptr-atomics.ll2025-07-15 07:15 22K 
[ ]fp_to_sint.f64.ll2025-07-15 07:15 2.8K 
[ ]fp_to_sint.ll2025-07-15 07:15 34K 
[ ]fp_to_uint.f64.ll2025-07-15 07:15 3.3K 
[ ]fp_to_uint.ll2025-07-15 07:15 30K 
[ ]fp_trunc_store_fp32_to_bf16.ll2025-07-15 07:15 21K 
[ ]fp_trunc_store_fp64_to_bf16.ll2025-07-15 07:15 28K 
[ ]fpenv.ll2025-07-15 07:15 17K 
[ ]fpext-free.ll2025-07-15 07:15 41K 
[ ]fpext.f16.ll2025-07-15 07:15 51K 
[ ]fpext.ll2025-07-15 07:15 1.9K 
[ ]fpow.ll2025-07-15 07:15 46K 
[ ]fptoi.i128.ll2025-07-15 07:15 96K 
[ ]fptosi.f16.ll2025-07-15 07:15 26K 
[ ]fptoui.f16.ll2025-07-15 07:15 25K 
[ ]fptrunc.f16.ll2025-07-15 07:15 89K 
[ ]fptrunc.ll2025-07-15 07:15 47K 
[ ]fptrunc.v2f16.no.fast.math.ll2025-07-15 07:15 22K 
[ ]fract-match.ll2025-07-15 07:15 168K 
[ ]fract.f64.ll2025-07-15 07:15 4.9K 
[ ]fract.ll2025-07-15 07:15 3.0K 
[ ]frame-index-elimination-tied-operand.mir2025-07-15 07:15 1.9K 
[ ]frame-index-elimination.ll2025-07-15 07:15 22K 
[ ]frame-index.mir2025-07-15 07:15 60K 
[ ]frame-lowering-entry-all-sgpr-used.mir2025-07-15 07:15 1.6K 
[ ]frame-lowering-fp-adjusted.mir2025-07-15 07:15 1.4K 
[ ]frame-setup-without-sgpr-to-vgpr-spills.ll2025-07-15 07:15 5.7K 
[ ]freeze-binary.ll2025-07-15 07:15 10K 
[ ]freeze.ll2025-07-15 07:15 695K 
[ ]frem.ll2025-07-15 07:15 271K 
[ ]frexp-constant-fold.ll2025-07-15 07:15 12K 
[ ]fshl.ll2025-07-15 07:15 29K 
[ ]fshr.ll2025-07-15 07:15 93K 
[ ]fsqrt.f32.ll2025-07-15 07:15 213K 
[ ]fsqrt.f64.ll2025-07-15 07:15 62K 
[ ]fsqrt.r600.ll2025-07-15 07:15 9.2K 
[ ]fsub-as-fneg-src-modifier.ll2025-07-15 07:15 52K 
[ ]fsub.f16.ll2025-07-15 07:15 22K 
[ ]fsub.ll2025-07-15 07:15 5.7K 
[ ]fsub64.ll2025-07-15 07:15 4.4K 
[ ]ftrunc.f64.ll2025-07-15 07:15 3.8K 
[ ]ftrunc.ll2025-07-15 07:15 3.3K 
[ ]function-args-inreg.ll2025-07-15 07:15 94K 
[ ]function-args.ll2025-07-15 07:15 214K 
[ ]function-call-relocs.ll2025-07-15 07:15 2.1K 
[ ]function-resource-usage.ll2025-07-15 07:15 34K 
[ ]function-returns.ll2025-07-15 07:15 111K 
[ ]fused-bitlogic.ll2025-07-15 07:15 12K 
[ ]gcn-reg-pressure-true16-integer-overflow.mir2025-07-15 07:15 2.8K 
[ ]gds-allocation.ll2025-07-15 07:15 5.2K 
[ ]gds-atomic.ll2025-07-15 07:15 5.3K 
[ ]gds-unsupported.ll2025-07-15 07:15 467  
[ ]generic-targets-require-v6.ll2025-07-15 07:15 1.8K 
[ ]gep-address-space.ll2025-07-15 07:15 3.0K 
[ ]gep-const-address-space.ll2025-07-15 07:15 3.3K 
[ ]gep-flags-stack-offsets.ll2025-07-15 07:15 7.9K 
[ ]gfx-call-non-gfx-func.ll2025-07-15 07:15 9.9K 
[ ]gfx-callable-argument-types.ll2025-07-15 07:15 871K 
[ ]gfx-callable-preserved-registers.ll2025-07-15 07:15 52K 
[ ]gfx-callable-return-types.ll2025-07-15 07:15 195K 
[ ]gfx10-twoaddr-fma.mir2025-07-15 07:15 7.0K 
[ ]gfx10-vop-literal.ll2025-07-15 07:15 3.1K 
[ ]gfx11-twoaddr-fma.mir2025-07-15 07:15 4.1K 
[ ]gfx11-user-sgpr-init16-bug.ll2025-07-15 07:15 10K 
[ ]gfx12_scalar_subword_loads.ll2025-07-15 07:15 26K 
[ ]gfx90a-enc.ll2025-07-15 07:15 2.0K 
[ ]gfx902-without-xnack.ll2025-07-15 07:15 380  
[ ]gfx942-hazards.mir2025-07-15 07:15 7.6K 
[ ]global-alias.ll2025-07-15 07:15 1.9K 
[ ]global-atomic-fadd.f32-no-rtn.ll2025-07-15 07:15 19K 
[ ]global-atomic-fadd.f32-rtn.ll2025-07-15 07:15 23K 
[ ]global-atomic-fadd.f64.ll2025-07-15 07:15 11K 
[ ]global-atomic-fadd.v2f16-no-rtn.ll2025-07-15 07:15 8.0K 
[ ]global-atomic-fadd.v2f16-rtn.ll2025-07-15 07:15 5.4K 
[ ]global-atomic-scan.ll2025-07-15 07:15 71K 
[ ]global-atomicrmw-fadd-wrong-subtarget.ll2025-07-15 07:15 3.3K 
[ ]global-atomicrmw-fadd.ll2025-07-15 07:15 1.1M 
[ ]global-atomicrmw-fmax.ll2025-07-15 07:15 928K 
[ ]global-atomicrmw-fmin.ll2025-07-15 07:15 928K 
[ ]global-atomicrmw-fsub.ll2025-07-15 07:15 921K 
[ ]global-atomics-fp-wrong-subtarget.ll2025-07-15 07:15 1.8K 
[ ]global-constant.ll2025-07-15 07:15 3.1K 
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[ ]global-extload-i16.ll2025-07-15 07:15 11K 
[ ]global-i16-load-store.ll2025-07-15 07:15 9.8K 
[ ]global-load-saddr-to-vaddr.ll2025-07-15 07:15 3.7K 
[ ]global-load-xcnt.ll2025-07-15 07:15 29K 
[ ]global-saddr-atomics-min-max-system.ll2025-07-15 07:15 159K 
[ ]global-saddr-atomics.gfx908.ll2025-07-15 07:15 3.0K 
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[ ]global-saddr-load.ll2025-07-15 07:15 206K 
[ ]global-saddr-store.ll2025-07-15 07:15 56K 
[ ]global-smrd-unknown.ll2025-07-15 07:15 851  
[ ]global-variable-relocs.ll2025-07-15 07:15 7.9K 
[ ]global_atomic_optimizer_fp_rtn.ll2025-07-15 07:15 151K 
[ ]global_atomics.ll2025-07-15 07:15 345K 
[ ]global_atomics_i32_system.ll2025-07-15 07:15 356K 
[ ]global_atomics_i64.ll2025-07-15 07:15 281K 
[ ]global_atomics_i64_system.ll2025-07-15 07:15 400K 
[ ]global_atomics_iterative_scan.ll2025-07-15 07:15 7.5K 
[ ]global_atomics_iterative_scan_fp.ll2025-07-15 07:15 15K 
[ ]global_atomics_optimizer_fp_no_rtn.ll2025-07-15 07:15 114K 
[ ]global_atomics_scan_fadd.ll2025-07-15 07:15 614K 
[ ]global_atomics_scan_fmax.ll2025-07-15 07:15 356K 
[ ]global_atomics_scan_fmin.ll2025-07-15 07:15 356K 
[ ]global_atomics_scan_fsub.ll2025-07-15 07:15 597K 
[ ]global_smrd.ll2025-07-15 07:15 5.7K 
[ ]global_smrd_cfg.ll2025-07-15 07:15 3.8K 
[ ]greedy-alloc-fail-sgpr1024-spill.mir2025-07-15 07:15 13K 
[ ]greedy-broken-ssa-verifier-error.mir2025-07-15 07:15 1.2K 
[ ]greedy-global-heuristic.mir2025-07-15 07:15 8.9K 
[ ]greedy-instruction-split-subrange.mir2025-07-15 07:15 4.1K 
[ ]greedy-liverange-priority.mir2025-07-15 07:15 3.9K 
[ ]greedy-remark-crash-unassigned-reg.mir2025-07-15 07:15 1.2K 
[ ]greedy-reverse-local-assignment.ll2025-07-15 07:15 2.8K 
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[ ]gv-const-addrspace.ll2025-07-15 07:15 3.3K 
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[ ]gws-hazards.mir2025-07-15 07:15 4.9K 
[ ]half-alloca-promotion.ll2025-07-15 07:15 461  
[ ]half.ll2025-07-15 07:15 145K 
[ ]hard-clause-limit-attr.mir2025-07-15 07:15 20K 
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[ ]hazard-pass-ordering.mir2025-07-15 07:15 949  
[ ]hazard-pseudo-machineinstrs.mir2025-07-15 07:15 2.5K 
[ ]hazard-recognizer-meta-insts.mir2025-07-15 07:15 1.5K 
[ ]hazard-recognizer-src-shared-base.ll2025-07-15 07:15 789  
[ ]hazard-shift64.mir2025-07-15 07:15 13K 
[ ]hazard.mir2025-07-15 07:15 5.0K 
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[ ]hsa-func-align.ll2025-07-15 07:15 574  
[ ]hsa-func.ll2025-07-15 07:15 2.4K 
[ ]hsa-generic-target-features.ll2025-07-15 07:15 2.4K 
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[ ]hsa-metadata-agpr-register-count.ll2025-07-15 07:15 3.0K 
[ ]hsa-metadata-agpr-small.ll2025-07-15 07:15 1.5K 
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[ ]hsa-metadata-hostcall-present-asan.ll2025-07-15 07:15 1.8K 
[ ]hsa-metadata-hostcall-v4.ll2025-07-15 07:15 9.5K 
[ ]hsa-metadata-hostcall-v5.ll2025-07-15 07:15 9.3K 
[ ]hsa-metadata-images.ll2025-07-15 07:15 4.4K 
[ ]hsa-metadata-invalid-ocl-version-1.ll2025-07-15 07:15 367  
[ ]hsa-metadata-invalid-ocl-version-3.ll2025-07-15 07:15 383  
[ ]hsa-metadata-kernel-code-props.ll2025-07-15 07:15 8.0K 
[ ]hsa-metadata-multigrid-sync-arg-v5.ll2025-07-15 07:15 9.5K 
[ ]hsa-metadata-queue-ptr-v4.ll2025-07-15 07:15 4.7K 
[ ]hsa-metadata-queue-ptr-v5.ll2025-07-15 07:15 4.3K 
[ ]hsa-metadata-queueptr-v5.ll2025-07-15 07:15 9.1K 
[ ]hsa-metadata-resource-usage-function-ordering.ll2025-07-15 07:15 4.5K 
[ ]hsa-metadata-uniform-workgroup-size-v5.ll2025-07-15 07:15 1.0K 
[ ]hsa-metadata-wavefrontsize.ll2025-07-15 07:15 691  
[ ]hsa-metadata-workgroup-processor-mode-v5.ll2025-07-15 07:15 729  
[ ]hsa-note-no-func.ll2025-07-15 07:15 4.8K 
[ ]hsa.ll2025-07-15 07:15 5.4K 
[ ]huge-number-operand-folds.mir2025-07-15 07:15 4.0K 
[ ]huge-private-buffer.ll2025-07-15 07:15 4.3K 
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[ ]i1-copy-implicit-def.ll2025-07-15 07:15 844  
[ ]i1-copy-phi-uniform-branch.ll2025-07-15 07:15 968  
[ ]i1-copy-phi.ll2025-07-15 07:15 1.6K 
[ ]i1-divergent-phi-fix-sgpr-copies-assert.mir2025-07-15 07:15 4.3K 
[ ]i1-to-bf16.ll2025-07-15 07:15 128K 
[ ]i1_copy_phi_with_phi_incoming_value.mir2025-07-15 07:15 6.2K 
[ ]i8-to-double-to-float.ll2025-07-15 07:15 352  
[ ]icmp-select-sete-reverse-args.ll2025-07-15 07:15 658  
[ ]icmp.i16.ll2025-07-15 07:15 76K 
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[ ]idemponent-atomics.ll2025-07-15 07:15 11K 
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[ ]idiv-licm.ll2025-07-15 07:15 44K 
[ ]idot2.ll2025-07-15 07:15 123K 
[ ]idot4s.ll2025-07-15 07:15 149K 
[ ]idot4u.ll2025-07-15 07:15 266K 
[ ]idot8s.ll2025-07-15 07:15 144K 
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[ ]iglp-no-clobber.ll2025-07-15 07:15 3.1K 
[ ]iglp.opt.reentry.ll2025-07-15 07:15 787  
[ ]illegal-eviction-assert.mir2025-07-15 07:15 1.7K 
[ ]illegal-sgpr-to-vgpr-copy.ll2025-07-15 07:15 2.9K 
[ ]image-attributes.ll2025-07-15 07:15 6.9K 
[ ]image-load-d16-tfe.ll2025-07-15 07:15 26K 
[ ]image-resource-id.ll2025-07-15 07:15 14K 
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[ ]image-schedule.ll2025-07-15 07:15 2.6K 
[ ]img-nouse-adjust.ll2025-07-15 07:15 1.2K 
[ ]imm.ll2025-07-15 07:15 63K 
[ ]imm16.ll2025-07-15 07:15 138K 
[ ]immv216.ll2025-07-15 07:15 28K 
[ ]implicit-arg-v5-opt.ll2025-07-15 07:15 10K 
[ ]implicit-def-muse.ll2025-07-15 07:15 834  
[ ]implicit-kernarg-backend-usage.ll2025-07-15 07:15 15K 
[ ]implicit-kernel-argument-alignment.ll2025-07-15 07:15 2.3K 
[ ]implicitarg-attributes.ll2025-07-15 07:15 3.8K 
[ ]implicitarg-offset-attributes.ll2025-07-15 07:15 19K 
[ ]indirect-addressing-si-gfx9.ll2025-07-15 07:15 842  
[ ]indirect-addressing-si.ll2025-07-15 07:15 468K 
[ ]indirect-addressing-term.ll2025-07-15 07:15 7.3K 
[ ]indirect-call-known-callees.ll2025-07-15 07:15 4.2K 
[ ]indirect-call-set-from-other-function.ll2025-07-15 07:15 2.8K 
[ ]indirect-call.ll2025-07-15 07:15 57K 
[ ]indirect-private-64.ll2025-07-15 07:15 4.9K 
[ ]infer-addrpace-pipeline.ll2025-07-15 07:15 291  
[ ]infer-addrspace-flat-atomic.ll2025-07-15 07:15 8.2K 
[ ]infer-uniform-load-shader.ll2025-07-15 07:15 1.0K 
[ ]infinite-loop-evergreen.ll2025-07-15 07:15 194  
[ ]infinite-loop.ll2025-07-15 07:15 7.6K 
[ ]inflate-av-remat-imm.mir2025-07-15 07:15 4.8K 
[ ]inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir2025-07-15 07:15 14K 
[ ]inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir2025-07-15 07:15 69K 
[ ]inflate-reg-class-vgpr-mfma-to-av.mir2025-07-15 07:15 20K 
[ ]inflated-reg-class-snippet-copy-use-after-free.mir2025-07-15 07:15 13K 
[ ]infloop-subrange-spill-inspect-subrange.mir2025-07-15 07:15 10K 
[ ]infloop-subrange-spill.mir2025-07-15 07:15 10K 
[ ]inline-asm-reserved-regs.ll2025-07-15 07:15 2.2K 
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[ ]inline-asm.ll2025-07-15 07:15 10K 
[ ]inline-attr.ll2025-07-15 07:15 3.4K 
[ ]inline-calls.ll2025-07-15 07:15 945  
[ ]inline-constraints.ll2025-07-15 07:15 44K 
[ ]inline-maxbb.ll2025-07-15 07:15 1.7K 
[ ]inlineasm-16-fake16.ll2025-07-15 07:15 2.4K 
[ ]inlineasm-16-true16.ll2025-07-15 07:15 2.8K 
[ ]inlineasm-16.ll2025-07-15 07:15 1.5K 
[ ]inlineasm-illegal-type.ll2025-07-15 07:15 2.2K 
[ ]inlineasm-mismatched-size-error.ll2025-07-15 07:15 5.3K 
[ ]inlineasm-mismatched-size.ll2025-07-15 07:15 5.2K 
[ ]inlineasm-packed.ll2025-07-15 07:15 2.1K 
[ ]inlineasm-v16.ll2025-07-15 07:15 4.5K 
[ ]input-mods.r600.ll2025-07-15 07:15 2.1K 
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[ ]insert-delay-alu-bug.ll2025-07-15 07:15 9.8K 
[ ]insert-delay-alu-literal.mir2025-07-15 07:15 7.7K 
[ ]insert-delay-alu-parse.mir2025-07-15 07:15 7.2K 
[ ]insert-delay-alu.mir2025-07-15 07:15 22K 
[ ]insert-handle-flat-vmem-ds.mir2025-07-15 07:15 2.6K 
[ ]insert-skip-from-vcc.mir2025-07-15 07:15 15K 
[ ]insert-skips-gfx10.mir2025-07-15 07:15 5.8K 
[ ]insert-skips-gfx12.mir2025-07-15 07:15 12K 
[ ]insert-skips-gws.mir2025-07-15 07:15 1.8K 
[ ]insert-skips-ignored-insts.mir2025-07-15 07:15 1.4K 
[ ]insert-subvector-unused-scratch.ll2025-07-15 07:15 1.0K 
[ ]insert-waitcnts-callee.mir2025-07-15 07:15 610  
[ ]insert-waitcnts-crash.ll2025-07-15 07:15 3.6K 
[ ]insert-waitcnts-exp.mir2025-07-15 07:15 2.5K 
[ ]insert-waitcnts-gfx12-wbinv.mir2025-07-15 07:15 4.7K 
[ ]insert-waitcnts-hang.mir2025-07-15 07:15 3.0K 
[ ]insert_subreg.ll2025-07-15 07:15 577  
[ ]insert_vector_dynelt.ll2025-07-15 07:15 73K 
[ ]insert_vector_elt.ll2025-07-15 07:15 87K 
[ ]insert_vector_elt.v2bf16.ll2025-07-15 07:15 74K 
[ ]insert_vector_elt.v2i16.ll2025-07-15 07:15 147K 
[ ]insert_vector_elt.v2i16.subtest-nosaddr.ll2025-07-15 07:15 1.8K 
[ ]insert_vector_elt.v2i16.subtest-saddr.ll2025-07-15 07:15 1.6K 
[ ]insert_waitcnt_for_precise_memory.ll2025-07-15 07:15 65K 
[ ]inserted-wait-states.mir2025-07-15 07:15 10K 
[ ]inst-prefetch-hint.ll2025-07-15 07:15 1.0K 
[ ]integer-mad-patterns.ll2025-07-15 07:15 494K 
[ ]internalize.ll2025-07-15 07:15 2.2K 
[ ]invalid-addrspacecast.ll2025-07-15 07:15 2.6K 
[ ]invalid-cast-load-i1.ll2025-07-15 07:15 1.7K 
[ ]invalid-hidden-kernarg-in-kernel-signature.ll2025-07-15 07:15 2.6K 
[ ]invalid-inline-asm-constraint-crash.ll2025-07-15 07:15 1.4K 
[ ]invariant-image-load.ll2025-07-15 07:15 1.5K 
[ ]invariant-load-no-alias-store.ll2025-07-15 07:15 1.7K 
[ ]invert-br-undef-vcc.mir2025-07-15 07:15 2.7K 
[ ]ipra-regmask.ll2025-07-15 07:15 6.0K 
[ ]ipra-return-address-save-restore.ll2025-07-15 07:15 11K 
[ ]ipra.ll2025-07-15 07:15 3.4K 
[ ]isel-amdgcn-cs-chain-intrinsic-w32.ll2025-07-15 07:15 76K 
[ ]isel-amdgcn-cs-chain-intrinsic-w64.ll2025-07-15 07:15 77K 
[ ]isel-amdgpu-cs-chain-cc.ll2025-07-15 07:15 277K 
[ ]isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll2025-07-15 07:15 25K 
[ ]isel-amdgpu-cs-chain-preserve-cc.ll2025-07-15 07:15 127K 
[ ]issue48473.mir2025-07-15 07:15 5.5K 
[ ]issue92561-restore-undef-scc-verifier-error.ll2025-07-15 07:15 8.0K 
[ ]issue98474-assigned-physreg-interference.mir2025-07-15 07:15 2.5K 
[ ]issue98474-need-live-out-undef-subregister-def.ll2025-07-15 07:15 1.5K 
[ ]issue98474-virtregrewriter-live-out-undef-subregisters.mir2025-07-15 07:15 16K 
[ ]issue120256-annotate-constexpr-addrspacecast.ll2025-07-15 07:15 4.1K 
[ ]issue121601-combine-concat-vectors-assumes-f16.ll2025-07-15 07:15 921  
[ ]issue130120-eliminate-frame-index.ll2025-07-15 07:15 9.7K 
[ ]issue139317-bad-opsel-reg-sequence-fold.ll2025-07-15 07:15 3.0K 
[ ]itofp.i128.bf.ll2025-07-15 07:15 12K 
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[ ]kernel-vgpr-spill-mubuf-with-voffset.ll2025-07-15 07:15 3.7K 
[ ]kernel_code_t_recurse.ll2025-07-15 07:15 588  
[ ]kill-infinite-loop.ll2025-07-15 07:15 6.1K 
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[ ]large-constant-initializer.ll2025-07-15 07:15 528  
[ ]large-work-group-promote-alloca.ll2025-07-15 07:15 14K 
[ ]lcssa-optnone.ll2025-07-15 07:15 541  
[ ]lds-alignment.ll2025-07-15 07:15 12K 
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[ ]lds-direct-hazards-gfx11.mir2025-07-15 07:15 22K 
[ ]lds-direct-hazards-gfx12.mir2025-07-15 07:15 21K 
[ ]lds-dma-hazards.mir2025-07-15 07:15 1.3K 
[ ]lds-dma-waitcnt.mir2025-07-15 07:15 4.9K 
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[ ]lds-frame-extern.ll2025-07-15 07:15 27K 
[ ]lds-global-non-entry-func.ll2025-07-15 07:15 23K 
[ ]lds-initializer.ll2025-07-15 07:15 558  
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[ ]lds-oqap-crash.ll2025-07-15 07:15 1.1K 
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[ ]lds-reject-anonymous-kernels.ll2025-07-15 07:15 451  
[ ]lds-reject-mixed-absolute-addresses.ll2025-07-15 07:15 536  
[ ]lds-relocs.ll2025-07-15 07:15 2.3K 
[ ]lds-run-twice-absolute-md.ll2025-07-15 07:15 553  
[ ]lds-run-twice.ll2025-07-15 07:15 608  
[ ]lds-size-hsa-gfx950.ll2025-07-15 07:15 1.4K 
[ ]lds-size-pal-gfx950.ll2025-07-15 07:15 819  
[ ]lds-size.ll2025-07-15 07:15 1.1K 
[ ]lds-zero-initializer.ll2025-07-15 07:15 2.1K 
[ ]legalize-amdgcn.dead.mir2025-07-15 07:15 1.5K 
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[ ]legalize-amdgcn.raw.buffer.store.format.f16.ll2025-07-15 07:15 47K 
[ ]legalize-amdgcn.raw.buffer.store.format.f32.ll2025-07-15 07:15 55K 
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[ ]legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll2025-07-15 07:15 26K 
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[ ]legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll2025-07-15 07:15 41K 
[ ]legalize-amdgcn.raw.ptr.tbuffer.load.ll2025-07-15 07:15 47K 
[ ]legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll2025-07-15 07:15 50K 
[ ]legalize-amdgcn.raw.ptr.tbuffer.store.ll2025-07-15 07:15 127K 
[ ]legalize-amdgcn.raw.tbuffer.load.f16.ll2025-07-15 07:15 34K 
[ ]legalize-amdgcn.raw.tbuffer.load.ll2025-07-15 07:15 39K 
[ ]legalize-amdgcn.raw.tbuffer.store.f16.ll2025-07-15 07:15 43K 
[ ]legalize-amdgcn.raw.tbuffer.store.ll2025-07-15 07:15 107K 
[ ]legalize-fp-load-invariant.ll2025-07-15 07:15 948  
[ ]legalize-soffset-mbuf.ll2025-07-15 07:15 77K 
[ ]legalizedag-bug-expand-setcc.ll2025-07-15 07:15 708  
[ ]licm-regpressure.mir2025-07-15 07:15 9.2K 
[ ]licm-valu.mir2025-07-15 07:15 4.0K 
[ ]licm-wwm.mir2025-07-15 07:15 2.1K 
[ ]limit-coalesce.mir2025-07-15 07:15 2.3K 
[ ]limit-soft-clause-reg-pressure.mir2025-07-15 07:15 12K 
[ ]lit.local.cfg2025-07-15 07:15 70  
[ ]literal-constant-like-operand-instruction-size.ll2025-07-15 07:15 1.4K 
[ ]literal64.ll2025-07-15 07:15 13K 
[ ]literals.ll2025-07-15 07:15 1.9K 
[ ]live-interval-bug-in-rename-independent-subregs.mir2025-07-15 07:15 14K 
[ ]liveness.mir2025-07-15 07:15 1.0K 
[ ]liveout-implicit-def-subreg-redef-blender-verifier-error.mir2025-07-15 07:15 4.6K 
[ ]llc-pipeline-npm.ll2025-07-15 07:15 8.1K 
[ ]llc-pipeline.ll2025-07-15 07:15 70K 
[ ]llvm.amdgcn.addrspacecast.nonnull.ll2025-07-15 07:15 2.7K 
[ ]llvm.amdgcn.alignbyte.ll2025-07-15 07:15 5.6K 
[ ]llvm.amdgcn.atomic.cond.sub.ll2025-07-15 07:15 9.3K 
[ ]llvm.amdgcn.atomic.dec.ll2025-07-15 07:15 65K 
[ ]llvm.amdgcn.atomic.inc.ll2025-07-15 07:15 67K 
[ ]llvm.amdgcn.ballot.i32.ll2025-07-15 07:15 19K 
[ ]llvm.amdgcn.ballot.i64.ll2025-07-15 07:15 18K 
[ ]llvm.amdgcn.ballot.i64.wave32.ll2025-07-15 07:15 6.9K 
[ ]llvm.amdgcn.bitop3.ll2025-07-15 07:15 8.0K 
[ ]llvm.amdgcn.bitreplicate.ll2025-07-15 07:15 3.3K 
[ ]llvm.amdgcn.buffer.load-last-use.ll2025-07-15 07:15 1.4K 
[ ]llvm.amdgcn.buffer.load.dwordx3.ll2025-07-15 07:15 3.6K 
[ ]llvm.amdgcn.buffer.load.lds.err.ll2025-07-15 07:15 2.0K 
[ ]llvm.amdgcn.buffer.store.dwordx3.ll2025-07-15 07:15 3.1K 
[ ]llvm.amdgcn.bvh8_intersect_ray.ll2025-07-15 07:15 5.7K 
[ ]llvm.amdgcn.class.f16.ll2025-07-15 07:15 5.1K 
[ ]llvm.amdgcn.class.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.cos.f16.ll2025-07-15 07:15 604  
[ ]llvm.amdgcn.cos.ll2025-07-15 07:15 564  
[ ]llvm.amdgcn.cubeid.ll2025-07-15 07:15 656  
[ ]llvm.amdgcn.cubema.ll2025-07-15 07:15 656  
[ ]llvm.amdgcn.cubesc.ll2025-07-15 07:15 656  
[ ]llvm.amdgcn.cubetc.ll2025-07-15 07:15 656  
[ ]llvm.amdgcn.cvt.f16.fp8.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.cvt.f32.fp8.err.ll2025-07-15 07:15 6.9K 
[ ]llvm.amdgcn.cvt.fp8.dpp.ll2025-07-15 07:15 8.4K 
[ ]llvm.amdgcn.cvt.fp8.dpp.mir2025-07-15 07:15 8.9K 
[ ]llvm.amdgcn.cvt.fp8.e5m3.ll2025-07-15 07:15 2.0K 
[ ]llvm.amdgcn.cvt.fp8.ll2025-07-15 07:15 36K 
[ ]llvm.amdgcn.cvt.off.f32.i4.ll2025-07-15 07:15 1.1K 
[ ]llvm.amdgcn.cvt.pk.i16.ll2025-07-15 07:15 3.9K 
[ ]llvm.amdgcn.cvt.pk.u16.ll2025-07-15 07:15 3.9K 
[ ]llvm.amdgcn.cvt.pknorm.i16.ll2025-07-15 07:15 8.1K 
[ ]llvm.amdgcn.cvt.pknorm.u16.ll2025-07-15 07:15 8.1K 
[ ]llvm.amdgcn.cvt.pkrtz.ll2025-07-15 07:15 33K 
[ ]llvm.amdgcn.cvt.scalef32.pk.gfx950.ll2025-07-15 07:15 119K 
[ ]llvm.amdgcn.cvt.scalef32.pk.ll2025-07-15 07:15 33K 
[ ]llvm.amdgcn.cvt.scalef32.sr.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll2025-07-15 07:15 8.8K 
[ ]llvm.amdgcn.cvt.scalef32.sr.pk.ll2025-07-15 07:15 23K 
[ ]llvm.amdgcn.cvt.sr.ll2025-07-15 07:15 5.8K 
[ ]llvm.amdgcn.dead.ll2025-07-15 07:15 56K 
[ ]llvm.amdgcn.dispatch.id.ll2025-07-15 07:15 2.1K 
[ ]llvm.amdgcn.dispatch.ptr.ll2025-07-15 07:15 1.3K 
[ ]llvm.amdgcn.div.fixup.f16.ll2025-07-15 07:15 4.6K 
[ ]llvm.amdgcn.div.fixup.ll2025-07-15 07:15 1.7K 
[ ]llvm.amdgcn.div.fmas.ll2025-07-15 07:15 8.7K 
[ ]llvm.amdgcn.div.scale.ll2025-07-15 07:15 22K 
[ ]llvm.amdgcn.dot4.f32.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.ds.add.gs.reg.rtn.ll2025-07-15 07:15 1.9K 
[ ]llvm.amdgcn.ds.append.ll2025-07-15 07:15 6.2K 
[ ]llvm.amdgcn.ds.atomic.async.barrier.arrive.b64.ll2025-07-15 07:15 930  
[ ]llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll2025-07-15 07:15 1.2K 
[ ]llvm.amdgcn.ds.bpermute.fi.b32.ll2025-07-15 07:15 6.7K 
[ ]llvm.amdgcn.ds.bpermute.ll2025-07-15 07:15 2.2K 
[ ]llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll2025-07-15 07:15 4.7K 
[ ]llvm.amdgcn.ds.bvh.stack.rtn.ll2025-07-15 07:15 1.7K 
[ ]llvm.amdgcn.ds.consume.ll2025-07-15 07:15 6.2K 
[ ]llvm.amdgcn.ds.gws.barrier-fastregalloc.ll2025-07-15 07:15 927  
[ ]llvm.amdgcn.ds.gws.barrier.ll2025-07-15 07:15 10K 
[ ]llvm.amdgcn.ds.gws.init.ll2025-07-15 07:15 6.6K 
[ ]llvm.amdgcn.ds.gws.sema.br.ll2025-07-15 07:15 2.4K 
[TXT]llvm.amdgcn.ds.gws.sema.p.ll2025-07-15 07:15 1.5K 
[ ]llvm.amdgcn.ds.gws.sema.release.all.ll2025-07-15 07:15 2.7K 
[ ]llvm.amdgcn.ds.gws.sema.v.ll2025-07-15 07:15 2.3K 
[ ]llvm.amdgcn.ds.ordered.add-errors.ll2025-07-15 07:15 2.1K 
[ ]llvm.amdgcn.ds.ordered.add-unsupported.ll2025-07-15 07:15 1.4K 
[ ]llvm.amdgcn.ds.ordered.add.gfx10.ll2025-07-15 07:15 1.5K 
[ ]llvm.amdgcn.ds.ordered.add.gfx11.ll2025-07-15 07:15 2.8K 
[ ]llvm.amdgcn.ds.ordered.add.ll2025-07-15 07:15 6.0K 
[ ]llvm.amdgcn.ds.ordered.swap.ll2025-07-15 07:15 2.3K 
[ ]llvm.amdgcn.ds.permute.ll2025-07-15 07:15 914  
[ ]llvm.amdgcn.ds.read.tr.gfx950.ll2025-07-15 07:15 7.0K 
[ ]llvm.amdgcn.ds.sub.gs.reg.rtn.ll2025-07-15 07:15 1.9K 
[ ]llvm.amdgcn.ds.swizzle.ll2025-07-15 07:15 613  
[ ]llvm.amdgcn.dual_intersect_ray.ll2025-07-15 07:15 6.1K 
[ ]llvm.amdgcn.exp.compr.ll2025-07-15 07:15 8.8K 
[ ]llvm.amdgcn.exp.ll2025-07-15 07:15 29K 
[ ]llvm.amdgcn.exp.prim.ll2025-07-15 07:15 1.0K 
[ ]llvm.amdgcn.exp.row.ll2025-07-15 07:15 6.9K 
[ ]llvm.amdgcn.exp2.ll2025-07-15 07:15 2.7K 
[ ]llvm.amdgcn.fcmp.w32.ll2025-07-15 07:15 100K 
[ ]llvm.amdgcn.fcmp.w64.ll2025-07-15 07:15 108K 
[ ]llvm.amdgcn.fdiv.fast.ll2025-07-15 07:15 593  
[ ]llvm.amdgcn.fdot2.bf16.bf16.ll2025-07-15 07:15 6.2K 
[ ]llvm.amdgcn.fdot2.f16.f16.ll2025-07-15 07:15 7.7K 
[ ]llvm.amdgcn.fdot2.f32.bf16.ll2025-07-15 07:15 5.4K 
[ ]llvm.amdgcn.fdot2.ll2025-07-15 07:15 2.8K 
[ ]llvm.amdgcn.fma.legacy.ll2025-07-15 07:15 4.0K 
[ ]llvm.amdgcn.fmad.ftz.f16.ll2025-07-15 07:15 4.2K 
[ ]llvm.amdgcn.fmad.ftz.ll2025-07-15 07:15 4.3K 
[ ]llvm.amdgcn.fmed3.f16.ll2025-07-15 07:15 1.6K 
[ ]llvm.amdgcn.fmed3.ll2025-07-15 07:15 4.8K 
[ ]llvm.amdgcn.fmul.legacy.ll2025-07-15 07:15 6.0K 
[ ]llvm.amdgcn.fract.f16.ll2025-07-15 07:15 614  
[ ]llvm.amdgcn.fract.ll2025-07-15 07:15 1.2K 
[ ]llvm.amdgcn.frexp.exp.f16.ll2025-07-15 07:15 1.6K 
[ ]llvm.amdgcn.frexp.exp.ll2025-07-15 07:15 3.1K 
[ ]llvm.amdgcn.frexp.mant.f16.ll2025-07-15 07:15 639  
[ ]llvm.amdgcn.frexp.mant.ll2025-07-15 07:15 2.7K 
[ ]llvm.amdgcn.global.atomic.csub.ll2025-07-15 07:15 2.3K 
[ ]llvm.amdgcn.global.atomic.ordered.add.b64.ll2025-07-15 07:15 3.1K 
[ ]llvm.amdgcn.global.load.lds.err.ll2025-07-15 07:15 849  
[ ]llvm.amdgcn.global.load.lds.gfx950.ll2025-07-15 07:15 5.4K 
[ ]llvm.amdgcn.global.load.lds.ll2025-07-15 07:15 9.2K 
[ ]llvm.amdgcn.global.load.tr-w32.ll2025-07-15 07:15 3.4K 
[ ]llvm.amdgcn.global.load.tr-w64.ll2025-07-15 07:15 3.4K 
[ ]llvm.amdgcn.groupstaticsize.ll2025-07-15 07:15 3.5K 
[ ]llvm.amdgcn.icmp.w32.ll2025-07-15 07:15 67K 
[ ]llvm.amdgcn.icmp.w64.ll2025-07-15 07:15 74K 
[ ]llvm.amdgcn.iglp.AFLCustomIRMutator.opt.ll2025-07-15 07:15 1.8K 
[ ]llvm.amdgcn.iglp.opt.exp.large.mir2025-07-15 07:15 161K 
[ ]llvm.amdgcn.iglp.opt.exp.simple.ll2025-07-15 07:15 7.8K 
[ ]llvm.amdgcn.iglp.opt.exp.small.mir2025-07-15 07:15 65K 
[ ]llvm.amdgcn.iglp.opt.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.iglp.opt.single.2b.mir2025-07-15 07:15 33K 
[ ]llvm.amdgcn.iglp.opt.single.2c.mir2025-07-15 07:15 18K 
[ ]llvm.amdgcn.image.a16.dim.ll2025-07-15 07:15 52K 
[ ]llvm.amdgcn.image.a16.encode.ll2025-07-15 07:15 77K 
[ ]llvm.amdgcn.image.atomic.dim.ll2025-07-15 07:15 18K 
[TXT]llvm.amdgcn.image.atomic.flt.ll2025-07-15 07:15 2.0K 
[ ]llvm.amdgcn.image.atomic.pk.add.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.image.d16.dim.ll2025-07-15 07:15 10K 
[ ]llvm.amdgcn.image.dim.gfx90a.ll2025-07-15 07:15 19K 
[ ]llvm.amdgcn.image.dim.ll2025-07-15 07:15 171K 
[ ]llvm.amdgcn.image.gather4.a16.dim.ll2025-07-15 07:15 39K 
[ ]llvm.amdgcn.image.gather4.d16.dim.ll2025-07-15 07:15 2.2K 
[ ]llvm.amdgcn.image.gather4.dim.ll2025-07-15 07:15 14K 
[ ]llvm.amdgcn.image.gather4.o.dim.ll2025-07-15 07:15 7.7K 
[ ]llvm.amdgcn.image.getlod.dim.ll2025-07-15 07:15 2.5K 
[ ]llvm.amdgcn.image.load.2dmsaa.ll2025-07-15 07:15 95K 
[ ]llvm.amdgcn.image.load.a16.d16.ll2025-07-15 07:15 7.7K 
[ ]llvm.amdgcn.image.load.a16.ll2025-07-15 07:15 7.6K 
[ ]llvm.amdgcn.image.msaa.load.ll2025-07-15 07:15 27K 
[ ]llvm.amdgcn.image.msaa.load.x.ll2025-07-15 07:15 7.5K 
[ ]llvm.amdgcn.image.nsa.ll2025-07-15 07:15 10K 
[ ]llvm.amdgcn.image.sample.a16.dim.ll2025-07-15 07:15 111K 
[ ]llvm.amdgcn.image.sample.cd.a16.dim.ll2025-07-15 07:15 10K 
[ ]llvm.amdgcn.image.sample.cd.dim.ll2025-07-15 07:15 9.3K 
[ ]llvm.amdgcn.image.sample.cd.g16.encode.ll2025-07-15 07:15 8.4K 
[ ]llvm.amdgcn.image.sample.cd.g16.ll2025-07-15 07:15 7.0K 
[ ]llvm.amdgcn.image.sample.d16.dim.ll2025-07-15 07:15 30K 
[ ]llvm.amdgcn.image.sample.dim.gfx90a.ll2025-07-15 07:15 5.0K 
[ ]llvm.amdgcn.image.sample.dim.ll2025-07-15 07:15 128K 
[ ]llvm.amdgcn.image.sample.g16.a16.dim.ll2025-07-15 07:15 55K 
[ ]llvm.amdgcn.image.sample.g16.encode.ll2025-07-15 07:15 34K 
[ ]llvm.amdgcn.image.sample.g16.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.image.sample.noret.ll2025-07-15 07:15 27K 
[ ]llvm.amdgcn.image.sample.o.dim.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.image.store.a16.d16.ll2025-07-15 07:15 14K 
[ ]llvm.amdgcn.image.store.a16.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.implicit.ptr.buffer.hsa.ll2025-07-15 07:15 891  
[ ]llvm.amdgcn.implicit.ptr.buffer.ll2025-07-15 07:15 1.2K 
[ ]llvm.amdgcn.implicitarg.ptr.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.init.exec.ll2025-07-15 07:15 7.1K 
[ ]llvm.amdgcn.init.exec.wave32.ll2025-07-15 07:15 2.1K 
[ ]llvm.amdgcn.init.whole.wave-w32.ll2025-07-15 07:15 55K 
[ ]llvm.amdgcn.init.whole.wave-w64.ll2025-07-15 07:15 6.4K 
[ ]llvm.amdgcn.interp.f16.ll2025-07-15 07:15 8.9K 
[ ]llvm.amdgcn.interp.inreg.ll2025-07-15 07:15 24K 
[ ]llvm.amdgcn.interp.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.intersect_ray.ll2025-07-15 07:15 49K 
[ ]llvm.amdgcn.inverse.ballot.i32.ll2025-07-15 07:15 5.5K 
[ ]llvm.amdgcn.inverse.ballot.i64.ll2025-07-15 07:15 14K 
[ ]llvm.amdgcn.is.private.ll2025-07-15 07:15 9.8K 
[ ]llvm.amdgcn.is.shared.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.kernarg.segment.ptr.ll2025-07-15 07:15 5.4K 
[ ]llvm.amdgcn.kill.ll2025-07-15 07:15 9.8K 
[ ]llvm.amdgcn.lds.direct.load.ll2025-07-15 07:15 2.5K 
[ ]llvm.amdgcn.lds.kernel.id.ll2025-07-15 07:15 3.4K 
[ ]llvm.amdgcn.lds.param.load.ll2025-07-15 07:15 2.8K 
[ ]llvm.amdgcn.lerp.ll2025-07-15 07:15 580  
[ ]llvm.amdgcn.load.to.lds.gfx950.ll2025-07-15 07:15 5.9K 
[ ]llvm.amdgcn.load.to.lds.ll2025-07-15 07:15 9.3K 
[ ]llvm.amdgcn.load.tr.gfx1250.w32.ll2025-07-15 07:15 14K 
[ ]llvm.amdgcn.log.clamp.ll2025-07-15 07:15 660  
[ ]llvm.amdgcn.log.ll2025-07-15 07:15 2.7K 
[ ]llvm.amdgcn.make.buffer.rsrc.ll2025-07-15 07:15 16K 
[ ]llvm.amdgcn.mbcnt.ll2025-07-15 07:15 3.2K 
[ ]llvm.amdgcn.mfma.bf16.ll2025-07-15 07:15 8.0K 
[ ]llvm.amdgcn.mfma.gfx90a.ll2025-07-15 07:15 20K 
[ ]llvm.amdgcn.mfma.gfx942.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.mfma.gfx950.bf16.ll2025-07-15 07:15 21K 
[ ]llvm.amdgcn.mfma.gfx950.ll2025-07-15 07:15 88K 
[ ]llvm.amdgcn.mfma.i8.ll2025-07-15 07:15 2.4K 
[ ]llvm.amdgcn.mfma.ll2025-07-15 07:15 232K 
[ ]llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll2025-07-15 07:15 133K 
[ ]llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll2025-07-15 07:15 293K 
[ ]llvm.amdgcn.mfma.xf32.gfx942.ll2025-07-15 07:15 3.0K 
[VID]llvm.amdgcn.mov.dpp.ll2025-07-15 07:15 5.0K 
[VID]llvm.amdgcn.mov.dpp8.ll2025-07-15 07:15 8.6K 
[ ]llvm.amdgcn.mqsad.pk.u16.u8.ll2025-07-15 07:15 1.5K 
[ ]llvm.amdgcn.mqsad.u32.u8.ll2025-07-15 07:15 3.0K 
[ ]llvm.amdgcn.msad.u8.ll2025-07-15 07:15 932  
[ ]llvm.amdgcn.mul.i24.ll2025-07-15 07:15 476  
[ ]llvm.amdgcn.mul.u24.ll2025-07-15 07:15 476  
[ ]llvm.amdgcn.mulhi.i24.ll2025-07-15 07:15 602  
[ ]llvm.amdgcn.mulhi.u24.ll2025-07-15 07:15 602  
[ ]llvm.amdgcn.perm.ll2025-07-15 07:15 1.8K 
[ ]llvm.amdgcn.permlane.ll2025-07-15 07:15 473K 
[ ]llvm.amdgcn.permlane.ptr.ll2025-07-15 07:15 32K 
[ ]llvm.amdgcn.permlane16.swap.ll2025-07-15 07:15 5.3K 
[ ]llvm.amdgcn.permlane16.var.ll2025-07-15 07:15 35K 
[ ]llvm.amdgcn.permlane32.swap.ll2025-07-15 07:15 5.3K 
[ ]llvm.amdgcn.permlane64.ll2025-07-15 07:15 27K 
[ ]llvm.amdgcn.permlane64.ptr.ll2025-07-15 07:15 7.3K 
[ ]llvm.amdgcn.pops.exiting.wave.id.ll2025-07-15 07:15 7.0K 
[ ]llvm.amdgcn.prng.ll2025-07-15 07:15 1.1K 
[ ]llvm.amdgcn.ps.live.ll2025-07-15 07:15 2.3K 
[ ]llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll2025-07-15 07:15 6.8K 
[ ]llvm.amdgcn.qsad.pk.u16.u8.ll2025-07-15 07:15 1.5K 
[ ]llvm.amdgcn.quadmask.ll2025-07-15 07:15 5.9K 
[ ]llvm.amdgcn.queue.ptr.ll2025-07-15 07:15 1.3K 
[ ]llvm.amdgcn.raw.atomic.buffer.load.ll2025-07-15 07:15 15K 
[ ]llvm.amdgcn.raw.buffer.atomic.fadd.ll2025-07-15 07:15 3.5K 
[ ]llvm.amdgcn.raw.buffer.atomic.ll2025-07-15 07:15 8.3K 
[ ]llvm.amdgcn.raw.buffer.load.format.d16.ll2025-07-15 07:15 2.8K 
[ ]llvm.amdgcn.raw.buffer.load.format.ll2025-07-15 07:15 7.4K 
[ ]llvm.amdgcn.raw.buffer.load.lds.ll2025-07-15 07:15 4.9K 
[ ]llvm.amdgcn.raw.buffer.load.ll2025-07-15 07:15 62K 
[ ]llvm.amdgcn.raw.buffer.load.tfe.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.raw.buffer.store.format.d16.ll2025-07-15 07:15 5.7K 
[ ]llvm.amdgcn.raw.buffer.store.format.ll2025-07-15 07:15 3.4K 
[ ]llvm.amdgcn.raw.buffer.store.ll2025-07-15 07:15 25K 
[ ]llvm.amdgcn.raw.ptr.atomic.buffer.load.ll2025-07-15 07:15 15K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll2025-07-15 07:15 5.7K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll2025-07-15 07:15 9.2K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll2025-07-15 07:15 7.8K 
[ ]llvm.amdgcn.raw.ptr.buffer.atomic.ll2025-07-15 07:15 9.6K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.bf16.ll2025-07-15 07:15 7.2K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.bf16.xfail.ll2025-07-15 07:15 396  
[ ]llvm.amdgcn.raw.ptr.buffer.load.format.d16.ll2025-07-15 07:15 4.4K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.format.ll2025-07-15 07:15 4.1K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.lds.gfx950.ll2025-07-15 07:15 8.7K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.lds.ll2025-07-15 07:15 5.1K 
[ ]llvm.amdgcn.raw.ptr.buffer.load.ll2025-07-15 07:15 83K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.bf16.ll2025-07-15 07:15 5.9K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.bf16.xfail.ll2025-07-15 07:15 443  
[ ]llvm.amdgcn.raw.ptr.buffer.store.format.d16.ll2025-07-15 07:15 5.8K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.format.ll2025-07-15 07:15 3.6K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.ll2025-07-15 07:15 52K 
[ ]llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll2025-07-15 07:15 721  
[ ]llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll2025-07-15 07:15 8.2K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.load.ll2025-07-15 07:15 18K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.raw.ptr.tbuffer.store.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.raw.tbuffer.load.d16.ll2025-07-15 07:15 9.7K 
[ ]llvm.amdgcn.raw.tbuffer.load.ll2025-07-15 07:15 21K 
[ ]llvm.amdgcn.raw.tbuffer.store.d16.ll2025-07-15 07:15 14K 
[ ]llvm.amdgcn.raw.tbuffer.store.ll2025-07-15 07:15 15K 
[ ]llvm.amdgcn.rcp.f16.ll2025-07-15 07:15 4.7K 
[ ]llvm.amdgcn.rcp.legacy.ll2025-07-15 07:15 1.6K 
[ ]llvm.amdgcn.rcp.ll2025-07-15 07:15 7.3K 
[ ]llvm.amdgcn.readfirstlane.ll2025-07-15 07:15 76K 
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[ ]llvm.amdgcn.readfirstlane.ptr.ll2025-07-15 07:15 5.3K 
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[ ]llvm.amdgcn.readlane.ptr.ll2025-07-15 07:15 5.9K 
[ ]llvm.amdgcn.reduce.add.ll2025-07-15 07:15 54K 
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[ ]llvm.amdgcn.reduce.or.ll2025-07-15 07:15 43K 
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[ ]llvm.amdgcn.rsq.clamp.ll2025-07-15 07:15 1.8K 
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[ ]llvm.amdgcn.rsq.legacy.ll2025-07-15 07:15 1.4K 
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[ ]llvm.amdgcn.s.barrier.ll2025-07-15 07:15 8.2K 
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[ ]llvm.amdgcn.s.buffer.load.ll2025-07-15 07:15 59K 
[ ]llvm.amdgcn.s.buffer.prefetch.data.ll2025-07-15 07:15 2.1K 
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[ ]llvm.amdgcn.s.dcache.wb.vol.ll2025-07-15 07:15 856  
[ ]llvm.amdgcn.s.decperflevel.ll2025-07-15 07:15 1.6K 
[ ]llvm.amdgcn.s.get.waveid.in.workgroup.ll2025-07-15 07:15 782  
[ ]llvm.amdgcn.s.getpc.ll2025-07-15 07:15 490  
[ ]llvm.amdgcn.s.getreg.ll2025-07-15 07:15 1.6K 
[ ]llvm.amdgcn.s.incperflevel.ll2025-07-15 07:15 1.6K 
[ ]llvm.amdgcn.s.memrealtime.ll2025-07-15 07:15 891  
[ ]llvm.amdgcn.s.memtime.ll2025-07-15 07:15 1.1K 
[ ]llvm.amdgcn.s.monitor.sleep.ll2025-07-15 07:15 648  
[ ]llvm.amdgcn.s.nop.ll2025-07-15 07:15 1.0K 
[ ]llvm.amdgcn.s.prefetch.data.ll2025-07-15 07:15 4.9K 
[ ]llvm.amdgcn.s.sethalt.ll2025-07-15 07:15 1.0K 
[ ]llvm.amdgcn.s.setprio.inc.wg.ll2025-07-15 07:15 1.8K 
[ ]llvm.amdgcn.s.setprio.ll2025-07-15 07:15 2.6K 
[ ]llvm.amdgcn.s.setreg.ll2025-07-15 07:15 61K 
[ ]llvm.amdgcn.s.sleep.ll2025-07-15 07:15 1.4K 
[ ]llvm.amdgcn.s.sleep.var.ll2025-07-15 07:15 1.5K 
[ ]llvm.amdgcn.s.ttracedata.ll2025-07-15 07:15 1.6K 
[ ]llvm.amdgcn.s.wait.event.ll2025-07-15 07:15 701  
[ ]llvm.amdgcn.s.wait.gfx12.ll2025-07-15 07:15 2.6K 
[ ]llvm.amdgcn.s.wait.gfx1250.ll2025-07-15 07:15 810  
[ ]llvm.amdgcn.s.waitcnt.ll2025-07-15 07:15 2.1K 
[ ]llvm.amdgcn.sad.hi.u8.ll2025-07-15 07:15 950  
[ ]llvm.amdgcn.sad.u8.ll2025-07-15 07:15 923  
[ ]llvm.amdgcn.sad.u16.ll2025-07-15 07:15 932  
[ ]llvm.amdgcn.sbfe.ll2025-07-15 07:15 20K 
[ ]llvm.amdgcn.sched.barrier.ll2025-07-15 07:15 835  
[ ]llvm.amdgcn.sched.group.barrier.gfx11.ll2025-07-15 07:15 24K 
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[ ]llvm.amdgcn.sched.group.barrier.ll2025-07-15 07:15 86K 
[ ]llvm.amdgcn.sdot2.ll2025-07-15 07:15 2.0K 
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[ ]llvm.amdgcn.sendmsg.ll2025-07-15 07:15 4.4K 
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[ ]llvm.amdgcn.set.inactive.chain.arg.ll2025-07-15 07:15 41K 
[ ]llvm.amdgcn.set.inactive.ll2025-07-15 07:15 20K 
[ ]llvm.amdgcn.sffbh.ll2025-07-15 07:15 1.2K 
[ ]llvm.amdgcn.sin.f16.ll2025-07-15 07:15 604  
[ ]llvm.amdgcn.sin.ll2025-07-15 07:15 588  
[ ]llvm.amdgcn.smfmac.gfx950.ll2025-07-15 07:15 152K 
[ ]llvm.amdgcn.softwqm.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.sqrt.f16.ll2025-07-15 07:15 5.0K 
[ ]llvm.amdgcn.sqrt.ll2025-07-15 07:15 2.8K 
[ ]llvm.amdgcn.struct.atomic.buffer.load.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.struct.buffer.atomic.fadd.ll2025-07-15 07:15 3.1K 
[ ]llvm.amdgcn.struct.buffer.atomic.ll2025-07-15 07:15 10K 
[ ]llvm.amdgcn.struct.buffer.load.format.d16.ll2025-07-15 07:15 3.4K 
[ ]llvm.amdgcn.struct.buffer.load.format.ll2025-07-15 07:15 58K 
[ ]llvm.amdgcn.struct.buffer.load.format.v3f16.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.struct.buffer.load.lds.ll2025-07-15 07:15 5.2K 
[ ]llvm.amdgcn.struct.buffer.load.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.struct.buffer.load.tfe.ll2025-07-15 07:15 32K 
[ ]llvm.amdgcn.struct.buffer.store.format.d16.ll2025-07-15 07:15 6.5K 
[ ]llvm.amdgcn.struct.buffer.store.format.ll2025-07-15 07:15 5.1K 
[ ]llvm.amdgcn.struct.buffer.store.ll2025-07-15 07:15 16K 
[ ]llvm.amdgcn.struct.ptr.atomic.buffer.load.ll2025-07-15 07:15 18K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll2025-07-15 07:15 6.1K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll2025-07-15 07:15 21K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll2025-07-15 07:15 31K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll2025-07-15 07:15 15K 
[ ]llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll2025-07-15 07:15 31K 
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[ ]llvm.amdgcn.struct.ptr.buffer.atomic.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.format.d16.ll2025-07-15 07:15 6.0K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.format.ll2025-07-15 07:15 49K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll2025-07-15 07:15 8.0K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.lds.gfx950.ll2025-07-15 07:15 8.9K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.lds.ll2025-07-15 07:15 5.3K 
[ ]llvm.amdgcn.struct.ptr.buffer.load.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll2025-07-15 07:15 6.7K 
[ ]llvm.amdgcn.struct.ptr.buffer.store.format.ll2025-07-15 07:15 6.4K 
[ ]llvm.amdgcn.struct.ptr.buffer.store.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll2025-07-15 07:15 9.2K 
[ ]llvm.amdgcn.struct.ptr.tbuffer.load.ll2025-07-15 07:15 23K 
[ ]llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.struct.ptr.tbuffer.store.ll2025-07-15 07:15 24K 
[ ]llvm.amdgcn.struct.tbuffer.load.d16.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.struct.tbuffer.load.ll2025-07-15 07:15 28K 
[ ]llvm.amdgcn.struct.tbuffer.store.d16.ll2025-07-15 07:15 17K 
[ ]llvm.amdgcn.struct.tbuffer.store.ll2025-07-15 07:15 27K 
[ ]llvm.amdgcn.sudot4.ll2025-07-15 07:15 4.4K 
[ ]llvm.amdgcn.sudot8.ll2025-07-15 07:15 4.4K 
[ ]llvm.amdgcn.tanh.ll2025-07-15 07:15 3.9K 
[ ]llvm.amdgcn.tbuffer.load.dwordx3.ll2025-07-15 07:15 1.7K 
[ ]llvm.amdgcn.tbuffer.store.dwordx3.ll2025-07-15 07:15 1.2K 
[ ]llvm.amdgcn.tensor.load.store.ll2025-07-15 07:15 12K 
[ ]llvm.amdgcn.trig.preop.ll2025-07-15 07:15 1.5K 
[ ]llvm.amdgcn.ubfe.ll2025-07-15 07:15 59K 
[ ]llvm.amdgcn.udot2.ll2025-07-15 07:15 3.2K 
[ ]llvm.amdgcn.udot4.ll2025-07-15 07:15 2.1K 
[ ]llvm.amdgcn.udot8.ll2025-07-15 07:15 2.1K 
[ ]llvm.amdgcn.unreachable.ll2025-07-15 07:15 265  
[ ]llvm.amdgcn.update.dpp.gfx90a.ll2025-07-15 07:15 11K 
[ ]llvm.amdgcn.update.dpp.ll2025-07-15 07:15 135K 
[ ]llvm.amdgcn.waitcnt.out.order.ll2025-07-15 07:15 13K 
[ ]llvm.amdgcn.wave.barrier.ll2025-07-15 07:15 728  
[ ]llvm.amdgcn.wave.id.ll2025-07-15 07:15 2.7K 
[ ]llvm.amdgcn.wavefrontsize.ll2025-07-15 07:15 2.1K 
[ ]llvm.amdgcn.wmma_32.ll2025-07-15 07:15 21K 
[ ]llvm.amdgcn.wmma_64.ll2025-07-15 07:15 18K 
[ ]llvm.amdgcn.workgroup.id.ll2025-07-15 07:15 4.0K 
[ ]llvm.amdgcn.workitem.id-unsupported-calling-convention.ll2025-07-15 07:15 1.3K 
[ ]llvm.amdgcn.workitem.id.ll2025-07-15 07:15 5.1K 
[ ]llvm.amdgcn.wqm.demote.ll2025-07-15 07:15 50K 
[ ]llvm.amdgcn.wqm.ll2025-07-15 07:15 5.6K 
[ ]llvm.amdgcn.wqm.vote.ll2025-07-15 07:15 2.4K 
[ ]llvm.amdgcn.writelane.ll2025-07-15 07:15 166K 
[ ]llvm.amdgcn.writelane.ptr.ll2025-07-15 07:15 21K 
[ ]llvm.ceil.f16.ll2025-07-15 07:15 7.8K 
[ ]llvm.cos.f16.ll2025-07-15 07:15 13K 
[ ]llvm.cos.ll2025-07-15 07:15 1.2K 
[ ]llvm.dbg.value.ll2025-07-15 07:15 2.5K 
[ ]llvm.exp.ll2025-07-15 07:15 318K 
[ ]llvm.exp2.ll2025-07-15 07:15 160K 
[ ]llvm.exp10.ll2025-07-15 07:15 323K 
[ ]llvm.floor.f16.ll2025-07-15 07:15 7.9K 
[ ]llvm.fma.f16.ll2025-07-15 07:15 33K 
[ ]llvm.fmuladd.f16.ll2025-07-15 07:15 45K 
[ ]llvm.fptrunc.round.err.ll2025-07-15 07:15 3.0K 
[ ]llvm.fptrunc.round.ll2025-07-15 07:15 24K 
[ ]llvm.frexp.ll2025-07-15 07:15 94K 
[ ]llvm.get.fpmode.ll2025-07-15 07:15 26K 
[ ]llvm.get.rounding.ll2025-07-15 07:15 3.2K 
[ ]llvm.is.fpclass.bf16.ll2025-07-15 07:15 148K 
[ ]llvm.is.fpclass.f16.ll2025-07-15 07:15 187K 
[ ]llvm.is.fpclass.ll2025-07-15 07:15 66K 
[ ]llvm.ldexp.ll2025-07-15 07:15 61K 
[ ]llvm.log.ll2025-07-15 07:15 375K 
[ ]llvm.log2.ll2025-07-15 07:15 226K 
[ ]llvm.log10.ll2025-07-15 07:15 376K 
[ ]llvm.maximum.f16.ll2025-07-15 07:15 120K 
[ ]llvm.maximum.f32.ll2025-07-15 07:15 80K 
[ ]llvm.maximum.f64.ll2025-07-15 07:15 129K 
[ ]llvm.maxnum.f16.ll2025-07-15 07:15 42K 
[ ]llvm.memcpy.ll2025-07-15 07:15 10K 
[ ]llvm.minimum.f16.ll2025-07-15 07:15 97K 
[ ]llvm.minimum.f32.ll2025-07-15 07:15 80K 
[ ]llvm.minimum.f64.ll2025-07-15 07:15 129K 
[ ]llvm.minnum.f16.ll2025-07-15 07:15 44K 
[ ]llvm.mulo.ll2025-07-15 07:15 36K 
[ ]llvm.pow-gfx9.ll2025-07-15 07:15 749  
[ ]llvm.pow.ll2025-07-15 07:15 1.8K 
[ ]llvm.powi.ll2025-07-15 07:15 17K 
[ ]llvm.prefetch.ll2025-07-15 07:15 11K 
[ ]llvm.r600.cube.ll2025-07-15 07:15 2.7K 
[ ]llvm.r600.dot4.ll2025-07-15 07:15 526  
[ ]llvm.r600.group.barrier.ll2025-07-15 07:15 1.0K 
[ ]llvm.r600.read.local.size.ll2025-07-15 07:15 15K 
[ ]llvm.r600.recipsqrt.clamped.ll2025-07-15 07:15 464  
[ ]llvm.r600.recipsqrt.ieee.ll2025-07-15 07:15 1.2K 
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[ ]llvm.rint.f16.ll2025-07-15 07:15 13K 
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[ ]llvm.rint.ll2025-07-15 07:15 1.4K 
[ ]llvm.round.f64.ll2025-07-15 07:15 27K 
[ ]llvm.round.ll2025-07-15 07:15 47K 
[ ]llvm.set.rounding.ll2025-07-15 07:15 63K 
[ ]llvm.sin.f16.ll2025-07-15 07:15 13K 
[ ]llvm.sin.ll2025-07-15 07:15 5.1K 
[ ]llvm.sqrt.f16.ll2025-07-15 07:15 12K 
[ ]llvm.trunc.f16.ll2025-07-15 07:15 12K 
[ ]lo16-hi16-illegal-copy.mir2025-07-15 07:15 2.2K 
[ ]lo16-hi16-physreg-copy.mir2025-07-15 07:15 5.3K 
[ ]lo16-lo16-physreg-copy-agpr.mir2025-07-15 07:15 1.3K 
[ ]lo16-lo16-physreg-copy-sgpr.mir2025-07-15 07:15 969  
[ ]load-constant-always-uniform.ll2025-07-15 07:15 2.7K 
[ ]load-constant-f32.ll2025-07-15 07:15 4.9K 
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[ ]load-constant-i8.ll2025-07-15 07:15 515K 
[ ]load-constant-i16.ll2025-07-15 07:15 409K 
[ ]load-constant-i32.ll2025-07-15 07:15 234K 
[ ]load-constant-i64.ll2025-07-15 07:15 38K 
[ ]load-global-f32.ll2025-07-15 07:15 33K 
[ ]load-global-f64.ll2025-07-15 07:15 3.1K 
[ ]load-global-i1.ll2025-07-15 07:15 13K 
[ ]load-global-i8.ll2025-07-15 07:15 530K 
[ ]load-global-i16.ll2025-07-15 07:15 405K 
[ ]load-global-i32.ll2025-07-15 07:15 209K 
[ ]load-global-i64.ll2025-07-15 07:15 3.7K 
[ ]load-hi16.ll2025-07-15 07:15 116K 
[ ]load-input-fold.ll2025-07-15 07:15 5.2K 
[ ]load-lo16.ll2025-07-15 07:15 99K 
[ ]load-local-f32-no-ds128.ll2025-07-15 07:15 782  
[ ]load-local-f32.ll2025-07-15 07:15 4.0K 
[ ]load-local-f64.ll2025-07-15 07:15 4.7K 
[ ]load-local-i1.ll2025-07-15 07:15 16K 
[ ]load-local-i8.ll2025-07-15 07:15 28K 
[ ]load-local-i16.ll2025-07-15 07:15 411K 
[ ]load-local-i32.ll2025-07-15 07:15 9.2K 
[ ]load-local-i64.ll2025-07-15 07:15 4.6K 
[ ]load-local-redundant-copies.ll2025-07-15 07:15 6.7K 
[ ]load-local.96.ll2025-07-15 07:15 19K 
[ ]load-local.128.ll2025-07-15 07:15 22K 
[ ]load-range-metadata-assert.ll2025-07-15 07:15 1.4K 
[ ]load-range-metadata-sign-bits.ll2025-07-15 07:15 6.3K 
[ ]load-select-ptr.ll2025-07-15 07:15 5.8K 
[ ]load-store-cnt.ll2025-07-15 07:15 2.3K 
[ ]load-store-opt-addc0.mir2025-07-15 07:15 1.3K 
[ ]load-store-opt-dlc.mir2025-07-15 07:15 5.6K 
[ ]load-store-opt-scc.mir2025-07-15 07:15 5.6K 
[ ]load-weird-sizes.ll2025-07-15 07:15 1.5K 
[ ]local-64.ll2025-07-15 07:15 8.1K 
[ ]local-atomicrmw-fadd.ll2025-07-15 07:15 442K 
[ ]local-atomicrmw-fmax.ll2025-07-15 07:15 388K 
[ ]local-atomicrmw-fmin.ll2025-07-15 07:15 388K 
[ ]local-atomicrmw-fsub.ll2025-07-15 07:15 431K 
[ ]local-atomics.ll2025-07-15 07:15 27K 
[ ]local-atomics64.ll2025-07-15 07:15 25K 
[ ]local-memory.amdgcn.ll2025-07-15 07:15 5.0K 
[ ]local-memory.ll2025-07-15 07:15 1.7K 
[ ]local-memory.r600.ll2025-07-15 07:15 3.4K 
[ ]local-stack-alloc-add-references.gfx8.mir2025-07-15 07:15 67K 
[ ]local-stack-alloc-add-references.gfx9.mir2025-07-15 07:15 32K 
[ ]local-stack-alloc-add-references.gfx10.mir2025-07-15 07:15 4.9K 
[ ]local-stack-alloc-block-sp-reference.ll2025-07-15 07:15 15K 
[ ]local-stack-slot-offset.ll2025-07-15 07:15 1.4K 
[ ]long-branch-reserve-register.ll2025-07-15 07:15 10K 
[ ]loop-address.ll2025-07-15 07:15 1.1K 
[ ]loop-idiom.ll2025-07-15 07:15 1.6K 
[ ]loop-live-out-copy-undef-subrange.ll2025-07-15 07:15 2.1K 
[ ]loop-on-function-argument.ll2025-07-15 07:15 1.8K 
[ ]loop-prefetch-data.ll2025-07-15 07:15 13K 
[ ]loop-prefetch.ll2025-07-15 07:15 14K 
[ ]loop_break.ll2025-07-15 07:15 23K 
[ ]loop_exit_with_xor.ll2025-07-15 07:15 5.4K 
[ ]loop_header_nopred.mir2025-07-15 07:15 3.7K 
[ ]lower-buffer-fat-pointers-calls.ll2025-07-15 07:15 6.4K 
[ ]lower-buffer-fat-pointers-constants.ll2025-07-15 07:15 7.4K 
[ ]lower-buffer-fat-pointers-contents-legalization.ll2025-07-15 07:15 119K 
[ ]lower-buffer-fat-pointers-control-flow.ll2025-07-15 07:15 21K 
[ ]lower-buffer-fat-pointers-lastuse-metadata.ll2025-07-15 07:15 6.9K 
[ ]lower-buffer-fat-pointers-mem-transfer.ll2025-07-15 07:15 306K 
[ ]lower-buffer-fat-pointers-memops.ll2025-07-15 07:15 13K 
[ ]lower-buffer-fat-pointers-nontemporal-metadata.ll2025-07-15 07:15 31K 
[ ]lower-buffer-fat-pointers-p7-in-memory.ll2025-07-15 07:15 6.2K 
[ ]lower-buffer-fat-pointers-pointer-ops.ll2025-07-15 07:15 33K 
[ ]lower-buffer-fat-pointers-unoptimized-debug-data.ll2025-07-15 07:15 10K 
[ ]lower-control-flow-live-intervals.mir2025-07-15 07:15 14K 
[ ]lower-control-flow-live-variables-update.mir2025-07-15 07:15 13K 
[ ]lower-control-flow-live-variables-update.xfail.mir2025-07-15 07:15 1.6K 
[ ]lower-control-flow-other-terminators.mir2025-07-15 07:15 12K 
[ ]lower-ctor-dtor-constexpr-alias.ll2025-07-15 07:15 4.3K 
[ ]lower-ctor-dtor-declaration.ll2025-07-15 07:15 316  
[ ]lower-ctor-dtor-existing.ll2025-07-15 07:15 1.7K 
[ ]lower-ctor-dtor.ll2025-07-15 07:15 5.6K 
[ ]lower-empty-ctor-dtor.ll2025-07-15 07:15 465  
[ ]lower-i1-copies-clear-kills.mir2025-07-15 07:15 7.3K 
[ ]lower-i1-copies-implicit-def-unstructured-loop.mir2025-07-15 07:15 9.6K 
[ ]lower-indirect-lds-references.ll2025-07-15 07:15 1.6K 
[ ]lower-kernargs.ll2025-07-15 07:15 131K 
[ ]lower-kernel-and-module-lds.ll2025-07-15 07:15 5.0K 
[ ]lower-kernel-lds-constexpr.ll2025-07-15 07:15 5.9K 
[ ]lower-kernel-lds-super-align.ll2025-07-15 07:15 7.8K 
[ ]lower-kernel-lds.ll2025-07-15 07:15 3.2K 
[ ]lower-lds-struct-aa-memcpy.ll2025-07-15 07:15 4.9K 
[ ]lower-lds-struct-aa-merge.ll2025-07-15 07:15 3.4K 
[ ]lower-lds-struct-aa.ll2025-07-15 07:15 7.3K 
[ ]lower-lds-with-alias-scope.ll2025-07-15 07:15 2.3K 
[ ]lower-lds-with-noalias.ll2025-07-15 07:15 4.8K 
[ ]lower-mem-intrinsics-threshold.ll2025-07-15 07:15 5.6K 
[ ]lower-mem-intrinsics.ll2025-07-15 07:15 164K 
[ ]lower-module-lds-all-indirect-accesses.ll2025-07-15 07:15 3.5K 
[ ]lower-module-lds-check-metadata.ll2025-07-15 07:15 605  
[ ]lower-module-lds-constantexpr-phi.ll2025-07-15 07:15 1.5K 
[ ]lower-module-lds-constantexpr.ll2025-07-15 07:15 4.3K 
[ ]lower-module-lds-inactive.ll2025-07-15 07:15 2.7K 
[ ]lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll2025-07-15 07:15 10K 
[ ]lower-module-lds-offsets.ll2025-07-15 07:15 2.0K 
[ ]lower-module-lds-single-var-ambiguous.ll2025-07-15 07:15 4.3K 
[ ]lower-module-lds-single-var-unambiguous.ll2025-07-15 07:15 7.6K 
[ ]lower-module-lds-used-list.ll2025-07-15 07:15 2.6K 
[ ]lower-module-lds-via-hybrid.ll2025-07-15 07:15 13K 
[ ]lower-module-lds-via-table.ll2025-07-15 07:15 18K 
[ ]lower-module-lds-zero-size-arr.ll2025-07-15 07:15 2.2K 
[ ]lower-module-lds.ll2025-07-15 07:15 2.8K 
[ ]lower-multiple-ctor-dtor.ll2025-07-15 07:15 4.0K 
[ ]lower-range-metadata-intrinsic-call.ll2025-07-15 07:15 1.5K 
[ ]lower-term-opcodes.mir2025-07-15 07:15 3.4K 
[ ]lower-work-group-id-intrinsics-hsa.ll2025-07-15 07:15 14K 
[ ]lower-work-group-id-intrinsics-pal.ll2025-07-15 07:15 11K 
[ ]lrint.ll2025-07-15 07:15 39K 
[ ]lround.ll2025-07-15 07:15 72K 
[ ]lshl-add-u64.ll2025-07-15 07:15 2.8K 
[ ]lshl64-to-32.ll2025-07-15 07:15 5.2K 
[ ]lshr.v2i16.ll2025-07-15 07:15 28K 
[ ]lto-lower-module-lds.ll2025-07-15 07:15 2.3K 
[ ]machine-cse-commute-target-flags.mir2025-07-15 07:15 4.8K 
[ ]machine-cse-ssa.mir2025-07-15 07:15 751  
[ ]machine-function-info-cwsr.ll2025-07-15 07:15 2.1K 
[ ]machine-scheduler-sink-trivial-remats-attr.mir2025-07-15 07:15 272K 
[ ]machine-scheduler-sink-trivial-remats-debug.mir2025-07-15 07:15 8.2K 
[ ]machine-scheduler-sink-trivial-remats.mir2025-07-15 07:15 693K 
[ ]machine-sink-cycle.mir2025-07-15 07:15 107K 
[ ]machine-sink-ignorable-exec-use.mir2025-07-15 07:15 37K 
[ ]machine-sink-lane-mask.mir2025-07-15 07:15 6.9K 
[ ]machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll2025-07-15 07:15 4.8K 
[ ]machine-sink-loop-var-out-of-divergent-loop-swdev407790.mir2025-07-15 07:15 8.2K 
[ ]machine-sink-temporal-divergence-swdev407790.ll2025-07-15 07:15 50K 
[ ]machine-sink-temporal-divergence-swdev407790.mir2025-07-15 07:15 6.6K 
[ ]machinelicm-convergent.mir2025-07-15 07:15 777  
[ ]machinelicm-copy-like-instrs.mir2025-07-15 07:15 3.9K 
[ ]machinelicm-undef-use.mir2025-07-15 07:15 2.6K 
[ ]macro-fusion-cluster-vcc-uses.mir2025-07-15 07:15 8.7K 
[ ]mad-combine.ll2025-07-15 07:15 80K 
[ ]mad-mix-hi.ll2025-07-15 07:15 27K 
[ ]mad-mix-lo.ll2025-07-15 07:15 129K 
[ ]mad-mix.ll2025-07-15 07:15 118K 
[ ]mad.u16.ll2025-07-15 07:15 14K 
[ ]mad24-get-global-id.ll2025-07-15 07:15 1.3K 
[ ]mad_64_32.ll2025-07-15 07:15 80K 
[ ]mad_int24.ll2025-07-15 07:15 3.5K 
[ ]mad_u64_u32.ll2025-07-15 07:15 11K 
[ ]mad_uint24.ll2025-07-15 07:15 12K 
[ ]madak-inline-constant.mir2025-07-15 07:15 4.9K 
[ ]madak.ll2025-07-15 07:15 62K 
[ ]madmk.ll2025-07-15 07:15 9.3K 
[ ]mai-hazards-gfx90a.mir2025-07-15 07:15 71K 
[ ]mai-hazards-gfx942.mir2025-07-15 07:15 137K 
[ ]mai-hazards-mfma-scale.gfx950.mir2025-07-15 07:15 33K 
[ ]mai-hazards.mir2025-07-15 07:15 17K 
[ ]mai-inline.ll2025-07-15 07:15 6.6K 
[ ]make-buffer-rsrc-lds-fails.ll2025-07-15 07:15 489  
[ ]masked-load-vectortypes.ll2025-07-15 07:15 12K 
[ ]match-perm-extract-vector-elt-bug.ll2025-07-15 07:15 5.2K 
[ ]materialize-frame-index-sgpr.gfx10.ll2025-07-15 07:15 76K 
[ ]materialize-frame-index-sgpr.ll2025-07-15 07:15 78K 
[ ]max-hard-clause-length.ll2025-07-15 07:15 59K 
[ ]max-literals.ll2025-07-15 07:15 2.3K 
[ ]max-sgprs.ll2025-07-15 07:15 1.0K 
[ ]max.i16.ll2025-07-15 07:15 18K 
[ ]max.ll2025-07-15 07:15 37K 
[ ]max3.ll2025-07-15 07:15 10K 
[ ]maximumnum.bf16.ll2025-07-15 07:15 846K 
[ ]maximumnum.ll2025-07-15 07:15 400K 
[ ]mcexpr-knownbits-assign-crash-gh-issue-110930.ll2025-07-15 07:15 18K 
[ ]mcp-aligned-vgprs.mir2025-07-15 07:15 1.0K 
[ ]mcp-implicit-clobber.mir2025-07-15 07:15 1.0K 
[ ]mcp-overlap-after-propagation.mir2025-07-15 07:15 1.5K 
[ ]mcp-use-before-def.mir2025-07-15 07:15 1.5K 
[ ]mdt-preserving-crash.ll2025-07-15 07:15 9.1K 
[ ]med3-knownbits.ll2025-07-15 07:15 5.0K 
[ ]med3-no-simplify.ll2025-07-15 07:15 2.0K 
[ ]mem-builtins.ll2025-07-15 07:15 3.3K 
[ ]memcpy-crash-issue63986.ll2025-07-15 07:15 11K 
[ ]memcpy-fixed-align.ll2025-07-15 07:15 3.0K 
[ ]memcpy-inline-fails.ll2025-07-15 07:15 428  
[ ]memcpy-libcall.ll2025-07-15 07:15 31K 
[ ]memcpy-param-combinations.ll2025-07-15 07:15 229K 
[ ]memcpy-scalar-load.ll2025-07-15 07:15 3.1K 
[ ]memcpy-scoped-aa.ll2025-07-15 07:15 6.8K 
[ ]memintrinsic-unroll.ll2025-07-15 07:15 971K 
[ ]memmove-param-combinations.ll2025-07-15 07:15 246K 
[ ]memmove-scalar-load.ll2025-07-15 07:15 3.4K 
[ ]memmove-var-size.ll2025-07-15 07:15 106K 
[ ]memory-legalizer-atomic-insert-end.mir2025-07-15 07:15 3.8K 
[ ]memory-legalizer-fence-mmra-global.ll2025-07-15 07:15 70K 
[ ]memory-legalizer-fence-mmra-local.ll2025-07-15 07:15 46K 
[ ]memory-legalizer-fence.ll2025-07-15 07:15 98K 
[ ]memory-legalizer-flat-agent.ll2025-07-15 07:15 1.1M 
[ ]memory-legalizer-flat-lastuse.ll2025-07-15 07:15 4.1K 
[ ]memory-legalizer-flat-nontemporal.ll2025-07-15 07:15 59K 
[ ]memory-legalizer-flat-singlethread.ll2025-07-15 07:15 964K 
[ ]memory-legalizer-flat-system.ll2025-07-15 07:15 1.1M 
[ ]memory-legalizer-flat-volatile.ll2025-07-15 07:15 47K 
[ ]memory-legalizer-flat-wavefront.ll2025-07-15 07:15 947K 
[ ]memory-legalizer-flat-workgroup.ll2025-07-15 07:15 1.0M 
[ ]memory-legalizer-global-agent.ll2025-07-15 07:15 1.0M 
[ ]memory-legalizer-global-lastuse.ll2025-07-15 07:15 3.7K 
[ ]memory-legalizer-global-nontemporal.ll2025-07-15 07:15 47K 
[ ]memory-legalizer-global-singlethread.ll2025-07-15 07:15 895K 
[ ]memory-legalizer-global-system.ll2025-07-15 07:15 970K 
[ ]memory-legalizer-global-volatile.ll2025-07-15 07:15 41K 
[ ]memory-legalizer-global-wavefront.ll2025-07-15 07:15 891K 
[ ]memory-legalizer-global-workgroup.ll2025-07-15 07:15 951K 
[ ]memory-legalizer-invalid-addrspace.mir2025-07-15 07:15 3.2K 
[ ]memory-legalizer-invalid-syncscope.ll2025-07-15 07:15 1.8K 
[ ]memory-legalizer-local-agent.ll2025-07-15 07:15 716K 
[ ]memory-legalizer-local-nontemporal.ll2025-07-15 07:15 42K 
[ ]memory-legalizer-local-singlethread.ll2025-07-15 07:15 687K 
[ ]memory-legalizer-local-system.ll2025-07-15 07:15 716K 
[ ]memory-legalizer-local-volatile.ll2025-07-15 07:15 33K 
[ ]memory-legalizer-local-wavefront.ll2025-07-15 07:15 683K 
[ ]memory-legalizer-local-workgroup.ll2025-07-15 07:15 721K 
[ ]memory-legalizer-local.mir2025-07-15 07:15 82K 
[ ]memory-legalizer-multiple-mem-operands-atomics.mir2025-07-15 07:15 3.2K 
[ ]memory-legalizer-multiple-mem-operands-nontemporal-1.mir2025-07-15 07:15 6.6K 
[ ]memory-legalizer-multiple-mem-operands-nontemporal-2.mir2025-07-15 07:15 5.9K 
[ ]memory-legalizer-private-lastuse.ll2025-07-15 07:15 3.3K 
[ ]memory-legalizer-private-nontemporal.ll2025-07-15 07:15 46K 
[ ]memory-legalizer-private-volatile.ll2025-07-15 07:15 28K 
[ ]memory-legalizer-region.mir2025-07-15 07:15 82K 
[ ]memory-legalizer-store-infinite-loop.ll2025-07-15 07:15 1.8K 
[ ]memory_clause.ll2025-07-15 07:15 24K 
[ ]memory_clause.mir2025-07-15 07:15 23K 
[ ]merge-buffer-gfx12.mir2025-07-15 07:15 80K 
[ ]merge-buffer.mir2025-07-15 07:15 74K 
[ ]merge-consecutive-wait-alus.mir2025-07-15 07:15 3.3K 
[ ]merge-flat-load-store.mir2025-07-15 07:15 28K 
[ ]merge-flat-with-global-load-store.mir2025-07-15 07:15 18K 
[ ]merge-global-load-store.mir2025-07-15 07:15 53K 
[ ]merge-image-load-gfx10.mir2025-07-15 07:15 28K 
[ ]merge-image-load-gfx11.mir2025-07-15 07:15 28K 
[ ]merge-image-load-gfx12.mir2025-07-15 07:15 27K 
[ ]merge-image-load.mir2025-07-15 07:15 27K 
[ ]merge-image-sample-gfx10.mir2025-07-15 07:15 73K 
[ ]merge-image-sample-gfx11.mir2025-07-15 07:15 59K 
[ ]merge-image-sample-gfx12.mir2025-07-15 07:15 60K 
[ ]merge-image-sample.mir2025-07-15 07:15 66K 
[ ]merge-load-store-agpr.mir2025-07-15 07:15 3.3K 
[ ]merge-load-store-physreg.mir2025-07-15 07:15 1.8K 
[ ]merge-load-store-vreg.mir2025-07-15 07:15 5.6K 
[ ]merge-load-store.mir2025-07-15 07:15 11K 
[ ]merge-m0.mir2025-07-15 07:15 16K 
[ ]merge-out-of-order-ldst.ll2025-07-15 07:15 1.4K 
[ ]merge-out-of-order-ldst.mir2025-07-15 07:15 1.2K 
[ ]merge-s-load.mir2025-07-15 07:15 30K 
[ ]merge-sbuffer-load.mir2025-07-15 07:15 49K 
[ ]merge-store-crash.ll2025-07-15 07:15 1.5K 
[ ]merge-store-usedef.ll2025-07-15 07:15 813  
[ ]merge-stores.ll2025-07-15 07:15 48K 
[ ]merge-tbuffer-gfx12.mir2025-07-15 07:15 116K 
[ ]merge-tbuffer.mir2025-07-15 07:15 722K 
[ ]mesa3d.ll2025-07-15 07:15 1.2K 
[ ]mesa_regression.ll2025-07-15 07:15 417  
[ ]mfma-bf16-vgpr-cd-select.ll2025-07-15 07:15 8.4K 
[ ]mfma-cd-select.ll2025-07-15 07:15 6.2K 
[ ]mfma-loop.ll2025-07-15 07:15 117K 
[ ]mfma-no-register-aliasing.ll2025-07-15 07:15 51K 
[ ]mfma-vgpr-cd-select-gfx942.ll2025-07-15 07:15 16K 
[ ]mfma-vgpr-cd-select.ll2025-07-15 07:15 7.9K 
[ ]min-waves-per-eu-not-respected.ll2025-07-15 07:15 873  
[ ]min.ll2025-07-15 07:15 165K 
[ ]min3.ll2025-07-15 07:15 13K 
[ ]minimummaximum.ll2025-07-15 07:15 8.5K 
[ ]minimumnum.bf16.ll2025-07-15 07:15 854K 
[ ]minimumnum.ll2025-07-15 07:15 392K 
[ ]minmax.ll2025-07-15 07:15 41K 
[ ]mir-print-dead-csr-fi.mir2025-07-15 07:15 722  
[ ]misched-killflags.mir2025-07-15 07:15 2.6K 
[ ]missing-store.ll2025-07-15 07:15 1.1K 
[ ]mixed-vmem-types.ll2025-07-15 07:15 8.1K 
[ ]mixed-wave32-wave64.ll2025-07-15 07:15 1.4K 
[ ]mixed_wave32_wave64.ll2025-07-15 07:15 5.3K 
[ ]mmo-target-flags-folding.ll2025-07-15 07:15 955  
[ ]mmra.ll2025-07-15 07:15 20K 
[ ]mode-register-fpconstrain.ll2025-07-15 07:15 1.7K 
[ ]mode-register-fptrunc.gfx11plus-fake16.mir2025-07-15 07:15 2.7K 
[ ]mode-register-fptrunc.gfx11plus.mir2025-07-15 07:15 2.7K 
[ ]mode-register-fptrunc.mir2025-07-15 07:15 2.6K 
[ ]mode-register.mir2025-07-15 07:15 14K 
[ ]module-lds-false-sharing.ll2025-07-15 07:15 9.3K 
[ ]move-addr64-rsrc-dead-subreg-writes.ll2025-07-15 07:15 1.3K 
[ ]move-load-addr-to-valu.mir2025-07-15 07:15 20K 
[ ]move-to-valu-addsubu64.ll2025-07-15 07:15 8.5K 
[ ]move-to-valu-atomicrmw-system.ll2025-07-15 07:15 4.9K 
[ ]move-to-valu-atomicrmw.ll2025-07-15 07:15 3.7K 
[ ]move-to-valu-ctlz-cttz.ll2025-07-15 07:15 15K 
[ ]move-to-valu-lshlrev.mir2025-07-15 07:15 1.8K 
[ ]move-to-valu-pseudo-scalar-trans-f16-fake16.ll2025-07-15 07:15 7.7K 
[ ]move-to-valu-pseudo-scalar-trans-f16-true16.ll2025-07-15 07:15 9.0K 
[ ]move-to-valu-pseudo-scalar-trans.ll2025-07-15 07:15 7.3K 
[ ]move-to-valu-vimage-vsample.ll2025-07-15 07:15 32K 
[ ]move-to-valu-worklist.ll2025-07-15 07:15 1.0K 
[ ]movreld-bug.ll2025-07-15 07:15 854  
[ ]movrels-bug.mir2025-07-15 07:15 1.3K 
[ ]mubuf-legalize-operands-non-ptr-intrinsics.ll2025-07-15 07:15 65K 
[ ]mubuf-legalize-operands.ll2025-07-15 07:15 69K 
[ ]mubuf-legalize-operands.mir2025-07-15 07:15 39K 
[ ]mubuf-offset-private.ll2025-07-15 07:15 6.6K 
[ ]mubuf-shader-vgpr-non-ptr-intrinsics.ll2025-07-15 07:15 2.3K 
[ ]mubuf-shader-vgpr.ll2025-07-15 07:15 2.3K 
[ ]mubuf.ll2025-07-15 07:15 8.0K 
[ ]mul.i16.ll2025-07-15 07:15 3.1K 
[ ]mul.ll2025-07-15 07:15 121K 
[ ]mul24-pass-ordering.ll2025-07-15 07:15 11K 
[ ]mul_int24.ll2025-07-15 07:15 33K 
[ ]mul_uint24-amdgcn.ll2025-07-15 07:15 30K 
[ ]mul_uint24-r600.ll2025-07-15 07:15 9.7K 
[ ]multi-call-resource-usage-mcexpr.ll2025-07-15 07:15 3.3K 
[ ]multi-divergent-exit-region.ll2025-07-15 07:15 27K 
[ ]multi-dword-vgpr-spill.ll2025-07-15 07:15 10K 
[ ]multilevel-break.ll2025-07-15 07:15 11K 
[ ]naked-fn-with-frame-pointer.ll2025-07-15 07:15 1.6K 
[ ]nand.ll2025-07-15 07:15 2.2K 
[ ]narrow_math_for_and.ll2025-07-15 07:15 8.5K 
[ ]need-fp-from-vgpr-spills.ll2025-07-15 07:15 11K 
[ ]neg_ashr64_reduce.ll2025-07-15 07:15 7.8K 
[ ]neighboring-mfma-padding.mir2025-07-15 07:15 100K 
[ ]nested-calls.ll2025-07-15 07:15 4.2K 
[ ]nested-loop-conditions.ll2025-07-15 07:15 16K 
[ ]no-bundle-asm.ll2025-07-15 07:15 1.1K 
[ ]no-corresponding-integer-type.ll2025-07-15 07:15 1.4K 
[ ]no-dup-inst-prefetch.ll2025-07-15 07:15 5.4K 
[ ]no-fold-accvgpr-mov.ll2025-07-15 07:15 8.1K 
[ ]no-fold-accvgpr-mov.mir2025-07-15 07:15 15K 
[ ]no-fold-accvgpr-read.mir2025-07-15 07:15 14K 
[ ]no-hsa-graphics-shaders.ll2025-07-15 07:15 2.1K 
[ ]no-initializer-constant-addrspace.ll2025-07-15 07:15 1.3K 
[ ]no-remat-indirect-mov.mir2025-07-15 07:15 6.6K 
[ ]no-shrink-extloads.ll2025-07-15 07:15 7.9K 
[ ]no-source-locations-in-prologue.ll2025-07-15 07:15 3.4K 
[ ]noclobber-barrier.ll2025-07-15 07:15 34K 
[ ]non-entry-alloca.ll2025-07-15 07:15 17K 
[ ]noop-shader-O0.ll2025-07-15 07:15 1.3K 
[ ]nop-data.ll2025-07-15 07:15 1.8K 
[ ]nor-divergent-lanemask.ll2025-07-15 07:15 4.9K 
[ ]nor.ll2025-07-15 07:15 2.2K 
[ ]not-scalarize-volatile-load.ll2025-07-15 07:15 725  
[ ]nsa-reassign.ll2025-07-15 07:15 5.4K 
[ ]nsa-reassign.mir2025-07-15 07:15 4.2K 
[ ]nsa-vmem-hazard.mir2025-07-15 07:15 3.2K 
[ ]nullptr-long-address-spaces.ll2025-07-15 07:15 670  
[ ]nullptr.ll2025-07-15 07:15 4.1K 
[ ]occupancy-levels.ll2025-07-15 07:15 15K 
[ ]offset-split-flat.ll2025-07-15 07:15 258K 
[ ]offset-split-global.ll2025-07-15 07:15 250K 
[ ]omod-nsz-flag.mir2025-07-15 07:15 2.1K 
[ ]omod.ll2025-07-15 07:15 48K 
[ ]opencl-image-metadata.ll2025-07-15 07:15 702  
[ ]opencl-printf-and-hostcall.ll2025-07-15 07:15 776  
[ ]opencl-printf-pipeline.ll2025-07-15 07:15 1.4K 
[ ]opencl-printf-unsupported.ll2025-07-15 07:15 3.8K 
[ ]opencl-printf.ll2025-07-15 07:15 117K 
[ ]operand-folding.ll2025-07-15 07:15 5.4K 
[ ]operand-spacing.ll2025-07-15 07:15 1.1K 
[ ]opt-exec-masking-pre-ra-update-liveness-wave32.mir2025-07-15 07:15 7.2K 
[ ]opt-exec-masking-pre-ra-update-liveness.mir2025-07-15 07:15 26K 
[ ]opt-sgpr-to-vgpr-copy.mir2025-07-15 07:15 20K 
[ ]opt-vgpr-live-range-verifier-error.mir2025-07-15 07:15 1.6K 
[ ]opt_exec_copy_fold.mir2025-07-15 07:15 665  
[ ]optimize-compare.ll2025-07-15 07:15 2.8K 
[ ]optimize-compare.mir2025-07-15 07:15 62K 
[ ]optimize-exec-copies-extra-insts-after-copy.mir2025-07-15 07:15 2.4K 
[ ]optimize-exec-mask-pre-ra-alloc-failure.mir2025-07-15 07:15 15K 
[ ]optimize-exec-mask-pre-ra-def-after-use.mir2025-07-15 07:15 4.2K 
[ ]optimize-exec-mask-pre-ra-loop-phi.mir2025-07-15 07:15 8.0K 
[ ]optimize-exec-mask-pre-ra-non-empty-but-used-interval.mir2025-07-15 07:15 6.5K 
[ ]optimize-exec-masking-pre-ra.mir2025-07-15 07:15 5.6K 
[ ]optimize-exec-masking-strip-terminator-bits.mir2025-07-15 07:15 1.9K 
[ ]optimize-if-exec-masking.mir2025-07-15 07:15 16K 
[ ]optimize-negated-cond-exec-masking-wave32.mir2025-07-15 07:15 11K 
[ ]optimize-negated-cond-exec-masking.mir2025-07-15 07:15 14K 
[ ]optimize-negated-cond.ll2025-07-15 07:15 5.4K 
[ ]or.ll2025-07-15 07:15 47K 
[ ]or3.ll2025-07-15 07:15 3.9K 
[ ]overlapping-tuple-copy-implicit-op-failure.ll2025-07-15 07:15 4.6K 
[ ]pack.v2f16.ll2025-07-15 07:15 24K 
[ ]pack.v2i16.ll2025-07-15 07:15 22K 
[ ]packed-fp32.ll2025-07-15 07:15 111K 
[ ]packed-op-sel.ll2025-07-15 07:15 35K 
[ ]packetizer.ll2025-07-15 07:15 1.0K 
[ ]pal-metadata-3.0-callable-dvgpr.ll2025-07-15 07:15 12K 
[ ]pal-metadata-3.0-callable.ll2025-07-15 07:15 13K 
[ ]pal-metadata-3.0-dvgpr.ll2025-07-15 07:15 9.2K 
[ ]pal-metadata-3.0.ll2025-07-15 07:15 9.2K 
[ ]pal-metadata-3.6.ll2025-07-15 07:15 9.0K 
[ ]pal-simple-indirect-call.ll2025-07-15 07:15 2.6K 
[ ]pal-userdata-regs.ll2025-07-15 07:15 2.7K 
[ ]parallelandifcollapse.ll2025-07-15 07:15 2.2K 
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[ ]r600.amdgpu-alias-analysis.ll2025-07-15 07:15 366  
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[ ]r600.sub.ll2025-07-15 07:15 5.9K 
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[ ]read-register-invalid-type-i32.ll2025-07-15 07:15 436  
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[ ]read_register.ll2025-07-15 07:15 3.0K 
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[ ]reduce-load-width-alignment.ll2025-07-15 07:15 1.8K 
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[ ]reg-coalescer-sched-crash.ll2025-07-15 07:15 3.9K 
[ ]reg-sequence-like-v-pk-mov-b32.mir2025-07-15 07:15 19K 
[ ]regalloc-fail-unsatisfiable-overlapping-tuple-hints.mir2025-07-15 07:15 4.2K 
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[ ]regalloc-fast-dont-drop-subreg-index-issue61134.mir2025-07-15 07:15 2.0K 
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[ ]regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir2025-07-15 07:15 2.1K 
[ ]regcoalesce-prune.mir2025-07-15 07:15 925  
[ ]regcoalescer-resolve-lane-conflict-by-subranges.mir2025-07-15 07:15 7.0K 
[ ]regcoalescing-remove-partial-redundancy-assert.mir2025-07-15 07:15 5.7K 
[ ]register-coalescer--set-undef-full-reg-use-implicit-def-erase-issue109249.mir2025-07-15 07:15 1.9K 
[ ]register-count-comments.ll2025-07-15 07:15 1.3K 
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[ ]reject-agpr-usage-before-gfx908.ll2025-07-15 07:15 376  
[ ]rel32.ll2025-07-15 07:15 1.2K 
[ ]release-vgprs-dbg-loc.mir2025-07-15 07:15 1.6K 
[ ]release-vgprs-gfx12-dvgpr.mir2025-07-15 07:15 10K 
[ ]release-vgprs-gfx12.mir2025-07-15 07:15 10K 
[ ]release-vgprs.mir2025-07-15 07:15 26K 
[ ]rem_i128.ll2025-07-15 07:15 157K 
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[ ]remat-dead-subreg.mir2025-07-15 07:15 6.1K 
[ ]remat-fp64-constants.ll2025-07-15 07:15 2.4K 
[ ]remat-physreg-copy-subreg-extract-already-live-at-def-issue120970.mir2025-07-15 07:15 2.9K 
[ ]remat-smrd.mir2025-07-15 07:15 36K 
[ ]remat-sop.mir2025-07-15 07:15 26K 
[ ]remat-vop.mir2025-07-15 07:15 257K 
[ ]remove-incompatible-extended-image-insts.ll2025-07-15 07:15 2.4K 
[ ]remove-incompatible-functions.ll2025-07-15 07:15 14K 
[ ]remove-incompatible-gws.ll2025-07-15 07:15 2.2K 
[ ]remove-incompatible-s-time.ll2025-07-15 07:15 3.7K 
[ ]remove-incompatible-wave32-feature.ll2025-07-15 07:15 2.9K 
[ ]remove-no-kernel-id-attribute.ll2025-07-15 07:15 12K 
[ ]remove-not-short-exec-branch-on-unconditional-jump.mir2025-07-15 07:15 3.3K 
[ ]remove-register-flags.mir2025-07-15 07:15 2.1K 
[ ]remove-short-exec-branches-gpr-idx-mode.mir2025-07-15 07:15 3.7K 
[ ]remove-short-exec-branches-special-instructions.mir2025-07-15 07:15 5.1K 
[ ]rename-disconnected-bug.ll2025-07-15 07:15 884  
[ ]rename-independent-subregs-mac-operands.mir2025-07-15 07:15 5.8K 
[ ]rename-independent-subregs.mir2025-07-15 07:15 3.0K 
[ ]reorder-stores.ll2025-07-15 07:15 2.8K 
[ ]repeated-divisor.ll2025-07-15 07:15 44K 
[ ]replace-store-of-insert-load.ll2025-07-15 07:15 2.3K 
[ ]reqd-work-group-size.ll2025-07-15 07:15 23K 
[ ]required-export-priority.ll2025-07-15 07:15 12K 
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[ ]resource-usage-dead-function.ll2025-07-15 07:15 1.2K 
[ ]resource-usage-pal.ll2025-07-15 07:15 514  
[ ]ret.ll2025-07-15 07:15 12K 
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[ ]rewrite-out-arguments.ll2025-07-15 07:15 53K 
[ ]rewrite-partial-reg-uses-dbg.mir2025-07-15 07:15 5.3K 
[ ]rewrite-partial-reg-uses-gen.mir2025-07-15 07:15 286K 
[ ]rewrite-partial-reg-uses.mir2025-07-15 07:15 5.2K 
[ ]rewrite-undef-for-phi.ll2025-07-15 07:15 3.0K 
[ ]rewrite-vgpr-mfma-to-agpr.ll2025-07-15 07:15 10K 
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[ ]rsq.f32-safe.ll2025-07-15 07:15 95K 
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[ ]rsq.f64.ll2025-07-15 07:15 293K 
[ ]rv7x0_count3.ll2025-07-15 07:15 3.6K 
[ ]s-barrier-lowering.ll2025-07-15 07:15 2.5K 
[ ]s-getpc-b64-remat.ll2025-07-15 07:15 4.3K 
[ ]s_add_co_pseudo_lowering.mir2025-07-15 07:15 3.1K 
[ ]s_addk_i32.ll2025-07-15 07:15 4.2K 
[ ]s_code_end.ll2025-07-15 07:15 3.1K 
[ ]s_movk_i32.ll2025-07-15 07:15 7.6K 
[ ]s_mulk_i32.ll2025-07-15 07:15 5.3K 
[ ]s_or_saveexec_xor_combine.mir2025-07-15 07:15 4.4K 
[ ]sad.ll2025-07-15 07:15 20K 
[ ]saddo.ll2025-07-15 07:15 28K 
[ ]saddsat.ll2025-07-15 07:15 21K 
[ ]salu-to-valu.ll2025-07-15 07:15 20K 
[ ]same-slot-agpr-sgpr.mir2025-07-15 07:15 4.3K 
[ ]sampler-resource-id.ll2025-07-15 07:15 2.2K 
[ ]save-fp.ll2025-07-15 07:15 771  
[ ]scalar-branch-missing-and-exec.ll2025-07-15 07:15 2.1K 
[ ]scalar-float-sop1.ll2025-07-15 07:15 5.6K 
[ ]scalar-float-sop2.ll2025-07-15 07:15 9.2K 
[ ]scalar-float-sopc.ll2025-07-15 07:15 27K 
[ ]scalar-store-cache-flush.mir2025-07-15 07:15 3.5K 
[ ]scalar_to_vector.ll2025-07-15 07:15 14K 
[ ]scalar_to_vector.v8i16.ll2025-07-15 07:15 8.0K 
[ ]scalar_to_vector_v2x16.ll2025-07-15 07:15 881  
[ ]scalarize-insert-subvector.ll2025-07-15 07:15 1.3K 
[ ]scc-clobbered-sgpr-to-vmem-spill.ll2025-07-15 07:15 18K 
[ ]sched-assert-dead-def-subreg-use-other-subreg.mir2025-07-15 07:15 4.1K 
[ ]sched-assert-onlydbg-value-empty-region.mir2025-07-15 07:15 6.5K 
[ ]sched-barrier-hang-weak-dep.mir2025-07-15 07:15 2.3K 
[ ]sched-barrier-post-RA.mir2025-07-15 07:15 9.6K 
[ ]sched-barrier-pre-RA.mir2025-07-15 07:15 41K 
[ ]sched-crash-dbg-value.mir2025-07-15 07:15 19K 
[ ]sched-group-barrier-pipeline-solver.mir2025-07-15 07:15 32K 
[ ]sched-group-barrier-pre-RA.mir2025-07-15 07:15 31K 
[ ]sched-handleMoveUp-subreg-def-across-subreg-def.mir2025-07-15 07:15 11K 
[ ]sched-image-sample-post-RA.mir2025-07-15 07:15 22K 
[ ]sched-no-schedmodel.mir2025-07-15 07:15 4.1K 
[ ]sched-prefer-non-mfma.mir2025-07-15 07:15 1.6K 
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[ ]sched.barrier.inverted.mask.ll2025-07-15 07:15 2.8K 
[ ]schedule-addrspaces.ll2025-07-15 07:15 1.1K 
[ ]schedule-amdgpu-tracker-physreg-crash.ll2025-07-15 07:15 2.7K 
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[ ]schedule-amdgpu-trackers.ll2025-07-15 07:15 44K 
[ ]schedule-avoid-spills.ll2025-07-15 07:15 19K 
[ ]schedule-barrier-fpmode.mir2025-07-15 07:15 5.3K 
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[ ]schedule-fs-loop-nested-if.ll2025-07-15 07:15 3.9K 
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[ ]schedule-fs-loop.ll2025-07-15 07:15 3.9K 
[ ]schedule-global-loads.ll2025-07-15 07:15 1.7K 
[ ]schedule-if-2.ll2025-07-15 07:15 3.8K 
[ ]schedule-if.ll2025-07-15 07:15 2.0K 
[ ]schedule-ilp-liveness-tracking.mir2025-07-15 07:15 1.5K 
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[ ]schedule-ilp.mir2025-07-15 07:15 3.8K 
[ ]schedule-kernel-arg-loads.ll2025-07-15 07:15 2.8K 
[ ]schedule-physregdeps.mir2025-07-15 07:15 2.2K 
[ ]schedule-regpressure-ilp-metric-spills.mir2025-07-15 07:15 65K 
[ ]schedule-regpressure-lds.ll2025-07-15 07:15 8.0K 
[ ]schedule-regpressure-limit-clustering.ll2025-07-15 07:15 1.7K 
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[ ]schedule-regpressure-misched-max-waves.ll2025-07-15 07:15 6.5K 
[ ]schedule-regpressure.mir2025-07-15 07:15 2.2K 
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[ ]schedule-vs-if-nested-loop.ll2025-07-15 07:15 6.2K 
[ ]schedule-xdl-resource.ll2025-07-15 07:15 3.1K 
[ ]scheduler-handle-move-bundle.mir2025-07-15 07:15 2.5K 
[ ]scheduler-rp-calc-one-successor-two-predecessors-bug.ll2025-07-15 07:15 3.4K 
[ ]scheduler-subrange-crash.ll2025-07-15 07:15 4.9K 
[ ]scratch-buffer.ll2025-07-15 07:15 4.9K 
[ ]scratch-pointer-sink.ll2025-07-15 07:15 1.7K 
[ ]scratch-simple.ll2025-07-15 07:15 436K 
[ ]sdag-print-divergence.ll2025-07-15 07:15 1.7K 
[ ]sdiv.ll2025-07-15 07:15 92K 
[ ]sdiv64.ll2025-07-15 07:15 83K 
[ ]sdivrem24.ll2025-07-15 07:15 10K 
[ ]sdivrem64.r600.ll2025-07-15 07:15 2.6K 
[ ]sdwa-commute.ll2025-07-15 07:15 2.3K 
[ ]sdwa-cse.mir2025-07-15 07:15 3.4K 
[ ]sdwa-gfx9.mir2025-07-15 07:15 3.9K 
[ ]sdwa-op64-test.ll2025-07-15 07:15 4.0K 
[ ]sdwa-ops.mir2025-07-15 07:15 14K 
[ ]sdwa-peephole-cndmask-fail.ll2025-07-15 07:15 3.3K 
[ ]sdwa-peephole-cndmask-sext.ll2025-07-15 07:15 831  
[ ]sdwa-peephole-cndmask-wave32.mir2025-07-15 07:15 15K 
[ ]sdwa-peephole-cndmask-wave64.mir2025-07-15 07:15 12K 
[ ]sdwa-peephole-instr-combine-sel-dst.mir2025-07-15 07:15 13K 
[ ]sdwa-peephole-instr-combine-sel-src.mir2025-07-15 07:15 49K 
[ ]sdwa-peephole-instr-combine-sel.ll2025-07-15 07:15 3.5K 
[ ]sdwa-peephole-instr-combine-sel.mir2025-07-15 07:15 4.9K 
[ ]sdwa-peephole-instr-gfx10.mir2025-07-15 07:15 13K 
[ ]sdwa-peephole-instr.mir2025-07-15 07:15 22K 
[ ]sdwa-peephole.ll2025-07-15 07:15 95K 
[ ]sdwa-preserve.mir2025-07-15 07:15 13K 
[ ]sdwa-scalar-ops.mir2025-07-15 07:15 15K 
[ ]sdwa-stack.mir2025-07-15 07:15 1.0K 
[ ]sdwa-vop2-64bit.mir2025-07-15 07:15 2.5K 
[ ]select-constant-cttz.ll2025-07-15 07:15 1.8K 
[ ]select-constant-xor.ll2025-07-15 07:15 4.5K 
[ ]select-fabs-fneg-extract-legacy.ll2025-07-15 07:15 1.7K 
[ ]select-fabs-fneg-extract.f16.ll2025-07-15 07:15 133K 
[ ]select-fabs-fneg-extract.legal.f16.ll2025-07-15 07:15 887  
[ ]select-fabs-fneg-extract.ll2025-07-15 07:15 38K 
[ ]select-fabs-fneg-extract.v2f16.ll2025-07-15 07:15 247K 
[ ]select-flags-to-fmin-fmax.ll2025-07-15 07:15 86K 
[ ]select-i1.ll2025-07-15 07:15 1.2K 
[ ]select-opt.ll2025-07-15 07:15 7.2K 
[ ]select-phi-s16-fp.ll2025-07-15 07:15 5.2K 
[ ]select-undef.ll2025-07-15 07:15 28K 
[ ]select-vectors.ll2025-07-15 07:15 15K 
[ ]select.f16.ll2025-07-15 07:15 163K 
[ ]select.ll2025-07-15 07:15 2.0K 
[ ]select64.ll2025-07-15 07:15 2.3K 
[ ]selectcc-cnd.ll2025-07-15 07:15 413  
[ ]selectcc-cnde-int.ll2025-07-15 07:15 398  
[ ]selectcc-icmp-select-float.ll2025-07-15 07:15 1.1K 
[ ]selectcc-opt.ll2025-07-15 07:15 2.2K 
[ ]selectcc.ll2025-07-15 07:15 767  
[ ]sema-v-unsched-bundle.ll2025-07-15 07:15 618  
[ ]sendmsg-m0-hazard.mir2025-07-15 07:15 1.4K 
[ ]set-dx10.ll2025-07-15 07:15 5.1K 
[ ]set-gpr-idx-peephole.mir2025-07-15 07:15 45K 
[ ]set-inactive-wwm-overwrite.ll2025-07-15 07:15 5.0K 
[ ]set-wave-priority.ll2025-07-15 07:15 7.0K 
[ ]set_kill_i1_for_floation_point_comparison.ll2025-07-15 07:15 2.1K 
[ ]setcc-equivalent.ll2025-07-15 07:15 933  
[ ]setcc-fneg-constant.ll2025-07-15 07:15 9.3K 
[ ]setcc-limit-load-shrink.ll2025-07-15 07:15 2.8K 
[ ]setcc-multiple-use.ll2025-07-15 07:15 1.0K 
[ ]setcc-opt.ll2025-07-15 07:15 9.6K 
[ ]setcc-sext.ll2025-07-15 07:15 7.8K 
[ ]setcc.ll2025-07-15 07:15 14K 
[ ]setcc64.ll2025-07-15 07:15 7.6K 
[ ]seto.ll2025-07-15 07:15 518  
[ ]setuo.ll2025-07-15 07:15 494  
[ ]sext-divergence-driven-isel.ll2025-07-15 07:15 4.7K 
[ ]sext-eliminate.ll2025-07-15 07:15 852  
[ ]sext-in-reg-failure-r600.ll2025-07-15 07:15 676  
[ ]sext-in-reg-vector-shuffle.ll2025-07-15 07:15 4.3K 
[ ]sext-in-reg.ll2025-07-15 07:15 27K 
[ ]sgpr-control-flow.ll2025-07-15 07:15 7.2K 
[ ]sgpr-copy-duplicate-operand.ll2025-07-15 07:15 902  
[ ]sgpr-copy-local-cse.ll2025-07-15 07:15 942  
[ ]sgpr-copy.ll2025-07-15 07:15 21K 
[ ]sgpr-phys-copy.mir2025-07-15 07:15 33K 
[ ]sgpr-regalloc-flags.ll2025-07-15 07:15 6.6K 
[ ]sgpr-spill-dead-frame-in-dbg-value.mir2025-07-15 07:15 3.6K 
[ ]sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir2025-07-15 07:15 2.3K 
[ ]sgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir2025-07-15 07:15 2.6K 
[ ]sgpr-spill-incorrect-fi-bookkeeping-bug.ll2025-07-15 07:15 3.1K 
[ ]sgpr-spill-no-vgprs.ll2025-07-15 07:15 9.3K 
[ ]sgpr-spill-overlap-wwm-reserve.mir2025-07-15 07:15 16K 
[ ]sgpr-spill-partially-undef.mir2025-07-15 07:15 3.3K 
[ ]sgpr-spill-to-vmem-scc-clobber-unhandled.mir2025-07-15 07:15 4.4K 
[ ]sgpr-spill-to-vmem-scc-clobber.mir2025-07-15 07:15 73K 
[ ]sgpr-spill-update-only-slot-indexes.ll2025-07-15 07:15 1.7K 
[ ]sgpr-spill-vmem-large-frame.mir2025-07-15 07:15 2.9K 
[ ]sgpr-spill-wrong-stack-id.mir2025-07-15 07:15 6.8K 
[ ]sgpr-spill.mir2025-07-15 07:15 121K 
[ ]sgpr-spills-empty-prolog-block.mir2025-07-15 07:15 1.2K 
[ ]sgpr-spills-split-regalloc.ll2025-07-15 07:15 163K 
[ ]sgprcopies.ll2025-07-15 07:15 2.6K 
[ ]shader-addr64-nonuniform.ll2025-07-15 07:15 4.2K 
[ ]shared-op-cycle.ll2025-07-15 07:15 1.8K 
[ ]shift-and-i64-ubfe.ll2025-07-15 07:15 27K 
[ ]shift-and-i128-ubfe.ll2025-07-15 07:15 6.8K 
[ ]shift-i64-opts.ll2025-07-15 07:15 11K 
[ ]shift-i128.ll2025-07-15 07:15 26K 
[ ]shift-select.ll2025-07-15 07:15 4.7K 
[ ]shl-add-to-add-shl.ll2025-07-15 07:15 1.5K 
[ ]shl.ll2025-07-15 07:15 79K 
[ ]shl.v2i16.ll2025-07-15 07:15 28K 
[ ]shl64_reduce.ll2025-07-15 07:15 20K 
[ ]shl64_reduce_flags.ll2025-07-15 07:15 5.1K 
[ ]shl_add.ll2025-07-15 07:15 4.0K 
[ ]shl_add_constant.ll2025-07-15 07:15 3.3K 
[ ]shl_add_ptr.ll2025-07-15 07:15 45K 
[ ]shl_add_ptr_csub.ll2025-07-15 07:15 1.2K 
[ ]shl_add_ptr_global.ll2025-07-15 07:15 2.4K 
[ ]shl_or.ll2025-07-15 07:15 5.8K 
[ ]should-not-hoist-set-inactive.ll2025-07-15 07:15 2.6K 
[ ]shrink-add-sub-constant.ll2025-07-15 07:15 188K 
[ ]shrink-carry.mir2025-07-15 07:15 2.8K 
[ ]shrink-fma-f64.mir2025-07-15 07:15 2.5K 
[ ]shrink-i32-kimm.mir2025-07-15 07:15 1.6K 
[ ]shrink-instructions-flags.mir2025-07-15 07:15 1.0K 
[ ]shrink-instructions-illegal-fold.mir2025-07-15 07:15 1.0K 
[ ]shrink-instructions-implicit-vcclo.mir2025-07-15 07:15 1.2K 
[ ]shrink-insts-scalar-bit-ops.mir2025-07-15 07:15 2.8K 
[ ]shrink-mad-fma-fake16.mir2025-07-15 07:15 7.7K 
[ ]shrink-mad-fma-gfx10.mir2025-07-15 07:15 7.8K 
[ ]shrink-mad-fma.mir2025-07-15 07:15 7.8K 
[ ]shrink-true16.mir2025-07-15 07:15 1.1K 
[ ]shrink-v-cmp-wave32-dead-vcc-lo.mir2025-07-15 07:15 1.8K 
[ ]shrink-vop3-carry-out.mir2025-07-15 07:15 16K 
[ ]shufflevector-physreg-copy.ll2025-07-15 07:15 33K 
[ ]shufflevector.v2bf16.v2bf16.ll2025-07-15 07:15 69K 
[ ]shufflevector.v2bf16.v3bf16.ll2025-07-15 07:15 163K 
[ ]shufflevector.v2bf16.v4bf16.ll2025-07-15 07:15 256K 
[ ]shufflevector.v2bf16.v8bf16.ll2025-07-15 07:15 969K 
[ ]shufflevector.v2f16.v2f16.ll2025-07-15 07:15 68K 
[ ]shufflevector.v2f16.v3f16.ll2025-07-15 07:15 161K 
[ ]shufflevector.v2f16.v4f16.ll2025-07-15 07:15 254K 
[ ]shufflevector.v2f16.v8f16.ll2025-07-15 07:15 959K 
[ ]shufflevector.v2f32.v2f32.ll2025-07-15 07:15 65K 
[ ]shufflevector.v2f32.v3f32.ll2025-07-15 07:15 139K 
[ ]shufflevector.v2f32.v4f32.ll2025-07-15 07:15 241K 
[ ]shufflevector.v2f32.v8f32.ll2025-07-15 07:15 902K 
[ ]shufflevector.v2i16.v2i16.ll2025-07-15 07:15 67K 
[ ]shufflevector.v2i16.v3i16.ll2025-07-15 07:15 159K 
[ ]shufflevector.v2i16.v4i16.ll2025-07-15 07:15 249K 
[ ]shufflevector.v2i16.v8i16.ll2025-07-15 07:15 936K 
[ ]shufflevector.v2i32.v2i32.ll2025-07-15 07:15 65K 
[ ]shufflevector.v2i32.v3i32.ll2025-07-15 07:15 139K 
[ ]shufflevector.v2i32.v4i32.ll2025-07-15 07:15 240K 
[ ]shufflevector.v2i32.v8i32.ll2025-07-15 07:15 896K 
[ ]shufflevector.v2i64.v2i64.ll2025-07-15 07:15 68K 
[ ]shufflevector.v2i64.v3i64.ll2025-07-15 07:15 145K 
[ ]shufflevector.v2i64.v4i64.ll2025-07-15 07:15 242K 
[ ]shufflevector.v2i64.v8i64.ll2025-07-15 07:15 1.0M 
[ ]shufflevector.v2p0.v2p0.ll2025-07-15 07:15 68K 
[ ]shufflevector.v2p0.v3p0.ll2025-07-15 07:15 145K 
[ ]shufflevector.v2p0.v4p0.ll2025-07-15 07:15 241K 
[ ]shufflevector.v2p3.v2p3.ll2025-07-15 07:15 67K 
[ ]shufflevector.v2p3.v3p3.ll2025-07-15 07:15 143K 
[ ]shufflevector.v2p3.v4p3.ll2025-07-15 07:15 248K 
[ ]shufflevector.v2p3.v8p3.ll2025-07-15 07:15 926K 
[ ]shufflevector.v3bf16.v2bf16.ll2025-07-15 07:15 149K 
[ ]shufflevector.v3bf16.v3bf16.ll2025-07-15 07:15 354K 
[ ]shufflevector.v3bf16.v4bf16.ll2025-07-15 07:15 571K 
[ ]shufflevector.v3f16.v2f16.ll2025-07-15 07:15 147K 
[ ]shufflevector.v3f16.v3f16.ll2025-07-15 07:15 349K 
[ ]shufflevector.v3f16.v4f16.ll2025-07-15 07:15 565K 
[ ]shufflevector.v3f32.v2f32.ll2025-07-15 07:15 137K 
[ ]shufflevector.v3f32.v3f32.ll2025-07-15 07:15 290K 
[ ]shufflevector.v3f32.v4f32.ll2025-07-15 07:15 507K 
[ ]shufflevector.v3i16.v2i16.ll2025-07-15 07:15 144K 
[ ]shufflevector.v3i16.v3i16.ll2025-07-15 07:15 343K 
[ ]shufflevector.v3i16.v4i16.ll2025-07-15 07:15 552K 
[ ]shufflevector.v3i32.v2i32.ll2025-07-15 07:15 136K 
[ ]shufflevector.v3i32.v3i32.ll2025-07-15 07:15 288K 
[ ]shufflevector.v3i32.v4i32.ll2025-07-15 07:15 504K 
[ ]shufflevector.v3i64.v2i64.ll2025-07-15 07:15 152K 
[ ]shufflevector.v3i64.v3i64.ll2025-07-15 07:15 316K 
[ ]shufflevector.v3i64.v4i64.ll2025-07-15 07:15 558K 
[ ]shufflevector.v3p0.v2p0.ll2025-07-15 07:15 151K 
[ ]shufflevector.v3p0.v3p0.ll2025-07-15 07:15 314K 
[ ]shufflevector.v3p0.v4p0.ll2025-07-15 07:15 556K 
[ ]shufflevector.v3p3.v2p3.ll2025-07-15 07:15 141K 
[ ]shufflevector.v3p3.v3p3.ll2025-07-15 07:15 297K 
[ ]shufflevector.v3p3.v4p3.ll2025-07-15 07:15 520K 
[ ]shufflevector.v4bf16.v2bf16.ll2025-07-15 07:15 235K 
[ ]shufflevector.v4bf16.v3bf16.ll2025-07-15 07:15 549K 
[ ]shufflevector.v4bf16.v4bf16.ll2025-07-15 07:15 878K 
[ ]shufflevector.v4f16.v2f16.ll2025-07-15 07:15 233K 
[ ]shufflevector.v4f16.v3f16.ll2025-07-15 07:15 542K 
[ ]shufflevector.v4f16.v4f16.ll2025-07-15 07:15 871K 
[ ]shufflevector.v4f32.v2f32.ll2025-07-15 07:15 195K 
[ ]shufflevector.v4f32.v3f32.ll2025-07-15 07:15 470K 
[ ]shufflevector.v4f32.v4f32.ll2025-07-15 07:15 806K 
[ ]shufflevector.v4i16.v2i16.ll2025-07-15 07:15 220K 
[ ]shufflevector.v4i16.v3i16.ll2025-07-15 07:15 530K 
[ ]shufflevector.v4i16.v4i16.ll2025-07-15 07:15 836K 
[ ]shufflevector.v4i32.v2i32.ll2025-07-15 07:15 194K 
[ ]shufflevector.v4i32.v3i32.ll2025-07-15 07:15 468K 
[ ]shufflevector.v4i32.v4i32.ll2025-07-15 07:15 801K 
[ ]shufflevector.v4i64.v2i64.ll2025-07-15 07:15 226K 
[ ]shufflevector.v4i64.v3i64.ll2025-07-15 07:15 540K 
[ ]shufflevector.v4i64.v4i64.ll2025-07-15 07:15 922K 
[ ]shufflevector.v4p0.v2p0.ll2025-07-15 07:15 225K 
[ ]shufflevector.v4p0.v3p0.ll2025-07-15 07:15 538K 
[ ]shufflevector.v4p0.v4p0.ll2025-07-15 07:15 919K 
[ ]shufflevector.v4p3.v2p3.ll2025-07-15 07:15 201K 
[ ]shufflevector.v4p3.v3p3.ll2025-07-15 07:15 482K 
[ ]shufflevector.v4p3.v4p3.ll2025-07-15 07:15 826K 
[ ]si-annotate-cf-kill.ll2025-07-15 07:15 4.8K 
[ ]si-annotate-cf-noloop.ll2025-07-15 07:15 3.8K 
[ ]si-annotate-cf-unreachable.ll2025-07-15 07:15 1.5K 
[ ]si-annotate-cf.ll2025-07-15 07:15 7.6K 
[ ]si-annotate-cfg-loop-assert.ll2025-07-15 07:15 1.3K 
[ ]si-annotate-dbg-info.ll2025-07-15 07:15 9.7K 
[ ]si-annotate-nested-control-flows.ll2025-07-15 07:15 2.2K 
[ ]si-annotatecfg-multiple-backedges.ll2025-07-15 07:15 2.8K 
[ ]si-fix-sgpr-copies-copy-to-sgpr.mir2025-07-15 07:15 2.1K 
[ ]si-fix-sgpr-copies.mir2025-07-15 07:15 3.4K 
[ ]si-fold-aligned-agprs.mir2025-07-15 07:15 8.9K 
[ ]si-fold-aligned-vgprs.mir2025-07-15 07:15 13K 
[ ]si-fold-copy-kills.mir2025-07-15 07:15 2.9K 
[ ]si-fold-kimm.mir2025-07-15 07:15 3.1K 
[ ]si-fold-operands-agpr-copy-reg-sequence.mir2025-07-15 07:15 41K 
[ ]si-fold-operands-commute-same-operands-assert.mir2025-07-15 07:15 2.7K 
[ ]si-fold-operands-requires-ssa.mir2025-07-15 07:15 751  
[ ]si-fold-operands-subreg-imm.gfx942.mir2025-07-15 07:15 9.6K 
[ ]si-fold-operands-subreg-imm.mir2025-07-15 07:15 7.7K 
[ ]si-fold-reg-sequence.mir2025-07-15 07:15 591  
[ ]si-fold-scalar-clamp.mir2025-07-15 07:15 1.3K 
[ ]si-i1-copies.mir2025-07-15 07:15 1.0K 
[ ]si-init-whole-wave.mir2025-07-15 07:15 6.5K 
[ ]si-instr-info-correct-implicit-operands.ll2025-07-15 07:15 726  
[ ]si-instr-info-vopc-exec.mir2025-07-15 07:15 1.3K 
[ ]si-lower-control-flow-kill.ll2025-07-15 07:15 1.6K 
[ ]si-lower-control-flow-unreachable-block.ll2025-07-15 07:15 2.0K 
[ ]si-lower-control-flow.mir2025-07-15 07:15 16K 
[ ]si-lower-i1-copies-order-of-phi-incomings.mir2025-07-15 07:15 7.8K 
[ ]si-lower-i1-copies.mir2025-07-15 07:15 1.1K 
[ ]si-lower-sgpr-spills-vgpr-lanes-usage.mir2025-07-15 07:15 14K 
[ ]si-lower-sgpr-spills.mir2025-07-15 07:15 713  
[ ]si-lower-wwm-copies.mir2025-07-15 07:15 1.6K 
[ ]si-opt-vgpr-liverange-bug-deadlanes.mir2025-07-15 07:15 5.0K 
[ ]si-optimize-vgpr-live-range-dbg-instr.ll2025-07-15 07:15 3.4K 
[ ]si-optimize-vgpr-live-range-dbg-instr.mir2025-07-15 07:15 5.8K 
[ ]si-pre-allocate-wwm-regs.mir2025-07-15 07:15 3.3K 
[ ]si-scheduler-exports.ll2025-07-15 07:15 1.2K 
[ ]si-scheduler.ll2025-07-15 07:15 4.2K 
[ ]si-sgpr-spill.ll2025-07-15 07:15 92K 
[ ]si-spill-cf.ll2025-07-15 07:15 25K 
[ ]si-triv-disjoint-mem-access.ll2025-07-15 07:15 27K 
[ ]si-unify-exit-multiple-unreachables.ll2025-07-15 07:15 3.8K 
[ ]si-unify-exit-return-unreachable.ll2025-07-15 07:15 9.9K 
[ ]si-vector-hang.ll2025-07-15 07:15 5.3K 
[ ]sibling-call.ll2025-07-15 07:15 46K 
[ ]sign_extend.ll2025-07-15 07:15 22K 
[ ]simple-indirect-call-2.ll2025-07-15 07:15 5.8K 
[ ]simple-indirect-call.ll2025-07-15 07:15 3.3K 
[ ]simplify-libcall-nobuiltin-def.ll2025-07-15 07:15 2.0K 
[ ]simplify-libcalls.ll2025-07-15 07:15 36K 
[ ]simplify-libcalls2.ll2025-07-15 07:15 1.2K 
[ ]simplifydemandedbits-recursion.ll2025-07-15 07:15 6.3K 
[ ]sink-after-control-flow-postra.mir2025-07-15 07:15 17K 
[ ]sink-after-control-flow.mir2025-07-15 07:15 5.2K 
[ ]sink-image-sample.ll2025-07-15 07:15 10K 
[ ]sint_to_fp.f64.ll2025-07-15 07:15 16K 
[ ]sint_to_fp.i64.ll2025-07-15 07:15 53K 
[ ]sint_to_fp.ll2025-07-15 07:15 4.5K 
[ ]sitofp.f16.ll2025-07-15 07:15 20K 
[ ]skip-branch-taildup-ret.mir2025-07-15 07:15 11K 
[ ]skip-branch-trap.ll2025-07-15 07:15 1.6K 
[ ]skip-fold-regsequence.mir2025-07-15 07:15 2.5K 
[ ]skip-if-dead.ll2025-07-15 07:15 79K 
[ ]skip-promote-alloca-vector-users.ll2025-07-15 07:15 1.4K 
[ ]smed3.ll2025-07-15 07:15 26K 
[ ]smem-no-clause-coalesced.mir2025-07-15 07:15 1.6K 
[ ]smem-war-hazard.mir2025-07-15 07:15 9.3K 
[ ]smfmac_no_agprs.ll2025-07-15 07:15 2.7K 
[ ]sminmax.ll2025-07-15 07:15 10K 
[ ]sminmax.v2i16.ll2025-07-15 07:15 42K 
[ ]smrd-fold-offset.mir2025-07-15 07:15 1.7K 
[ ]smrd-gfx10.ll2025-07-15 07:15 2.0K 
[ ]smrd-vccz-bug.ll2025-07-15 07:15 1.6K 
[ ]smrd.ll2025-07-15 07:15 41K 
[ ]smrd_vmem_war.ll2025-07-15 07:15 1.0K 
[ ]snippet-copy-bundle-regression.mir2025-07-15 07:15 7.3K 
[ ]soft-clause-dbg-value.mir2025-07-15 07:15 3.0K 
[ ]soft-clause-exceeds-register-budget.ll2025-07-15 07:15 41K 
[ ]sopk-compares.ll2025-07-15 07:15 16K 
[ ]sopk-no-literal.ll2025-07-15 07:15 944  
[ ]speculative-execution-freecasts.ll2025-07-15 07:15 628  
[ ]spill-agpr-partially-undef.mir2025-07-15 07:15 4.6K 
[ ]spill-agpr.ll2025-07-15 07:15 7.5K 
[ ]spill-agpr.mir2025-07-15 07:15 140K 
[ ]spill-alloc-sgpr-init-bug.ll2025-07-15 07:15 1.2K 
[ ]spill-before-exec.mir2025-07-15 07:15 3.0K 
[ ]spill-cfg-position.ll2025-07-15 07:15 3.3K 
[ ]spill-csr-frame-ptr-reg-copy.ll2025-07-15 07:15 1.6K 
[ ]spill-empty-live-interval.mir2025-07-15 07:15 2.9K 
[ ]spill-m0.ll2025-07-15 07:15 6.8K 
[ ]spill-offset-calculation.ll2025-07-15 07:15 28K 
[ ]spill-partial-csr-sgpr-live-ins.mir2025-07-15 07:15 1.5K 
[ ]spill-reg-tuple-super-reg-use.mir2025-07-15 07:15 7.5K 
[ ]spill-regpressure-less.mir2025-07-15 07:15 14K 
[ ]spill-scavenge-offset.ll2025-07-15 07:15 695K 
[ ]spill-sgpr-csr-live-ins.mir2025-07-15 07:15 660  
[ ]spill-sgpr-stack-no-sgpr.ll2025-07-15 07:15 1.8K 
[ ]spill-sgpr-to-virtual-vgpr.mir2025-07-15 07:15 16K 
[ ]spill-sgpr-used-for-exec-copy.mir2025-07-15 07:15 4.7K 
[ ]spill-special-sgpr.mir2025-07-15 07:15 11K 
[ ]spill-to-agpr-partial.mir2025-07-15 07:15 20K 
[ ]spill-vector-superclass.ll2025-07-15 07:15 2.0K 
[ ]spill-vgpr-block.ll2025-07-15 07:15 4.0K 
[ ]spill-vgpr-to-agpr-update-regscavenger.ll2025-07-15 07:15 3.5K 
[ ]spill-vgpr-to-agpr.ll2025-07-15 07:15 5.1K 
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[ ]spill-wait.mir2025-07-15 07:15 11K 
[ ]spill-wide-sgpr.ll2025-07-15 07:15 11K 
[ ]spill-writelane-vgprs.ll2025-07-15 07:15 2.3K 
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[ ]spill352.mir2025-07-15 07:15 6.9K 
[ ]spill384.mir2025-07-15 07:15 7.2K 
[ ]spill_kill_v16.mir2025-07-15 07:15 7.7K 
[ ]spill_more_than_wavesize_csr_sgprs.ll2025-07-15 07:15 9.1K 
[ ]spillv16.ll2025-07-15 07:15 17K 
[ ]spillv16.mir2025-07-15 07:15 3.1K 
[ ]split-arg-dbg-value.ll2025-07-15 07:15 14K 
[ ]split-liverange-overlapping-copies.mir2025-07-15 07:15 7.2K 
[ ]split-mbb-lis-subrange.mir2025-07-15 07:15 3.5K 
[ ]split-scalar-i64-add.ll2025-07-15 07:15 3.2K 
[ ]split-smrd.ll2025-07-15 07:15 2.1K 
[ ]split-vector-memoperand-offsets.ll2025-07-15 07:15 4.5K 
[ ]splitkit-copy-bundle.mir2025-07-15 07:15 27K 
[ ]splitkit-copy-live-lanes.mir2025-07-15 07:15 53K 
[ ]splitkit-do-not-undo-subclass-split-with-remat.mir2025-07-15 07:15 27K 
[ ]splitkit-getsubrangeformask.ll2025-07-15 07:15 66K 
[ ]splitkit-nolivesubranges.mir2025-07-15 07:15 5.2K 
[ ]splitkit.mir2025-07-15 07:15 7.9K 
[ ]sra.ll2025-07-15 07:15 43K 
[ ]sram-ecc-default.ll2025-07-15 07:15 1.3K 
[ ]sramecc-subtarget-feature-any.ll2025-07-15 07:15 570  
[ ]sramecc-subtarget-feature-disabled.ll2025-07-15 07:15 610  
[ ]sramecc-subtarget-feature-enabled.ll2025-07-15 07:15 603  
[ ]sreg-xnull-regclass-bitwidth.mir2025-07-15 07:15 1.1K 
[ ]srem-seteq-illegal-types.ll2025-07-15 07:15 3.8K 
[ ]srem.ll2025-07-15 07:15 406K 
[ ]srem64.ll2025-07-15 07:15 90K 
[ ]srl.ll2025-07-15 07:15 18K 
[ ]srl64_reduce.ll2025-07-15 07:15 22K 
[ ]srl64_reduce_flags.ll2025-07-15 07:15 1.9K 
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[ ]stack-pointer-offset-relative-frameindex.ll2025-07-15 07:15 7.9K 
[ ]stack-realign-kernel.ll2025-07-15 07:15 15K 
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[ ]stack-size-overflow.ll2025-07-15 07:15 1.6K 
[ ]stack-slot-color-sgpr-vgpr-spills.mir2025-07-15 07:15 1.3K 
[ ]stacksave_stackrestore.invalid.ll2025-07-15 07:15 1.6K 
[ ]stacksave_stackrestore.ll2025-07-15 07:15 73K 
[ ]stale-livevar-in-twoaddr-pass.mir2025-07-15 07:15 1.4K 
[ ]stop-tail-duplicate-cfg-intrinsic.mir2025-07-15 07:15 3.6K 
[ ]store-barrier.ll2025-07-15 07:15 2.1K 
[ ]store-clobbers-load.ll2025-07-15 07:15 1.7K 
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[ ]store-local.ll2025-07-15 07:15 4.5K 
[ ]store-private.ll2025-07-15 07:15 21K 
[ ]store-to-constant-error.ll2025-07-15 07:15 678  
[ ]store-v3i64.ll2025-07-15 07:15 3.9K 
[ ]store-vector-ptrs.ll2025-07-15 07:15 632  
[ ]store-weird-sizes.ll2025-07-15 07:15 15K 
[ ]store_typed.ll2025-07-15 07:15 952  
[ ]stress-calls.ll2025-07-15 07:15 1.1K 
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[ ]strictfp_f16_abi_promote.ll2025-07-15 07:15 23K 
[ ]structurize.ll2025-07-15 07:15 2.3K 
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[ ]sub-zext-cc-zext-cc.ll2025-07-15 07:15 1.2K 
[ ]sub.i16.ll2025-07-15 07:15 7.7K 
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[ ]sub.v2i16.ll2025-07-15 07:15 46K 
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[ ]sub_i1.ll2025-07-15 07:15 9.5K 
[ ]subreg-coalescer-crash.ll2025-07-15 07:15 5.5K 
[ ]subreg-coalescer-undef-use.ll2025-07-15 07:15 2.8K 
[ ]subreg-eliminate-dead.ll2025-07-15 07:15 824  
[ ]subreg-intervals.mir2025-07-15 07:15 722  
[ ]subreg-split-live-in-error.mir2025-07-15 07:15 11K 
[ ]subreg-undef-def-with-other-subreg-defs.mir2025-07-15 07:15 4.4K 
[ ]subreg_interference.mir2025-07-15 07:15 949  
[ ]subvector-test.mir2025-07-15 07:15 1.3K 
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[ ]swdev503538-move-to-valu-stack-srd-physreg.ll2025-07-15 07:15 1.0K 
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[ ]switch-default-block-unreachable.ll2025-07-15 07:15 2.3K 
[ ]switch-unreachable.ll2025-07-15 07:15 627  
[ ]swizzle-export.ll2025-07-15 07:15 6.7K 
[ ]swizzle.bit.extract.ll2025-07-15 07:15 2.3K 
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[ ]tail-call-amdgpu-gfx.ll2025-07-15 07:15 1.5K 
[ ]tail-call-cgp.ll2025-07-15 07:15 917  
[ ]tail-call-inreg-arguments.convergencetokens.ll2025-07-15 07:15 3.9K 
[ ]tail-call-inreg-arguments.error.ll2025-07-15 07:15 3.5K 
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[ ]tail-call-uniform-target-in-vgprs-issue110930.convergencetokens.ll2025-07-15 07:15 3.4K 
[ ]tail-call-uniform-target-in-vgprs-issue110930.ll2025-07-15 07:15 1.4K 
[ ]tail-dup-bundle.mir2025-07-15 07:15 1.0K 
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[ ]target-cpu.ll2025-07-15 07:15 4.6K 
[ ]target-mem-intrinsic-metadata.ll2025-07-15 07:15 947  
[ ]test_isel_single_lane.ll2025-07-15 07:15 1.9K 
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[ ]texture-input-merge.ll2025-07-15 07:15 1.3K 
[ ]tgsplit.ll2025-07-15 07:15 463  
[ ]threeaddr-wmma.mir2025-07-15 07:15 9.7K 
[ ]tid-kd-xnack-any.ll2025-07-15 07:15 1.4K 
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[ ]tid-mul-func-xnack-all-not-supported.ll2025-07-15 07:15 2.2K 
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[ ]tid-mul-func-xnack-all-on.ll2025-07-15 07:15 2.3K 
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[ ]tid-mul-func-xnack-any-off-2.ll2025-07-15 07:15 2.3K 
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[ ]tid-mul-func-xnack-any-on-2.ll2025-07-15 07:15 2.3K 
[ ]tid-mul-func-xnack-invalid-any-off-on.ll2025-07-15 07:15 501  
[ ]tid-one-func-xnack-any.ll2025-07-15 07:15 1.6K 
[ ]tid-one-func-xnack-not-supported.ll2025-07-15 07:15 2.1K 
[ ]tid-one-func-xnack-off.ll2025-07-15 07:15 2.2K 
[ ]tid-one-func-xnack-on.ll2025-07-15 07:15 2.2K 
[ ]tied-op-for-wwm-scratch-reg-spill-restore.mir2025-07-15 07:15 7.3K 
[ ]token-factor-inline-limit-test.ll2025-07-15 07:15 2.9K 
[ ]track-spilled-vgpr-liveness.mir2025-07-15 07:15 3.0K 
[ ]trans-forwarding-hazards.mir2025-07-15 07:15 18K 
[ ]transform-block-with-return-to-epilog.ll2025-07-15 07:15 8.5K 
[ ]trap-abis.ll2025-07-15 07:15 24K 
[ ]trap.ll2025-07-15 07:15 6.6K 
[ ]triton_regression_no_waterfall.ll2025-07-15 07:15 1.5K 
[ ]triton_regression_no_waterfall.mir2025-07-15 07:15 6.0K 
[ ]triv-disjoint-mem-access-neg-offset.mir2025-07-15 07:15 1.5K 
[ ]true16-fold.mir2025-07-15 07:15 9.1K 
[ ]true16-ra-pre-gfx11-regression-test.mir2025-07-15 07:15 5.3K 
[ ]true16-saveexec.mir2025-07-15 07:15 2.6K 
[ ]trunc-bitcast-vector.ll2025-07-15 07:15 11K 
[ ]trunc-cmp-constant.ll2025-07-15 07:15 18K 
[ ]trunc-combine.ll2025-07-15 07:15 19K 
[ ]trunc-store-f64-to-f16.ll2025-07-15 07:15 2.0K 
[ ]trunc-store-i1.ll2025-07-15 07:15 1.6K 
[ ]trunc-store-i64.ll2025-07-15 07:15 2.1K 
[ ]trunc-store-vec-i16-to-i8.ll2025-07-15 07:15 3.7K 
[ ]trunc-store.ll2025-07-15 07:15 17K 
[ ]trunc-vector-store-assertion-failure.ll2025-07-15 07:15 571  
[ ]trunc.ll2025-07-15 07:15 18K 
[ ]truncate-lshr-cast-build-vector-combine.ll2025-07-15 07:15 4.9K 
[ ]tti-unroll-prefs.ll2025-07-15 07:15 2.1K 
[ ]tuple-allocation-failure.ll2025-07-15 07:15 37K 
[ ]twoaddr-constrain.ll2025-07-15 07:15 1.6K 
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[ ]twoaddr-mad.mir2025-07-15 07:15 7.2K 
[ ]twoaddr-regsequence.mir2025-07-15 07:15 907  
[ ]twoaddr-wmma.mir2025-07-15 07:15 7.5K 
[ ]uaddo.ll2025-07-15 07:15 33K 
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[ ]udiv.ll2025-07-15 07:15 101K 
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[ ]udivrem64.r600.ll2025-07-15 07:15 2.7K 
[ ]uint_to_fp.f64.ll2025-07-15 07:15 23K 
[ ]uint_to_fp.i64.ll2025-07-15 07:15 43K 
[ ]uint_to_fp.ll2025-07-15 07:15 4.9K 
[ ]uitofp.f16.ll2025-07-15 07:15 20K 
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[ ]unaligned-buffer.ll2025-07-15 07:15 4.1K 
[ ]unaligned-load-store.ll2025-07-15 07:15 20K 
[ ]unallocatable-bundle-regression.mir2025-07-15 07:15 14K 
[ ]undef-build-vector.ll2025-07-15 07:15 798  
[ ]undef-copy-propagation.mir2025-07-15 07:15 1.0K 
[ ]undef-handling-crash-in-ra.ll2025-07-15 07:15 8.0K 
[ ]undef-subreg-use-after-coalesce.mir2025-07-15 07:15 3.0K 
[ ]undefined-physreg-sgpr-spill.mir2025-07-15 07:15 5.5K 
[ ]undefined-subreg-liverange.ll2025-07-15 07:15 5.0K 
[ ]unexpected-reg-unit-state.mir2025-07-15 07:15 1.5K 
[ ]unfold-masked-merge-scalar-variablemask.ll2025-07-15 07:15 29K 
[ ]unhandled-loop-condition-assertion.ll2025-07-15 07:15 4.8K 
[ ]uniform-branch-intrinsic-cond.ll2025-07-15 07:15 907  
[ ]uniform-cfg.ll2025-07-15 07:15 38K 
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[ ]uniform-vgpr-to-sgpr-return.ll2025-07-15 07:15 5.8K 
[ ]uniform-work-group-attribute-missing.ll2025-07-15 07:15 1.4K 
[ ]uniform-work-group-multistep.ll2025-07-15 07:15 3.7K 
[ ]uniform-work-group-nested-function-calls.ll2025-07-15 07:15 2.2K 
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[ ]uniform-work-group-recursion-test.ll2025-07-15 07:15 5.0K 
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[ ]uniform_branch_with_floating_point_cond.ll2025-07-15 07:15 5.8K 
[ ]unify-metadata.ll2025-07-15 07:15 1.2K 
[ ]unigine-liveness-crash.ll2025-07-15 07:15 7.6K 
[ ]unknown-processor.ll2025-07-15 07:15 727  
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[ ]unroll.ll2025-07-15 07:15 3.8K 
[ ]unstructured-cfg-def-use-issue.ll2025-07-15 07:15 22K 
[ ]unsupported-atomics.ll2025-07-15 07:15 1.8K 
[ ]unsupported-calling-conv-call.ll2025-07-15 07:15 235  
[ ]unsupported-calling-conv-func.ll2025-07-15 07:15 204  
[ ]unsupported-calls.ll2025-07-15 07:15 2.3K 
[ ]unsupported-cc.ll2025-07-15 07:15 3.7K 
[ ]unsupported-code-object-version.ll2025-07-15 07:15 862  
[ ]unsupported-cs-chain.ll2025-07-15 07:15 634  
[ ]unsupported-image-a16.ll2025-07-15 07:15 1.2K 
[ ]unsupported-image-g16.ll2025-07-15 07:15 1.6K 
[ ]unsupported-image-sample.ll2025-07-15 07:15 2.6K 
[ ]update-lds-alignment.ll2025-07-15 07:15 7.4K 
[ ]update-phi.ll2025-07-15 07:15 1.5K 
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[ ]use_restore_frame_reg.mir2025-07-15 07:15 9.0K 
[ ]usubo.ll2025-07-15 07:15 31K 
[ ]usubsat.ll2025-07-15 07:15 32K 
[ ]v1i64-kernel-arg.ll2025-07-15 07:15 475  
[ ]v1024.ll2025-07-15 07:15 1.3K 
[ ]v_add_u64_pseudo_sdwa.ll2025-07-15 07:15 2.0K 
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[ ]v_cmp_gfx11.ll2025-07-15 07:15 2.7K 
[ ]v_cndmask.ll2025-07-15 07:15 105K 
[ ]v_cvt_pk_u8_f32.ll2025-07-15 07:15 2.8K 
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[ ]v_mov_b64_expand_and_shrink.mir2025-07-15 07:15 540  
[ ]v_mov_b64_expansion.mir2025-07-15 07:15 4.6K 
[ ]v_pack.ll2025-07-15 07:15 30K 
[ ]v_sat_pk_u8_i16.ll2025-07-15 07:15 89K 
[ ]v_sub_u64_pseudo_sdwa.ll2025-07-15 07:15 2.1K 
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[ ]v_swap_b32.mir2025-07-15 07:15 28K 
[ ]valu-i1.ll2025-07-15 07:15 15K 
[ ]valu-mask-write-hazard-true16.mir2025-07-15 07:15 862  
[ ]valu-mask-write-hazard.mir2025-07-15 07:15 26K 
[ ]valu-read-sgpr-hazard-attrs.mir2025-07-15 07:15 14K 
[ ]valu-read-sgpr-hazard.mir2025-07-15 07:15 41K 
[ ]vccz-corrupt-bug-workaround.mir2025-07-15 07:15 9.5K 
[ ]vcmp-saveexec-to-vcmpx-set-kill.mir2025-07-15 07:15 3.7K 
[ ]vcmp-saveexec-to-vcmpx-wrong-kill-flags.mir2025-07-15 07:15 4.9K 
[ ]vcmp-saveexec-to-vcmpx.ll2025-07-15 07:15 9.4K 
[ ]vcmp-saveexec-to-vcmpx.mir2025-07-15 07:15 3.9K 
[ ]vcmpx-exec-war-hazard.mir2025-07-15 07:15 4.9K 
[ ]vcmpx-permlane-hazard-sdwa.mir2025-07-15 07:15 884  
[ ]vcmpx-permlane-hazard.mir2025-07-15 07:15 6.2K 
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[ ]vector-alloca-addrspacecast.ll2025-07-15 07:15 1.2K 
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[ ]vector-alloca-bitcast.ll2025-07-15 07:15 16K 
[ ]vector-alloca-limits.ll2025-07-15 07:15 6.5K 
[ ]vector-alloca.ll2025-07-15 07:15 6.2K 
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[ ]vector-reduce-and.ll2025-07-15 07:15 159K 
[ ]vector-reduce-fadd.ll2025-07-15 07:15 119K 
[ ]vector-reduce-fmax.ll2025-07-15 07:15 185K 
[ ]vector-reduce-fmaximum.ll2025-07-15 07:15 126K 
[ ]vector-reduce-fmin.ll2025-07-15 07:15 185K 
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[ ]vector-reduce-fmul.ll2025-07-15 07:15 119K 
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[ ]vector-reduce-or.ll2025-07-15 07:15 143K 
[ ]vector-reduce-smax.ll2025-07-15 07:15 231K 
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[ ]vector-reduce-umin.ll2025-07-15 07:15 211K 
[ ]vector-reduce-xor.ll2025-07-15 07:15 150K 
[ ]vector-spill-restore-to-other-vector-type.mir2025-07-15 07:15 19K 
[ ]vector_range_metadata.ll2025-07-15 07:15 4.3K 
[ ]vector_rebroadcast.ll2025-07-15 07:15 93K 
[ ]vector_shuffle.packed.ll2025-07-15 07:15 260K 
[ ]vectorize-buffer-fat-pointer.ll2025-07-15 07:15 1.2K 
[ ]vectorize-global-local.ll2025-07-15 07:15 4.3K 
[ ]vectorize-loads.ll2025-07-15 07:15 2.4K 
[ ]vectorize-unroll-metadata.ll2025-07-15 07:15 1.1K 
[ ]verifier-sdwa-cvt.mir2025-07-15 07:15 2.5K 
[ ]verify-constant-bus-violations.mir2025-07-15 07:15 2.7K 
[ ]verify-ds-gws-align.mir2025-07-15 07:15 2.9K 
[ ]verify-duplicate-literal.mir2025-07-15 07:15 2.1K 
[ ]verify-gfx12-gds.mir2025-07-15 07:15 495  
[ ]verify-gfx90a-aligned-vgprs.mir2025-07-15 07:15 7.6K 
[ ]verify-image-vaddr-align.mir2025-07-15 07:15 2.2K 
[ ]verify-image.mir2025-07-15 07:15 4.0K 
[ ]verify-scalar-store.mir2025-07-15 07:15 798  
[ ]verify-sop.mir2025-07-15 07:15 777  
[ ]verify-vimage-vsample.mir2025-07-15 07:15 7.5K 
[ ]verify-vopd-gfx12.mir2025-07-15 07:15 863  
[ ]verify-vopd.mir2025-07-15 07:15 863  
[ ]vertex-fetch-encoding.ll2025-07-15 07:15 2.4K 
[ ]vgpr-agpr-limit-gfx90a.ll2025-07-15 07:15 60K 
[ ]vgpr-blocks-funcinfo.mir2025-07-15 07:15 2.8K 
[ ]vgpr-descriptor-waterfall-loop-idom-update.ll2025-07-15 07:15 3.7K 
[ ]vgpr-large-tuple-alloc-error.ll2025-07-15 07:15 35K 
[ ]vgpr-liverange-ir.ll2025-07-15 07:15 38K 
[ ]vgpr-liverange.ll2025-07-15 07:15 10K 
[ ]vgpr-mark-last-scratch-load.ll2025-07-15 07:15 14K 
[ ]vgpr-mark-last-scratch-load.mir2025-07-15 07:15 22K 
[ ]vgpr-remat-v_pk_mov_b32.mir2025-07-15 07:15 2.2K 
[ ]vgpr-remat.mir2025-07-15 07:15 5.5K 
[ ]vgpr-spill-dead-frame-in-dbg-value.mir2025-07-15 07:15 2.4K 
[ ]vgpr-spill-emergency-stack-slot-compute.ll2025-07-15 07:15 35K 
[ ]vgpr-spill-emergency-stack-slot.ll2025-07-15 07:15 32K 
[ ]vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir2025-07-15 07:15 2.2K 
[ ]vgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir2025-07-15 07:15 2.5K 
[ ]vgpr-spill-placement-issue61083.ll2025-07-15 07:15 4.1K 
[ ]vgpr-spill-scc-clobber.mir2025-07-15 07:15 202K 
[ ]vgpr-spill.mir2025-07-15 07:15 7.7K 
[ ]vgpr-tuple-allocation.ll2025-07-15 07:15 18K 
[ ]vgpr_constant64_to_sgpr.mir2025-07-15 07:15 580  
[ ]vgpr_constant_to_sgpr.ll2025-07-15 07:15 2.6K 
[ ]vi-removed-intrinsics.ll2025-07-15 07:15 1.0K 
[ ]virtregrewrite-undef-identity-copy.mir2025-07-15 07:15 4.2K 
[ ]visit-physreg-vgpr-imm-folding-bug.ll2025-07-15 07:15 775  
[ ]vmem-to-salu-hazard.mir2025-07-15 07:15 10K 
[ ]vmem-vcc-hazard.mir2025-07-15 07:15 5.8K 
[ ]vni8-across-blocks.ll2025-07-15 07:15 47K 
[ ]vni8-live-reg-opt.ll2025-07-15 07:15 25K 
[ ]vop-shrink-frame-index.mir2025-07-15 07:15 5.3K 
[ ]vop-shrink-non-ssa.mir2025-07-15 07:15 1.4K 
[ ]vop-shrink.ll2025-07-15 07:15 1.7K 
[ ]vopc_dpp-true16.mir2025-07-15 07:15 6.8K 
[ ]vopc_dpp.ll2025-07-15 07:15 774  
[ ]vopc_dpp.mir2025-07-15 07:15 5.9K 
[ ]vopd-combine-gfx1250.mir2025-07-15 07:15 146K 
[ ]vopd-combine.mir2025-07-15 07:15 46K 
[ ]vopd-src2acc-delay.mir2025-07-15 07:15 2.7K 
[ ]vselect.ll2025-07-15 07:15 13K 
[ ]vselect64.ll2025-07-15 07:15 708  
[ ]vtx-fetch-branch.ll2025-07-15 07:15 754  
[ ]vtx-schedule.ll2025-07-15 07:15 641  
[ ]wait-before-stores-with-scope_sys.ll2025-07-15 07:15 1.1K 
[ ]wait-before-stores-with-scope_sys.mir2025-07-15 07:15 2.0K 
[ ]wait-xcnt.mir2025-07-15 07:15 47K 
[ ]wait.ll2025-07-15 07:15 4.9K 
[ ]waitcnt-agpr.mir2025-07-15 07:15 12K 
[ ]waitcnt-back-edge-loop.mir2025-07-15 07:15 3.1K 
[ ]waitcnt-bvh.mir2025-07-15 07:15 5.6K 
[ ]waitcnt-debug-non-first-terminators.mir2025-07-15 07:15 1.0K 
[ ]waitcnt-debug.mir2025-07-15 07:15 1.4K 
[ ]waitcnt-flat.ll2025-07-15 07:15 1.2K 
[ ]waitcnt-global-inv-wb.mir2025-07-15 07:15 1.4K 
[ ]waitcnt-loop-irreducible.mir2025-07-15 07:15 2.8K 
[ ]waitcnt-loop-single-basic-block.mir2025-07-15 07:15 873  
[ ]waitcnt-looptest.ll2025-07-15 07:15 12K 
[ ]waitcnt-meta-instructions.mir2025-07-15 07:15 2.0K 
[ ]waitcnt-multiple-funcs.mir2025-07-15 07:15 1.3K 
[ ]waitcnt-no-redundant.mir2025-07-15 07:15 1.4K 
[ ]waitcnt-overflow.mir2025-07-15 07:15 71K 
[ ]waitcnt-permute.mir2025-07-15 07:15 638  
[ ]waitcnt-preexisting-vscnt.mir2025-07-15 07:15 8.5K 
[ ]waitcnt-preexisting.mir2025-07-15 07:15 17K 
[ ]waitcnt-sample-out-order.mir2025-07-15 07:15 6.3K 
[ ]waitcnt-sample-waw.mir2025-07-15 07:15 3.8K 
[ ]waitcnt-skip-meta.mir2025-07-15 07:15 1.7K 
[ ]waitcnt-trailing.mir2025-07-15 07:15 480  
[ ]waitcnt-vinterp.mir2025-07-15 07:15 2.1K 
[ ]waitcnt-vmcnt-loop.mir2025-07-15 07:15 22K 
[ ]waitcnt-vmem-waw.mir2025-07-15 07:15 6.9K 
[ ]waitcnt-vscnt.ll2025-07-15 07:15 23K 
[ ]waitcnt-vscnt.mir2025-07-15 07:15 874  
[ ]waitcnt.mir2025-07-15 07:15 10K 
[ ]waterfall_kills_scc.ll2025-07-15 07:15 3.8K 
[ ]wave32.ll2025-07-15 07:15 117K 
[ ]wave_dispatch_regs.ll2025-07-15 07:15 1.8K 
[ ]while-break.ll2025-07-15 07:15 8.1K 
[ ]whole-wave-register-copy.ll2025-07-15 07:15 3.4K 
[ ]whole-wave-register-spill.ll2025-07-15 07:15 6.4K 
[ ]widen-smrd-loads.ll2025-07-15 07:15 26K 
[ ]widen-vselect-and-mask.ll2025-07-15 07:15 4.1K 
[ ]widen_extending_scalar_loads.ll2025-07-15 07:15 13K 
[ ]wmma-gfx12-w32-f16-f32-matrix-modifiers.ll2025-07-15 07:15 22K 
[ ]wmma-gfx12-w32-imm.ll2025-07-15 07:15 20K 
[ ]wmma-gfx12-w32-iu-modifiers.ll2025-07-15 07:15 13K 
[ ]wmma-gfx12-w32-swmmac-index_key.ll2025-07-15 07:15 18K 
[ ]wmma-gfx12-w32.ll2025-07-15 07:15 17K 
[ ]wmma-gfx12-w64-f16-f32-matrix-modifiers.ll2025-07-15 07:15 20K 
[ ]wmma-gfx12-w64-imm.ll2025-07-15 07:15 16K 
[ ]wmma-gfx12-w64-iu-modifiers.ll2025-07-15 07:15 11K 
[ ]wmma-gfx12-w64-swmmac-index_key.ll2025-07-15 07:15 26K 
[ ]wmma-gfx12-w64.ll2025-07-15 07:15 14K 
[ ]wmma-hazards-gfx12-w32.mir2025-07-15 07:15 46K 
[ ]wmma-hazards-gfx12-w64.mir2025-07-15 07:15 33K 
[ ]wmma-hazards.mir2025-07-15 07:15 26K 
[ ]wmma_modifiers.ll2025-07-15 07:15 1.0K 
[ ]wmma_multiple_32.ll2025-07-15 07:15 26K 
[ ]wmma_multiple_64.ll2025-07-15 07:15 22K 
[ ]workgroup-id-in-arch-sgprs.ll2025-07-15 07:15 4.5K 
[ ]wqm-gfx11.ll2025-07-15 07:15 2.9K 
[ ]wqm-terminators.mir2025-07-15 07:15 3.7K 
[ ]wqm.ll2025-07-15 07:15 165K 
[ ]wqm.mir2025-07-15 07:15 15K 
[ ]write-register-invalid-register.ll2025-07-15 07:15 511  
[ ]write-register-vgpr-into-sgpr.ll2025-07-15 07:15 753  
[ ]write_register.ll2025-07-15 07:15 3.6K 
[ ]wrong-transalu-pos-fix.ll2025-07-15 07:15 2.6K 
[ ]wwm-reg-shift-down-gfx11plus.mir2025-07-15 07:15 1.4K 
[ ]wwm-regalloc-error.ll2025-07-15 07:15 1.1K 
[ ]wwm-reserved-spill.ll2025-07-15 07:15 72K 
[ ]wwm-reserved.ll2025-07-15 07:15 77K 
[ ]wwm-spill-superclass-pseudo.mir2025-07-15 07:15 3.4K 
[ ]xfail.r600.bitcast.ll2025-07-15 07:15 1.3K 
[ ]xnack-subtarget-feature-any.ll2025-07-15 07:15 1.0K 
[ ]xnack-subtarget-feature-disabled.ll2025-07-15 07:15 1.0K 
[ ]xnack-subtarget-feature-enabled.ll2025-07-15 07:15 1.0K 
[ ]xnor.ll2025-07-15 07:15 5.0K 
[ ]xor-r600.ll2025-07-15 07:15 18K 
[ ]xor.ll2025-07-15 07:15 28K 
[ ]xor3-i1-const.ll2025-07-15 07:15 1.2K 
[ ]xor3.ll2025-07-15 07:15 5.6K 
[ ]xor_add.ll2025-07-15 07:15 3.9K 
[ ]zero_extend.ll2025-07-15 07:15 2.4K 
[ ]zext-divergence-driven-isel.ll2025-07-15 07:15 3.2K 
[ ]zext-i64-bit-operand.ll2025-07-15 07:15 1.5K 
[ ]zext-lid.ll2025-07-15 07:15 3.8K 
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