Index of /~tb-builder/tor-browser-build/git_clones/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel

[ICO]NameLast modifiedSizeDescription
[PARENTDIR]Parent Directory  -  
[ ]aapcs_vararg_frame.ll2025-07-15 07:15 2.6K 
[ ]arm64-atomic-128.ll2025-07-15 07:15 33K 
[ ]arm64-atomic.ll2025-07-15 07:15 281K 
[ ]arm64-callingconv-ios.ll2025-07-15 07:15 6.1K 
[ ]arm64-callingconv.ll2025-07-15 07:15 14K 
[ ]arm64-fallback.ll2025-07-15 07:15 7.3K 
[ ]arm64-irtranslator-fmuladd.ll2025-07-15 07:15 1.6K 
[ ]arm64-irtranslator-gep.ll2025-07-15 07:15 4.5K 
[ ]arm64-irtranslator-stackprotect.ll2025-07-15 07:15 900  
[ ]arm64-irtranslator-switch.ll2025-07-15 07:15 57K 
[ ]arm64-irtranslator.ll2025-07-15 07:15 95K 
[ ]arm64-pcsections.ll2025-07-15 07:15 62K 
[ ]arm64-regbankselect.mir2025-07-15 07:15 27K 
[ ]artifact-combine-unmerge.mir2025-07-15 07:15 2.5K 
[ ]artifact-find-value.mir2025-07-15 07:15 12K 
[ ]assert-align.ll2025-07-15 07:15 811  
[ ]atomic-anyextending-load-crash.ll2025-07-15 07:15 1.8K 
[ ]builtin-return-address-pacret.ll2025-07-15 07:15 3.0K 
[ ]byval-call.ll2025-07-15 07:15 2.9K 
[ ]call-lowering-alias.ll2025-07-15 07:15 934  
[ ]call-lowering-const-bitcast-func.ll2025-07-15 07:15 462  
[ ]call-lowering-i128-on-stack.ll2025-07-15 07:15 396  
[ ]call-lowering-i256-crash.ll2025-07-15 07:15 188  
[ ]call-lowering-ifunc.ll2025-07-15 07:15 1.0K 
[ ]call-lowering-signext.ll2025-07-15 07:15 7.8K 
[ ]call-lowering-sret-demotion.ll2025-07-15 07:15 7.5K 
[ ]call-lowering-tail-call-fallback.ll2025-07-15 07:15 1.1K 
[ ]call-lowering-vectors.ll2025-07-15 07:15 4.1K 
[ ]call-lowering-zeroext.ll2025-07-15 07:15 7.3K 
[ ]call-translator-cse.ll2025-07-15 07:15 1.3K 
[ ]call-translator-ios.ll2025-07-15 07:15 4.2K 
[ ]call-translator-musttail.ll2025-07-15 07:15 712  
[ ]call-translator-tail-call-sret.ll2025-07-15 07:15 4.8K 
[ ]call-translator-tail-call-weak.ll2025-07-15 07:15 734  
[ ]call-translator-tail-call.ll2025-07-15 07:15 25K 
[ ]call-translator-variadic-musttail.ll2025-07-15 07:15 8.3K 
[ ]call-translator.ll2025-07-15 07:15 18K 
[ ]combine-2-icmps-of-0-and-or.mir2025-07-15 07:15 43K 
[ ]combine-add-of-sub.mir2025-07-15 07:15 11K 
[ ]combine-add.mir2025-07-15 07:15 11K 
[ ]combine-addv.mir2025-07-15 07:15 1.7K 
[ ]combine-and-or-disjoint-mask.mir2025-07-15 07:15 4.1K 
[ ]combine-anyext-crash.mir2025-07-15 07:15 919  
[ ]combine-binop-undef-left-to-zero.mir2025-07-15 07:15 2.9K 
[ ]combine-bitreverse-shift.ll2025-07-15 07:15 3.0K 
[ ]combine-build-vector.mir2025-07-15 07:15 4.6K 
[ ]combine-cannonicalize-fcmp.mir2025-07-15 07:15 4.8K 
[ ]combine-canonicalize-icmp.mir2025-07-15 07:15 4.0K 
[ ]combine-cast.mir2025-07-15 07:15 9.2K 
[ ]combine-commute-const-infinite-loop.mir2025-07-15 07:15 920  
[ ]combine-commute-fp-const-lhs.mir2025-07-15 07:15 7.4K 
[ ]combine-commute-int-const-lhs.mir2025-07-15 07:15 12K 
[ ]combine-const-fold-barrier-rhs.mir2025-07-15 07:15 7.2K 
[ ]combine-constant-fold-fma.mir2025-07-15 07:15 1.3K 
[ ]combine-constant-fold-itofp-zero.mir2025-07-15 07:15 1.1K 
[ ]combine-copy.mir2025-07-15 07:15 2.5K 
[ ]combine-ext-debugloc.mir2025-07-15 07:15 3.4K 
[ ]combine-ext-trunc.mir2025-07-15 07:15 17K 
[ ]combine-ext.mir2025-07-15 07:15 13K 
[ ]combine-extract-vec-elt.mir2025-07-15 07:15 20K 
[ ]combine-fabs.mir2025-07-15 07:15 3.7K 
[ ]combine-fconstant.mir2025-07-15 07:15 2.6K 
[ ]combine-flog2.mir2025-07-15 07:15 1.2K 
[ ]combine-fminimum-fmaximum.mir2025-07-15 07:15 4.9K 
[ ]combine-fminnum-fmaxnum.mir2025-07-15 07:15 4.6K 
[ ]combine-fneg.mir2025-07-15 07:15 3.1K 
[ ]combine-fpowi-optsize.ll2025-07-15 07:15 858  
[ ]combine-fpowi.mir2025-07-15 07:15 4.0K 
[ ]combine-fptrunc.mir2025-07-15 07:15 1.3K 
[ ]combine-freeze.mir2025-07-15 07:15 45K 
[ ]combine-fshl.mir2025-07-15 07:15 13K 
[ ]combine-fshr.mir2025-07-15 07:15 13K 
[ ]combine-fsqrt.mir2025-07-15 07:15 1.2K 
[ ]combine-icmp-of-binop-to-icmp-of-0.mir2025-07-15 07:15 30K 
[ ]combine-icmp-to-lhs-known-bits.mir2025-07-15 07:15 8.0K 
[ ]combine-insert-vec-elt.mir2025-07-15 07:15 13K 
[ ]combine-integer-ll.ll2025-07-15 07:15 1.8K 
[ ]combine-integer.mir2025-07-15 07:15 9.7K 
[ ]combine-inttoptr-ptrtoint.mir2025-07-15 07:15 1.4K 
[ ]combine-logic-of-compare.mir2025-07-15 07:15 17K 
[ ]combine-mul-to-shl.mir2025-07-15 07:15 4.6K 
[ ]combine-mul.mir2025-07-15 07:15 4.9K 
[ ]combine-mulo-with-2.mir2025-07-15 07:15 3.9K 
[ ]combine-narrow-binop.mir2025-07-15 07:15 4.9K 
[ ]combine-neg-and-one-to-sext-inreg.mir2025-07-15 07:15 2.7K 
[ ]combine-op-trunc.mir2025-07-15 07:15 10K 
[ ]combine-overflow.mir2025-07-15 07:15 9.8K 
[ ]combine-ptradd-int2ptr.mir2025-07-15 07:15 2.6K 
[ ]combine-ptradd-reassociation.mir2025-07-15 07:15 11K 
[ ]combine-ptrtoint.mir2025-07-15 07:15 764  
[ ]combine-sdiv.mir2025-07-15 07:15 5.0K 
[ ]combine-select.mir2025-07-15 07:15 34K 
[ ]combine-sext-debugloc.mir2025-07-15 07:15 1.8K 
[ ]combine-sext-trunc-sextload.mir2025-07-15 07:15 2.2K 
[ ]combine-shift-immed-mismatch-crash.mir2025-07-15 07:15 2.1K 
[ ]combine-shift-of-shifted-dbg-value-fallback.ll2025-07-15 07:15 3.7K 
[ ]combine-shifts-undef.mir2025-07-15 07:15 3.5K 
[ ]combine-shufflevector.mir2025-07-15 07:15 10K 
[ ]combine-trunc.mir2025-07-15 07:15 6.9K 
[ ]combine-udiv.ll2025-07-15 07:15 11K 
[ ]combine-udiv.mir2025-07-15 07:15 20K 
[ ]combine-udivrem-use-bug.mir2025-07-15 07:15 936  
[ ]combine-umulh-to-lshr.mir2025-07-15 07:15 5.4K 
[ ]combine-unary-undef-to-zero.mir2025-07-15 07:15 1.2K 
[ ]combine-unmerge.mir2025-07-15 07:15 23K 
[ ]combine-vscale.mir2025-07-15 07:15 3.4K 
[ ]combiner-load-store-indexing.ll2025-07-15 07:15 9.7K 
[ ]constant-dbg-loc.ll2025-07-15 07:15 3.7K 
[ ]constant-mir-debugify.mir2025-07-15 07:15 2.0K 
[ ]contract-store.mir2025-07-15 07:15 5.1K 
[ ]counter-fallback.ll2025-07-15 07:15 825  
[ ]darwin-tls-call-clobber.ll2025-07-15 07:15 8.1K 
[ ]debug-cpp.ll2025-07-15 07:15 3.1K 
[ ]debug-insts.ll2025-07-15 07:15 4.5K 
[ ]debug-loc-legalize-tail-call.mir2025-07-15 07:15 1.7K 
[ ]dynamic-alloca-lifetime.ll2025-07-15 07:15 1.4K 
[ ]dynamic-alloca.ll2025-07-15 07:15 2.6K 
[ ]emutls-fallback.ll2025-07-15 07:15 1.1K 
[ ]endian_fallback.ll2025-07-15 07:15 823  
[ ]fallback-nofastisel.ll2025-07-15 07:15 489  
[ ]fconstant-dbg-loc.ll2025-07-15 07:15 1.1K 
[ ]fold-brcond-fcmp.mir2025-07-15 07:15 17K 
[ ]fold-fp-select.mir2025-07-15 07:15 14K 
[ ]fold-global-offsets-insertpt.mir2025-07-15 07:15 2.1K 
[ ]fold-global-offsets-target-features.mir2025-07-15 07:15 9.5K 
[ ]fold-global-offsets.mir2025-07-15 07:15 10K 
[ ]fold-select.mir2025-07-15 07:15 2.9K 
[ ]form-bitfield-extract-from-and.mir2025-07-15 07:15 8.8K 
[ ]form-bitfield-extract-from-sextinreg.mir2025-07-15 07:15 4.7K 
[ ]form-bitfield-extract-from-shr-and.mir2025-07-15 07:15 7.1K 
[ ]form-bitfield-extract-from-shr.mir2025-07-15 07:15 5.9K 
[ ]fp16-copy-gpr.mir2025-07-15 07:15 3.8K 
[ ]fp128-legalize-crash-pr35690.mir2025-07-15 07:15 1.3K 
[ ]fpenv.ll2025-07-15 07:15 1.3K 
[ ]gisel-abort.ll2025-07-15 07:15 203  
[ ]gisel-commandline-option-fastisel.ll2025-07-15 07:15 1.3K 
[ ]gisel-commandline-option.ll2025-07-15 07:15 4.0K 
[ ]huge-switch.ll2025-07-15 07:15 488  
[ ]icmp-flags.mir2025-07-15 07:15 1.5K 
[ ]implicit_def_rbs_crash.mir2025-07-15 07:15 681  
[ ]inline-asm.ll2025-07-15 07:15 299  
[ ]inline-memcpy-forced.mir2025-07-15 07:15 5.0K 
[ ]inline-memcpy.mir2025-07-15 07:15 17K 
[ ]inline-memmove.mir2025-07-15 07:15 12K 
[ ]inline-memset.mir2025-07-15 07:15 11K 
[ ]inline-small-memcpy.mir2025-07-15 07:15 3.1K 
[ ]insert-vector-elt-pr63826.ll2025-07-15 07:15 1.5K 
[ ]integration-shuffle-vector.ll2025-07-15 07:15 1.2K 
[ ]inttoptr_add.ll2025-07-15 07:15 521  
[ ]invoke-region.ll2025-07-15 07:15 5.4K 
[ ]irtranslater-samesign.ll2025-07-15 07:15 2.7K 
[ ]irtranslator-arguments.ll2025-07-15 07:15 2.5K 
[ ]irtranslator-atomic-metadata.ll2025-07-15 07:15 4.4K 
[ ]irtranslator-bitcast.ll2025-07-15 07:15 916  
[ ]irtranslator-block-order.ll2025-07-15 07:15 356  
[ ]irtranslator-condbr-lower-tree.ll2025-07-15 07:15 12K 
[ ]irtranslator-convert-fp16-intrinsics.ll2025-07-15 07:15 1.3K 
[ ]irtranslator-delayed-stack-protector.ll2025-07-15 07:15 2.2K 
[ ]irtranslator-dilocation.ll2025-07-15 07:15 2.8K 
[ ]irtranslator-duplicate-types-param.ll2025-07-15 07:15 609  
[ ]irtranslator-exceptions.ll2025-07-15 07:15 8.1K 
[ ]irtranslator-extends.ll2025-07-15 07:15 909  
[ ]irtranslator-extract-used-by-dbg.ll2025-07-15 07:15 30K 
[ ]irtranslator-fixed-point-intrinsics.ll2025-07-15 07:15 6.0K 
[ ]irtranslator-fp-min-max-intrinsics.ll2025-07-15 07:15 5.4K 
[ ]irtranslator-fpenv.ll2025-07-15 07:15 2.2K 
[ ]irtranslator-gep-flags.ll2025-07-15 07:15 6.1K 
[ ]irtranslator-hoisted-constants.ll2025-07-15 07:15 5.3K 
[ ]irtranslator-indirect-br-repeated-block.ll2025-07-15 07:15 882  
[ ]irtranslator-inline-asm.ll2025-07-15 07:15 11K 
[ ]irtranslator-invoke-probabilities.ll2025-07-15 07:15 948  
[ ]irtranslator-load-metadata.ll2025-07-15 07:15 3.2K 
[ ]irtranslator-localescape.ll2025-07-15 07:15 3.0K 
[ ]irtranslator-max-address-space.ll2025-07-15 07:15 1.1K 
[ ]irtranslator-memcpy-inline.ll2025-07-15 07:15 5.2K 
[ ]irtranslator-memfunc-undef.ll2025-07-15 07:15 1.3K 
[ ]irtranslator-nneg-disjoint.ll2025-07-15 07:15 4.6K 
[ ]irtranslator-no-op-intrinsics.ll2025-07-15 07:15 3.8K 
[ ]irtranslator-no-unwind-inline-asm.ll2025-07-15 07:15 902  
[ ]irtranslator-one-by-n-vector-ptr-add.ll2025-07-15 07:15 2.0K 
[ ]irtranslator-reductions.ll2025-07-15 07:15 11K 
[ ]irtranslator-sincos.ll2025-07-15 07:15 5.5K 
[ ]irtranslator-split-vector-arg.ll2025-07-15 07:15 950  
[ ]irtranslator-stack-evt-bug47619.ll2025-07-15 07:15 1.4K 
[ ]irtranslator-stack-objects.ll2025-07-15 07:15 2.0K 
[ ]irtranslator-stack-protector-trap-unreachable.ll2025-07-15 07:15 5.7K 
[ ]irtranslator-stack-protector-windows.ll2025-07-15 07:15 1.6K 
[ ]irtranslator-stepvector.ll2025-07-15 07:15 1.8K 
[ ]irtranslator-store-metadata.ll2025-07-15 07:15 2.2K 
[ ]irtranslator-subvector.ll2025-07-15 07:15 18K 
[ ]irtranslator-sucmp.ll2025-07-15 07:15 2.1K 
[ ]irtranslator-switch-bittest.ll2025-07-15 07:15 16K 
[ ]irtranslator-switch-split.ll2025-07-15 07:15 2.6K 
[ ]irtranslator-tbaa.ll2025-07-15 07:15 683  
[ ]irtranslator-trunc.ll2025-07-15 07:15 3.2K 
[ ]irtranslator-unreachable.ll2025-07-15 07:15 767  
[ ]irtranslator-unwind-inline-asm.ll2025-07-15 07:15 3.8K 
[ ]irtranslator-vector-deinterleave2.ll2025-07-15 07:15 2.0K 
[ ]irtranslator-vector-interleave2.ll2025-07-15 07:15 1.6K 
[ ]irtranslator-volatile-load-pr36018.ll2025-07-15 07:15 356  
[ ]irtranslator-vscale.ll2025-07-15 07:15 1.7K 
[ ]irtranslator-weird-alloca-size.ll2025-07-15 07:15 798  
[ ]knownbits-assertzext.mir2025-07-15 07:15 2.5K 
[ ]knownbits-buildvector.mir2025-07-15 07:15 2.6K 
[ ]knownbits-concat.mir2025-07-15 07:15 2.2K 
[ ]knownbits-const.mir2025-07-15 07:15 913  
[ ]knownbits-shuffle.mir2025-07-15 07:15 2.5K 
[ ]knownbits-sve-splat.mir2025-07-15 07:15 1.3K 
[ ]knownbits-trunk.mir2025-07-15 07:15 2.3K 
[ ]knownbits-zext.mir2025-07-15 07:15 2.3K 
[ ]labels-are-not-dead.mir2025-07-15 07:15 1.4K 
[ ]legalize-abs.mir2025-07-15 07:15 6.9K 
[ ]legalize-acos.mir2025-07-15 07:15 6.6K 
[ ]legalize-add.mir2025-07-15 07:15 18K 
[ ]legalize-and.mir2025-07-15 07:15 16K 
[ ]legalize-asin.mir2025-07-15 07:15 6.6K 
[ ]legalize-atan.mir2025-07-15 07:15 6.6K 
[ ]legalize-atan2.mir2025-07-15 07:15 17K 
[ ]legalize-atomicrmw.mir2025-07-15 07:15 3.0K 
[ ]legalize-bitcast.mir2025-07-15 07:15 7.2K 
[ ]legalize-bitreverse.mir2025-07-15 07:15 8.2K 
[ ]legalize-blockaddress.mir2025-07-15 07:15 1.7K 
[ ]legalize-bswap.mir2025-07-15 07:15 7.3K 
[ ]legalize-build-vector.mir2025-07-15 07:15 7.0K 
[ ]legalize-bzero-unsupported.mir2025-07-15 07:15 564  
[ ]legalize-bzero.mir2025-07-15 07:15 1.6K 
[ ]legalize-ceil.mir2025-07-15 07:15 2.4K 
[ ]legalize-cmp.mir2025-07-15 07:15 27K 
[ ]legalize-cmpxchg-128.mir2025-07-15 07:15 3.5K 
[ ]legalize-cmpxchg-with-success.mir2025-07-15 07:15 2.5K 
[ ]legalize-cmpxchg.mir2025-07-15 07:15 3.4K 
[ ]legalize-combines.mir2025-07-15 07:15 3.9K 
[ ]legalize-concat-vectors.mir2025-07-15 07:15 5.7K 
[ ]legalize-constant.mir2025-07-15 07:15 7.3K 
[ ]legalize-cos.mir2025-07-15 07:15 6.6K 
[ ]legalize-cosh.mir2025-07-15 07:15 6.6K 
[ ]legalize-ctlz.mir2025-07-15 07:15 9.7K 
[ ]legalize-ctpop-no-implicit-float.mir2025-07-15 07:15 4.5K 
[ ]legalize-ctpop.mir2025-07-15 07:15 20K 
[ ]legalize-cttz-zero-undef.mir2025-07-15 07:15 4.5K 
[ ]legalize-cttz.mir2025-07-15 07:15 11K 
[ ]legalize-div.mir2025-07-15 07:15 2.8K 
[ ]legalize-divrem.mir2025-07-15 07:15 2.8K 
[ ]legalize-dyn-alloca.mir2025-07-15 07:15 12K 
[ ]legalize-exceptions.ll2025-07-15 07:15 3.0K 
[ ]legalize-exp.mir2025-07-15 07:15 6.6K 
[ ]legalize-ext-cse.mir2025-07-15 07:15 887  
[ ]legalize-ext-csedebug-output.mir2025-07-15 07:15 1.2K 
[ ]legalize-ext.mir2025-07-15 07:15 11K 
[ ]legalize-extload.mir2025-07-15 07:15 4.8K 
[ ]legalize-extract-vector-elt.mir2025-07-15 07:15 22K 
[ ]legalize-extracts.mir2025-07-15 07:15 11K 
[ ]legalize-fcmp.mir2025-07-15 07:15 3.5K 
[ ]legalize-fcopysign.mir2025-07-15 07:15 3.2K 
[ ]legalize-fexp2.mir2025-07-15 07:15 14K 
[ ]legalize-fma.mir2025-07-15 07:15 8.3K 
[ ]legalize-fmad.mir2025-07-15 07:15 4.9K 
[ ]legalize-fmaximum.mir2025-07-15 07:15 5.1K 
[ ]legalize-fmaxnum.mir2025-07-15 07:15 4.7K 
[ ]legalize-fminimum.mir2025-07-15 07:15 5.9K 
[ ]legalize-fminnum.mir2025-07-15 07:15 5.6K 
[ ]legalize-fp-arith-fp16.mir2025-07-15 07:15 5.4K 
[ ]legalize-fp-arith.mir2025-07-15 07:15 3.7K 
[ ]legalize-fp-class.mir2025-07-15 07:15 3.5K 
[ ]legalize-fp16-fconstant.mir2025-07-15 07:15 2.0K 
[ ]legalize-fp128-fconstant.mir2025-07-15 07:15 838  
[ ]legalize-fpenv.mir2025-07-15 07:15 2.1K 
[ ]legalize-fpext.mir2025-07-15 07:15 1.4K 
[ ]legalize-fpmode.mir2025-07-15 07:15 2.7K 
[ ]legalize-fptoi.mir2025-07-15 07:15 6.9K 
[ ]legalize-fptrunc.mir2025-07-15 07:15 5.7K 
[ ]legalize-freeze.mir2025-07-15 07:15 8.1K 
[ ]legalize-frint.mir2025-07-15 07:15 7.6K 
[ ]legalize-fshl.mir2025-07-15 07:15 20K 
[ ]legalize-fshr.mir2025-07-15 07:15 19K 
[ ]legalize-global-pic.mir2025-07-15 07:15 1.3K 
[ ]legalize-global.mir2025-07-15 07:15 2.2K 
[ ]legalize-ignore-hint.mir2025-07-15 07:15 734  
[ ]legalize-ignore-non-generic.mir2025-07-15 07:15 805  
[ ]legalize-indexed-load-stores.mir2025-07-15 07:15 6.5K 
[ ]legalize-insert-vector-elt.mir2025-07-15 07:15 12K 
[ ]legalize-inserts.mir2025-07-15 07:15 21K 
[ ]legalize-intrinsic-get-dynamic-area-offset.mir2025-07-15 07:15 1.0K 
[ ]legalize-intrinsic-min-max.mir2025-07-15 07:15 6.3K 
[ ]legalize-intrinsic-round.mir2025-07-15 07:15 9.2K 
[ ]legalize-intrinsic-roundeven.mir2025-07-15 07:15 13K 
[ ]legalize-intrinsic-trunc.mir2025-07-15 07:15 7.3K 
[ ]legalize-inttoptr-xfail-1.mir2025-07-15 07:15 1.4K 
[ ]legalize-inttoptr-xfail-2.mir2025-07-15 07:15 1.6K 
[ ]legalize-inttoptr.mir2025-07-15 07:15 1.5K 
[ ]legalize-itofp.mir2025-07-15 07:15 9.6K 
[ ]legalize-llrint.mir2025-07-15 07:15 2.7K 
[ ]legalize-llround.mir2025-07-15 07:15 1.3K 
[ ]legalize-load-range.mir2025-07-15 07:15 1.9K 
[ ]legalize-load-store-fewerElts.mir2025-07-15 07:15 1.5K 
[ ]legalize-load-store-vector-of-ptr-debugloc.mir2025-07-15 07:15 1.9K 
[ ]legalize-load-store-vector-of-ptr.mir2025-07-15 07:15 2.8K 
[ ]legalize-load-store-vector.mir2025-07-15 07:15 9.1K 
[ ]legalize-load-store.mir2025-07-15 07:15 28K 
[ ]legalize-load-trunc.mir2025-07-15 07:15 1.0K 
[ ]legalize-log.mir2025-07-15 07:15 6.6K 
[ ]legalize-log2.mir2025-07-15 07:15 6.6K 
[ ]legalize-log10.mir2025-07-15 07:15 6.6K 
[ ]legalize-lrint.mir2025-07-15 07:15 2.7K 
[ ]legalize-lround.mir2025-07-15 07:15 1.2K 
[ ]legalize-memcpy-et-al.mir2025-07-15 07:15 13K 
[ ]legalize-memcpy-with-debug-info.mir2025-07-15 07:15 3.4K 
[ ]legalize-memlib-debug-loc.mir2025-07-15 07:15 2.3K 
[ ]legalize-merge-values.mir2025-07-15 07:15 1.4K 
[ ]legalize-min-max.mir2025-07-15 07:15 38K 
[ ]legalize-mul.mir2025-07-15 07:15 24K 
[ ]legalize-nearbyint.mir2025-07-15 07:15 7.8K 
[ ]legalize-non-pow2-load-store.mir2025-07-15 07:15 8.0K 
[ ]legalize-or.mir2025-07-15 07:15 12K 
[ ]legalize-phi-insertpt-decrement.mir2025-07-15 07:15 4.1K 
[ ]legalize-phi.mir2025-07-15 07:15 33K 
[ ]legalize-pow.mir2025-07-15 07:15 17K 
[ ]legalize-property.mir2025-07-15 07:15 413  
[ ]legalize-ptr-add.mir2025-07-15 07:15 3.3K 
[ ]legalize-ptrtoint.mir2025-07-15 07:15 4.3K 
[ ]legalize-reduce-add.mir2025-07-15 07:15 6.8K 
[ ]legalize-reduce-and.mir2025-07-15 07:15 26K 
[ ]legalize-reduce-fadd.mir2025-07-15 07:15 2.7K 
[ ]legalize-reduce-fminmax.mir2025-07-15 07:15 3.3K 
[ ]legalize-reduce-fmul.mir2025-07-15 07:15 1.3K 
[ ]legalize-reduce-or.mir2025-07-15 07:15 26K 
[ ]legalize-reduce-xor.mir2025-07-15 07:15 26K 
[ ]legalize-rem.mir2025-07-15 07:15 11K 
[ ]legalize-rotr-rotl.mir2025-07-15 07:15 5.9K 
[ ]legalize-s128-div.mir2025-07-15 07:15 4.1K 
[ ]legalize-sadde.mir2025-07-15 07:15 5.7K 
[ ]legalize-saddo.mir2025-07-15 07:15 4.5K 
[ ]legalize-saddsat.mir2025-07-15 07:15 11K 
[ ]legalize-sbfx.mir2025-07-15 07:15 1.3K 
[ ]legalize-select.mir2025-07-15 07:15 19K 
[ ]legalize-sext-128.ll2025-07-15 07:15 276  
[ ]legalize-sext-128.mir2025-07-15 07:15 748  
[ ]legalize-sext-copy.mir2025-07-15 07:15 782  
[ ]legalize-sext-zext-128.mir2025-07-15 07:15 3.4K 
[ ]legalize-sext.mir2025-07-15 07:15 1.5K 
[ ]legalize-sextload.mir2025-07-15 07:15 613  
[ ]legalize-shift-imm-promote-dloc.mir2025-07-15 07:15 2.1K 
[ ]legalize-shift.mir2025-07-15 07:15 22K 
[ ]legalize-shuffle-1x.ll2025-07-15 07:15 1.5K 
[ ]legalize-shuffle-vector-widen-crash.ll2025-07-15 07:15 1.4K 
[ ]legalize-shuffle-vector.mir2025-07-15 07:15 30K 
[ ]legalize-simple.mir2025-07-15 07:15 8.1K 
[ ]legalize-sin.mir2025-07-15 07:15 6.6K 
[ ]legalize-sinh.mir2025-07-15 07:15 6.6K 
[ ]legalize-sqrt.mir2025-07-15 07:15 2.4K 
[ ]legalize-ssube.mir2025-07-15 07:15 5.7K 
[ ]legalize-ssubo.mir2025-07-15 07:15 4.5K 
[ ]legalize-ssubsat.mir2025-07-15 07:15 11K 
[ ]legalize-store-vector-bools.mir2025-07-15 07:15 5.5K 
[ ]legalize-sub.mir2025-07-15 07:15 11K 
[ ]legalize-tan.mir2025-07-15 07:15 6.6K 
[ ]legalize-tanh.mir2025-07-15 07:15 6.6K 
[ ]legalize-threeway-cmp.mir2025-07-15 07:15 5.7K 
[ ]legalize-uadd-sat.mir2025-07-15 07:15 5.5K 
[ ]legalize-uadde.mir2025-07-15 07:15 5.7K 
[ ]legalize-uaddo.mir2025-07-15 07:15 4.5K 
[ ]legalize-ubfx.mir2025-07-15 07:15 1.3K 
[ ]legalize-undef.mir2025-07-15 07:15 3.0K 
[ ]legalize-unmerge-values.mir2025-07-15 07:15 4.0K 
[ ]legalize-usub-sat.mir2025-07-15 07:15 5.5K 
[ ]legalize-usube.mir2025-07-15 07:15 5.7K 
[ ]legalize-usubo.mir2025-07-15 07:15 4.5K 
[ ]legalize-vaarg.mir2025-07-15 07:15 3.1K 
[ ]legalize-vacopy.mir2025-07-15 07:15 2.8K 
[ ]legalize-vector-cmp.mir2025-07-15 07:15 66K 
[ ]legalize-vector-compress.mir2025-07-15 07:15 9.6K 
[ ]legalize-vector-shift.mir2025-07-15 07:15 2.7K 
[ ]legalize-xor.mir2025-07-15 07:15 15K 
[ ]legalize-xtn.mir2025-07-15 07:15 20K 
[ ]legalize-zextload.mir2025-07-15 07:15 613  
[ ]legalizer-combiner-zext-trunc-crash.mir2025-07-15 07:15 2.7K 
[ ]legalizer-combiner.mir2025-07-15 07:15 4.7K 
[ ]legalizer-info-validation.mir2025-07-15 07:15 61K 
[ ]lifetime-marker-no-dce.mir2025-07-15 07:15 777  
[ ]load-addressing-modes.mir2025-07-15 07:15 36K 
[ ]load-wro-addressing-modes.mir2025-07-15 07:15 14K 
[ ]localizer-arm64-tti.ll2025-07-15 07:15 14K 
[ ]localizer-propagate-debug-loc.mir2025-07-15 07:15 9.3K 
[ ]localizer.mir2025-07-15 07:15 23K 
[ ]lower-neon-vector-fcmp.mir2025-07-15 07:15 25K 
[ ]machine-cse-mid-pipeline.mir2025-07-15 07:15 11K 
[ ]memcpy_chk_no_tail.ll2025-07-15 07:15 1.1K 
[ ]merge-stores-truncating.ll2025-07-15 07:15 11K 
[ ]merge-stores-truncating.mir2025-07-15 07:15 25K 
[ ]no-neon-no-fp.ll2025-07-15 07:15 819  
[ ]no-reduce-shl-of-ext.ll2025-07-15 07:15 939  
[ ]no-regclass.mir2025-07-15 07:15 1.0K 
[ ]non-pow-2-extload-combine.mir2025-07-15 07:15 1.2K 
[ ]observer-change-crash.mir2025-07-15 07:15 768  
[ ]opt-and-tbnz-tbz.mir2025-07-15 07:15 7.3K 
[ ]opt-fold-and-tbz-tbnz.mir2025-07-15 07:15 3.6K 
[ ]opt-fold-compare.mir2025-07-15 07:15 20K 
[ ]opt-fold-ext-tbz-tbnz.mir2025-07-15 07:15 4.3K 
[ ]opt-fold-shift-tbz-tbnz.mir2025-07-15 07:15 12K 
[ ]opt-fold-trunc-tbz-tbnz.mir2025-07-15 07:15 1.2K 
[ ]opt-fold-xor-tbz-tbnz.mir2025-07-15 07:15 6.7K 
[ ]opt-overlapping-and-postlegalize.mir2025-07-15 07:15 1.1K 
[ ]opt-overlapping-and.mir2025-07-15 07:15 3.9K 
[ ]opt-shifted-reg-compare.mir2025-07-15 07:15 25K 
[ ]phi-mir-debugify.mir2025-07-15 07:15 5.8K 
[ ]phi-with-empty-type.ll2025-07-15 07:15 885  
[ ]postlegalizer-combine-ptr-add-chain.mir2025-07-15 07:15 1.1K 
[ ]postlegalizer-combiner-and-trivial-mask.mir2025-07-15 07:15 8.6K 
[ ]postlegalizer-combiner-anyext-to-zext.mir2025-07-15 07:15 2.8K 
[ ]postlegalizer-combiner-constant-fold.mir2025-07-15 07:15 5.8K 
[ ]postlegalizer-combiner-copy-prop.mir2025-07-15 07:15 938  
[ ]postlegalizer-combiner-identity.mir2025-07-15 07:15 710  
[ ]postlegalizer-combiner-merge.mir2025-07-15 07:15 2.8K 
[ ]postlegalizer-combiner-redundant-sextinreg.mir2025-07-15 07:15 2.7K 
[ ]postlegalizer-combiner-sameopcode-hands-crash.mir2025-07-15 07:15 1.2K 
[ ]postlegalizer-combiner-split-zero-stores.mir2025-07-15 07:15 6.4K 
[ ]postlegalizer-combiner-undef.mir2025-07-15 07:15 1.1K 
[ ]postlegalizer-combiner-unmergedup.mir2025-07-15 07:15 3.3K 
[ ]postlegalizer-lowering-adjust-icmp-imm.mir2025-07-15 07:15 23K 
[ ]postlegalizer-lowering-build-vector-to-dup.mir2025-07-15 07:15 7.2K 
[ ]postlegalizer-lowering-ext.mir2025-07-15 07:15 11K 
[ ]postlegalizer-lowering-rev.mir2025-07-15 07:15 2.9K 
[ ]postlegalizer-lowering-sextinreg.mir2025-07-15 07:15 1.4K 
[ ]postlegalizer-lowering-shuf-to-ins.mir2025-07-15 07:15 11K 
[ ]postlegalizer-lowering-shuffle-duplane.mir2025-07-15 07:15 6.3K 
[ ]postlegalizer-lowering-shuffle-splat.mir2025-07-15 07:15 16K 
[ ]postlegalizer-lowering-swap-compare-operands.mir2025-07-15 07:15 29K 
[ ]postlegalizer-lowering-trn.mir2025-07-15 07:15 8.0K 
[ ]postlegalizer-lowering-truncstore.mir2025-07-15 07:15 1.8K 
[ ]postlegalizer-lowering-unmerge-ext.mir2025-07-15 07:15 5.9K 
[ ]postlegalizer-lowering-uzp.mir2025-07-15 07:15 4.9K 
[ ]postlegalizer-lowering-vashr-vlshr.mir2025-07-15 07:15 5.3K 
[ ]postlegalizer-lowering-zip.mir2025-07-15 07:15 7.3K 
[ ]postlegalizercombiner-extending-loads.mir2025-07-15 07:15 1.4K 
[ ]postlegalizercombiner-extractvec-faddp.mir2025-07-15 07:15 6.9K 
[ ]postlegalizercombiner-hoist-same-hands.mir2025-07-15 07:15 2.6K 
[ ]postlegalizercombiner-mulpow2.mir2025-07-15 07:15 1.1K 
[ ]postlegalizercombiner-rotate.mir2025-07-15 07:15 3.1K 
[ ]postlegalizercombiner-select.mir2025-07-15 07:15 2.2K 
[ ]postselectopt-constrain-new-regop.mir2025-07-15 07:15 3.4K 
[ ]postselectopt-dead-cc-defs-in-fcmp.mir2025-07-15 07:15 13K 
[ ]postselectopt-dead-cc-defs.mir2025-07-15 07:15 13K 
[ ]postselectopt-xclass-copies.mir2025-07-15 07:15 3.7K 
[ ]pr57349.ll2025-07-15 07:15 1.1K 
[ ]pr58423.ll2025-07-15 07:15 442  
[ ]prefetch-darwin-no-fold-global.ll2025-07-15 07:15 1.0K 
[ ]prelegalizer-combiner-addo-zero.mir2025-07-15 07:15 4.8K 
[ ]prelegalizer-combiner-binop-reassoc.mir2025-07-15 07:15 3.8K 
[ ]prelegalizer-combiner-divrem-insertpt-conflict.mir2025-07-15 07:15 1.9K 
[ ]prelegalizer-combiner-divrem-insertpt-crash.mir2025-07-15 07:15 1.9K 
[ ]prelegalizer-combiner-icmp-to-true-false-known-bits.mir2025-07-15 07:15 18K 
[ ]prelegalizer-combiner-load-and-mask.mir2025-07-15 07:15 12K 
[ ]prelegalizer-combiner-load-or-pattern-align.mir2025-07-15 07:15 3.4K 
[ ]prelegalizer-combiner-load-or-pattern.mir2025-07-15 07:15 64K 
[ ]prelegalizer-combiner-mulo-zero.mir2025-07-15 07:15 5.1K 
[ ]prelegalizer-combiner-narrow-binop-feeding-add.mir2025-07-15 07:15 12K 
[ ]prelegalizer-combiner-select-to-fminmax.mir2025-07-15 07:15 6.6K 
[ ]prelegalizer-combiner-use-vector-truncate.mir2025-07-15 07:15 2.1K 
[ ]prelegalizercombiner-ashr-shl-to-sext-inreg.mir2025-07-15 07:15 2.9K 
[ ]prelegalizercombiner-binop-same-val.mir2025-07-15 07:15 2.7K 
[ ]prelegalizercombiner-br.mir2025-07-15 07:15 3.6K 
[ ]prelegalizercombiner-bzero.mir2025-07-15 07:15 5.8K 
[ ]prelegalizercombiner-commute-shift.mir2025-07-15 07:15 4.6K 
[ ]prelegalizercombiner-concat-vectors.mir2025-07-15 07:15 5.3K 
[ ]prelegalizercombiner-copy-prop-disabled.mir2025-07-15 07:15 1.9K 
[ ]prelegalizercombiner-extending-loads-cornercases.mir2025-07-15 07:15 10K 
[ ]prelegalizercombiner-extending-loads-s1.mir2025-07-15 07:15 1.2K 
[ ]prelegalizercombiner-extending-loads.mir2025-07-15 07:15 14K 
[ ]prelegalizercombiner-funnel-shifts-to-rotates.mir2025-07-15 07:15 3.2K 
[ ]prelegalizercombiner-hoist-same-hands.mir2025-07-15 07:15 23K 
[ ]prelegalizercombiner-icmp-redundant-trunc.mir2025-07-15 07:15 3.9K 
[ ]prelegalizercombiner-invert-cmp.mir2025-07-15 07:15 10K 
[ ]prelegalizercombiner-not-really-equiv-insts.mir2025-07-15 07:15 5.4K 
[ ]prelegalizercombiner-prop-extends-phi.mir2025-07-15 07:15 17K 
[ ]prelegalizercombiner-ptradd-chain.mir2025-07-15 07:15 5.8K 
[ ]prelegalizercombiner-select.mir2025-07-15 07:15 5.4K 
[ ]prelegalizercombiner-sextload-from-sextinreg.mir2025-07-15 07:15 4.2K 
[ ]prelegalizercombiner-shuffle-vector-disjoint-mask.mir2025-07-15 07:15 3.5K 
[ ]prelegalizercombiner-shuffle-vector-undef-rhs.mir2025-07-15 07:15 1.5K 
[ ]prelegalizercombiner-shuffle-vector.mir2025-07-15 07:15 21K 
[ ]prelegalizercombiner-simplify-add.mir2025-07-15 07:15 1.4K 
[ ]prelegalizercombiner-trivial-arith.mir2025-07-15 07:15 16K 
[ ]prelegalizercombiner-undef.mir2025-07-15 07:15 8.8K 
[ ]prelegalizercombiner-xor-of-and-with-same-reg.mir2025-07-15 07:15 5.7K 
[ ]preselect-process-phis.mir2025-07-15 07:15 7.9K 
[ ]ptrauth-constant-in-code.ll2025-07-15 07:15 12K 
[ ]rbs-matrixindex-regclass-crash.mir2025-07-15 07:15 3.8K 
[ ]reg-bank-128bit.mir2025-07-15 07:15 588  
[ ]regbank-assert-align.mir2025-07-15 07:15 852  
[ ]regbank-assert-sext.mir2025-07-15 07:15 12K 
[ ]regbank-assert-zext.mir2025-07-15 07:15 12K 
[ ]regbank-ceil.mir2025-07-15 07:15 839  
[ ]regbank-dup.mir2025-07-15 07:15 4.9K 
[ ]regbank-extract-vector-elt.mir2025-07-15 07:15 3.0K 
[ ]regbank-extract.mir2025-07-15 07:15 1.4K 
[ ]regbank-fcmp.mir2025-07-15 07:15 884  
[ ]regbank-fma.mir2025-07-15 07:15 1.9K 
[ ]regbank-fmaximum.mir2025-07-15 07:15 2.1K 
[ ]regbank-fminimum.mir2025-07-15 07:15 2.1K 
[ ]regbank-fp-use-def.mir2025-07-15 07:15 16K 
[ ]regbank-inlineasm.mir2025-07-15 07:15 3.0K 
[ ]regbank-insert-vector-elt.mir2025-07-15 07:15 5.4K 
[ ]regbank-intrinsic-round.mir2025-07-15 07:15 5.5K 
[ ]regbank-intrinsic-trunc.mir2025-07-15 07:15 1.5K 
[ ]regbank-intrinsic.mir2025-07-15 07:15 2.4K 
[ ]regbank-llround.mir2025-07-15 07:15 2.0K 
[ ]regbank-lround.mir2025-07-15 07:15 2.0K 
[ ]regbank-maxnum.mir2025-07-15 07:15 2.0K 
[ ]regbank-minnum.mir2025-07-15 07:15 2.0K 
[ ]regbank-nearbyint.mir2025-07-15 07:15 4.5K 
[ ]regbank-select.mir2025-07-15 07:15 5.7K 
[ ]regbank-shift-imm-64.mir2025-07-15 07:15 3.9K 
[ ]regbank-trunc-s128.mir2025-07-15 07:15 765  
[ ]regbankselect-build-vector.mir2025-07-15 07:15 4.9K 
[ ]regbankselect-dbg-value.mir2025-07-15 07:15 1.8K 
[ ]regbankselect-default.mir2025-07-15 07:15 25K 
[ ]regbankselect-fp-loads.mir2025-07-15 07:15 17K 
[ ]regbankselect-reductions.mir2025-07-15 07:15 2.0K 
[ ]regbankselect-reg_sequence.mir2025-07-15 07:15 611  
[ ]regbankselect-unmerge-vec.mir2025-07-15 07:15 1.6K 
[ ]ret-1x-vec.ll2025-07-15 07:15 4.3K 
[ ]ret-vec-promote.ll2025-07-15 07:15 27K 
[ ]retry-artifact-combine.mir2025-07-15 07:15 866  
[ ]salvage-debug-info-dead.mir2025-07-15 07:15 4.0K 
[ ]select-abs.mir2025-07-15 07:15 3.4K 
[ ]select-add-low.mir2025-07-15 07:15 2.5K 
[ ]select-anyext-indexed-load-crash.ll2025-07-15 07:15 1.0K 
[ ]select-arith-extended-reg.mir2025-07-15 07:15 24K 
[ ]select-arith-shifted-reg.mir2025-07-15 07:15 12K 
[ ]select-atomic-load-store.mir2025-07-15 07:15 1.9K 
[ ]select-atomicrmw.mir2025-07-15 07:15 8.4K 
[ ]select-binop.mir2025-07-15 07:15 31K 
[ ]select-bit.mir2025-07-15 07:15 4.5K 
[ ]select-bitcast-bigendian.mir2025-07-15 07:15 815  
[ ]select-bitcast.mir2025-07-15 07:15 6.0K 
[ ]select-bitfield-insert.ll2025-07-15 07:15 3.8K 
[ ]select-bitreverse.mir2025-07-15 07:15 2.4K 
[ ]select-blockaddress.mir2025-07-15 07:15 4.2K 
[ ]select-br.mir2025-07-15 07:15 1.3K 
[ ]select-brcond-of-binop.mir2025-07-15 07:15 6.2K 
[ ]select-bswap.mir2025-07-15 07:15 4.2K 
[ ]select-build-vector.mir2025-07-15 07:15 9.6K 
[ ]select-cbz.mir2025-07-15 07:15 4.9K 
[ ]select-ceil.mir2025-07-15 07:15 3.0K 
[ ]select-cmp.mir2025-07-15 07:15 16K 
[ ]select-cmpxchg.mir2025-07-15 07:15 1.9K 
[ ]select-concat-vectors.mir2025-07-15 07:15 4.3K 
[ ]select-const-pool.mir2025-07-15 07:15 1.1K 
[ ]select-const-vector.mir2025-07-15 07:15 6.7K 
[ ]select-constant.mir2025-07-15 07:15 5.3K 
[ ]select-constbarrier.mir2025-07-15 07:15 1.6K 
[ ]select-ctlz.mir2025-07-15 07:15 5.0K 
[ ]select-ctpop.mir2025-07-15 07:15 1.3K 
[ ]select-cttz.mir2025-07-15 07:15 2.2K 
[ ]select-dbg-value.mir2025-07-15 07:15 2.8K 
[ ]select-dup.mir2025-07-15 07:15 13K 
[ ]select-ext.mir2025-07-15 07:15 4.5K 
[ ]select-extload.mir2025-07-15 07:15 1.5K 
[ ]select-extract-vector-elt-with-extend.mir2025-07-15 07:15 10K 
[ ]select-extract-vector-elt.mir2025-07-15 07:15 8.5K 
[ ]select-extract.mir2025-07-15 07:15 941  
[ ]select-fabs.mir2025-07-15 07:15 2.9K 
[ ]select-faddp.mir2025-07-15 07:15 1.9K 
[ ]select-fcmp.mir2025-07-15 07:15 5.1K 
[ ]select-floor.mir2025-07-15 07:15 3.0K 
[ ]select-fma.mir2025-07-15 07:15 1.1K 
[ ]select-fmaximum.mir2025-07-15 07:15 2.0K 
[ ]select-fminimum.mir2025-07-15 07:15 2.0K 
[ ]select-fmul-indexed.mir2025-07-15 07:15 1.5K 
[ ]select-fp-anyext-crash.ll2025-07-15 07:15 1.5K 
[ ]select-fp-casts.mir2025-07-15 07:15 16K 
[ ]select-fp-index-load.mir2025-07-15 07:15 10K 
[ ]select-fp16-fconstant.mir2025-07-15 07:15 1.5K 
[ ]select-frameaddr.ll2025-07-15 07:15 474  
[ ]select-frint-nofp16.mir2025-07-15 07:15 11K 
[ ]select-frint.mir2025-07-15 07:15 5.3K 
[ ]select-gv-cmodel-large.mir2025-07-15 07:15 4.0K 
[ ]select-gv-cmodel-tiny.mir2025-07-15 07:15 2.2K 
[ ]select-gv-with-offset.mir2025-07-15 07:15 2.4K 
[ ]select-hint.mir2025-07-15 07:15 5.0K 
[ ]select-imm.mir2025-07-15 07:15 6.6K 
[ ]select-implicit-def.mir2025-07-15 07:15 1.2K 
[ ]select-insert-extract.mir2025-07-15 07:15 3.6K 
[ ]select-insert-vector-elt.mir2025-07-15 07:15 10K 
[ ]select-int-ext.mir2025-07-15 07:15 13K 
[ ]select-int-ptr-casts.mir2025-07-15 07:15 5.6K 
[ ]select-intrinsic-aarch64-hint.mir2025-07-15 07:15 694  
[ ]select-intrinsic-aarch64-sdiv.mir2025-07-15 07:15 1.1K 
[ ]select-intrinsic-crypto-aesmc.mir2025-07-15 07:15 1.1K 
[ ]select-intrinsic-round.mir2025-07-15 07:15 5.7K 
[ ]select-intrinsic-trunc.mir2025-07-15 07:15 5.7K 
[ ]select-jump-table-brjt-constrain.mir2025-07-15 07:15 2.3K 
[ ]select-jump-table-brjt.mir2025-07-15 07:15 4.8K 
[ ]select-ld2.mir2025-07-15 07:15 8.9K 
[ ]select-ld4.mir2025-07-15 07:15 12K 
[ ]select-ldaxr-intrin.mir2025-07-15 07:15 3.5K 
[ ]select-ldxr-intrin.mir2025-07-15 07:15 3.4K 
[ ]select-load-store-vector-of-ptr.mir2025-07-15 07:15 2.1K 
[ ]select-load.mir2025-07-15 07:15 22K 
[ ]select-logical-imm.mir2025-07-15 07:15 3.8K 
[ ]select-logical-shifted-reg.mir2025-07-15 07:15 2.5K 
[ ]select-mul.mir2025-07-15 07:15 7.5K 
[ ]select-muladd.mir2025-07-15 07:15 1.2K 
[ ]select-nearbyint.mir2025-07-15 07:15 4.7K 
[ ]select-neon-vcvtfxu2fp.mir2025-07-15 07:15 1.0K 
[ ]select-neon-vector-fcmp.mir2025-07-15 07:15 4.9K 
[ ]select-phi.mir2025-07-15 07:15 3.2K 
[ ]select-pr32733.mir2025-07-15 07:15 1.7K 
[ ]select-property.mir2025-07-15 07:15 535  
[ ]select-ptr-add.mir2025-07-15 07:15 4.5K 
[ ]select-reduce-add.mir2025-07-15 07:15 4.4K 
[ ]select-reduce-fadd.mir2025-07-15 07:15 1.4K 
[ ]select-redundant-zext-of-load.mir2025-07-15 07:15 1.6K 
[ ]select-redundant-zext.mir2025-07-15 07:15 6.5K 
[ ]select-returnaddr.ll2025-07-15 07:15 1.1K 
[ ]select-returnaddress-liveins.mir2025-07-15 07:15 3.3K 
[ ]select-rev.mir2025-07-15 07:15 7.1K 
[ ]select-rotate.mir2025-07-15 07:15 2.1K 
[ ]select-sadde.mir2025-07-15 07:15 7.8K 
[ ]select-saddo.mir2025-07-15 07:15 5.1K 
[ ]select-sbfx.mir2025-07-15 07:15 3.1K 
[ ]select-scalar-merge.mir2025-07-15 07:15 1.2K 
[ ]select-scalar-shift-imm.mir2025-07-15 07:15 6.8K 
[ ]select-select.mir2025-07-15 07:15 23K 
[ ]select-sextload.mir2025-07-15 07:15 1.6K 
[ ]select-shuffle-vector.mir2025-07-15 07:15 6.6K 
[ ]select-shufflevec-undef-mask-elt.mir2025-07-15 07:15 2.3K 
[ ]select-splat-vector.ll2025-07-15 07:15 2.4K 
[ ]select-sqrt.mir2025-07-15 07:15 3.0K 
[ ]select-ssube.mir2025-07-15 07:15 7.7K 
[ ]select-ssubo.mir2025-07-15 07:15 5.1K 
[ ]select-st2.mir2025-07-15 07:15 8.5K 
[ ]select-static.mir2025-07-15 07:15 8.0K 
[ ]select-stlxr-intrin.mir2025-07-15 07:15 4.4K 
[ ]select-store-truncating-float.mir2025-07-15 07:15 3.2K 
[ ]select-store.mir2025-07-15 07:15 21K 
[ ]select-stx.mir2025-07-15 07:15 4.4K 
[ ]select-tbnz-from-cmp.mir2025-07-15 07:15 5.7K 
[ ]select-to-fmin-fmax.ll2025-07-15 07:15 3.0K 
[ ]select-trap.mir2025-07-15 07:15 742  
[ ]select-trn.mir2025-07-15 07:15 9.9K 
[ ]select-trunc.mir2025-07-15 07:15 3.1K 
[ ]select-truncstore-atomic.mir2025-07-15 07:15 4.0K 
[ ]select-uadde.mir2025-07-15 07:15 7.8K 
[ ]select-uaddo.mir2025-07-15 07:15 5.1K 
[ ]select-ubfx.mir2025-07-15 07:15 3.0K 
[ ]select-unmerge.mir2025-07-15 07:15 22K 
[ ]select-unreachable-blocks.mir2025-07-15 07:15 1.7K 
[ ]select-usube.mir2025-07-15 07:15 7.7K 
[ ]select-usubo.mir2025-07-15 07:15 5.1K 
[ ]select-uzp.mir2025-07-15 07:15 1.6K 
[ ]select-vector-icmp.mir2025-07-15 07:15 89K 
[ ]select-vector-shift.mir2025-07-15 07:15 18K 
[ ]select-with-no-legality-check.mir2025-07-15 07:15 137K 
[ ]select-xor.mir2025-07-15 07:15 4.1K 
[ ]select-zext-as-copy.mir2025-07-15 07:15 1.3K 
[ ]select-zextload.mir2025-07-15 07:15 9.2K 
[ ]select-zip.mir2025-07-15 07:15 4.4K 
[ ]select.mir2025-07-15 07:15 9.4K 
[ ]sext-inreg-ldrow-16b.mir2025-07-15 07:15 3.5K 
[ ]sink-and-fold-illegal-shift.ll2025-07-15 07:15 547  
[ ]speculative-hardening-brcond.mir2025-07-15 07:15 2.8K 
[ ]split-offsets-for-stp.ll2025-07-15 07:15 13K 
[ ]stacksave-stackrestore.ll2025-07-15 07:15 1.2K 
[ ]store-addressing-modes.mir2025-07-15 07:15 13K 
[ ]store-merging-debug.mir2025-07-15 07:15 8.5K 
[ ]store-merging.ll2025-07-15 07:15 10K 
[ ]store-merging.mir2025-07-15 07:15 30K 
[ ]store-wro-addressing-modes.mir2025-07-15 07:15 2.5K 
[ ]subreg-copy.mir2025-07-15 07:15 2.3K 
[ ]sve-formal-argument-multiple.ll2025-07-15 07:15 1.8K 
[ ]sve-formal-argument.ll2025-07-15 07:15 1.4K 
[ ]sve-integer.ll2025-07-15 07:15 5.9K 
[ ]sve-load-store.ll2025-07-15 07:15 1.6K 
[ ]swifterror.ll2025-07-15 07:15 17K 
[ ]swiftself.ll2025-07-15 07:15 2.4K 
[ ]tail-call-no-save-fp-lr.ll2025-07-15 07:15 568  
[ ]tbz-sgt.mir2025-07-15 07:15 4.4K 
[ ]translate-constant-dag.ll2025-07-15 07:15 3.4K 
[ ]translate-gep.ll2025-07-15 07:15 6.9K 
[ ]translate-ret.ll2025-07-15 07:15 3.1K 
[ ]translate-sve-formal-argument-multiple.ll2025-07-15 07:15 33K 
[ ]translate-sve-formal-argument.ll2025-07-15 07:15 19K 
[ ]uaddo-8-16-bits.mir2025-07-15 07:15 29K 
[ ]ubsantrap.ll2025-07-15 07:15 286  
[ ]unknown-intrinsic.ll2025-07-15 07:15 237  
[ ]unwind-inline-asm.ll2025-07-15 07:15 1.9K 
[ ]v8.4-atomic-128.ll2025-07-15 07:15 5.6K 
[ ]vararg.mir2025-07-15 07:15 2.4K 
[ ]varargs-ios-translator.ll2025-07-15 07:15 717  
[ ]vastart.ll2025-07-15 07:15 713  
[ ]vec-param.ll2025-07-15 07:15 19K 
[ ]vec-s16-param.ll2025-07-15 07:15 1.4K 
[ ]widen-narrow-tbz-tbnz.mir2025-07-15 07:15 4.7K 
[ ]xro-addressing-mode-constant.mir2025-07-15 07:15 6.6K 
Apache Server at tb-build-06.torproject.org Port 443