Index of /~tb-builder/tor-browser-build/git_clones/llvm-project/llvm/test/CodeGen/AArch64

[ICO]NameLast modifiedSizeDescription
[PARENTDIR]Parent Directory  -  
[ ]2s-complement-asm.ll2025-07-15 07:15 482  
[ ]16bit-float-promotion-with-nofp.ll2025-07-15 07:15 3.2K 
[ ]128bit_load_store.ll2025-07-15 07:15 1.2K 
[DIR]Atomics/2025-07-15 07:15 -  
[ ]DAGCombine_vscale.ll2025-07-15 07:15 1.9K 
[DIR]GlobalISel/2025-07-15 07:15 -  
[ ]O0-pipeline.ll2025-07-15 07:15 4.3K 
[ ]O3-pipeline.ll2025-07-15 07:15 13K 
[ ]PBQP-chain.ll2025-07-15 07:15 5.3K 
[ ]PBQP-coalesce-benefit.ll2025-07-15 07:15 495  
[ ]PBQP-csr.ll2025-07-15 07:15 4.2K 
[ ]PBQP.ll2025-07-15 07:15 322  
[ ]PHIElimination-crash.mir2025-07-15 07:15 883  
[ ]PHIElimination-debugloc.mir2025-07-15 07:15 1.6K 
[ ]README2025-07-15 07:15 602  
[ ]Redundantstore.ll2025-07-15 07:15 700  
[ ]a55-fuse-address.mir2025-07-15 07:15 1.9K 
[ ]a57-csel.ll2025-07-15 07:15 704  
[ ]aarch-multipart.ll2025-07-15 07:15 484  
[ ]aarch64-2014-08-11-MachineCombinerCrash.ll2025-07-15 07:15 5.5K 
[ ]aarch64-2014-12-02-combine-soften.ll2025-07-15 07:15 396  
[ ]aarch64-DAGCombine-findBetterNeighborChains-crash.ll2025-07-15 07:15 1.3K 
[ ]aarch64-a57-fp-load-balancing.ll2025-07-15 07:15 13K 
[ ]aarch64-address-type-promotion-assertion.ll2025-07-15 07:15 1.8K 
[ ]aarch64-address-type-promotion.ll2025-07-15 07:15 935  
[ ]aarch64-addv.ll2025-07-15 07:15 15K 
[ ]aarch64-avoid-illegal-extract-subvector.ll2025-07-15 07:15 1.3K 
[ ]aarch64-be-bv.ll2025-07-15 07:15 39K 
[ ]aarch64-bf16-dotprod-intrinsics.ll2025-07-15 07:15 7.0K 
[ ]aarch64-bf16-ldst-intrinsics.ll2025-07-15 07:15 49K 
[ ]aarch64-bif-gen.ll2025-07-15 07:15 6.1K 
[ ]aarch64-bit-gen.ll2025-07-15 07:15 9.0K 
[ ]aarch64-bitwisenot-fold.ll2025-07-15 07:15 3.8K 
[ ]aarch64-bswap-ext.ll2025-07-15 07:15 914  
[ ]aarch64-checkMergeStoreCandidatesForDependencies.ll2025-07-15 07:15 2.7K 
[ ]aarch64-codegen-prepare-atp.ll2025-07-15 07:15 2.1K 
[ ]aarch64-combine-add-sub-mul.ll2025-07-15 07:15 3.5K 
[ ]aarch64-combine-add-zext.ll2025-07-15 07:15 1.9K 
[ ]aarch64-combine-fmul-fsub.mir2025-07-15 07:15 5.4K 
[ ]aarch64-dup-dot-crash.ll2025-07-15 07:15 1.7K 
[ ]aarch64-dup-ext-crash.ll2025-07-15 07:15 3.3K 
[ ]aarch64-dup-ext-scalable.ll2025-07-15 07:15 13K 
[ ]aarch64-dup-ext-vectortype-crash.ll2025-07-15 07:15 770  
[ ]aarch64-dup-ext.ll2025-07-15 07:15 19K 
[ ]aarch64-dup-extract-scalable.ll2025-07-15 07:15 27K 
[ ]aarch64-dynamic-stack-layout.ll2025-07-15 07:15 28K 
[ ]aarch64-fastcc-stackup.ll2025-07-15 07:15 1.5K 
[ ]aarch64-fix-cortex-a53-835769.ll2025-07-15 07:15 15K 
[ ]aarch64-fixup-statepoint-regs-crash.ll2025-07-15 07:15 2.1K 
[ ]aarch64-fold-lslfast.ll2025-07-15 07:15 18K 
[ ]aarch64-gep-opt.ll2025-07-15 07:15 6.3K 
[ ]aarch64-icmp-opt.ll2025-07-15 07:15 2.4K 
[ ]aarch64-insert-subvector-undef.ll2025-07-15 07:15 776  
[ ]aarch64-interleaved-access-w-undef.ll2025-07-15 07:15 3.8K 
[ ]aarch64-interleaved-ld-combine.ll2025-07-15 07:15 18K 
[ ]aarch64-isel-csinc-type.ll2025-07-15 07:15 2.9K 
[ ]aarch64-isel-csinc.ll2025-07-15 07:15 4.1K 
[ ]aarch64-known-bits-hadd.ll2025-07-15 07:15 4.7K 
[ ]aarch64-large-stack-spbump.mir2025-07-15 07:15 1.5K 
[ ]aarch64-ldst-modified-baseReg.mir2025-07-15 07:15 2.9K 
[ ]aarch64-ldst-no-premature-sp-pop.mir2025-07-15 07:15 2.4K 
[ ]aarch64-ldst-opt-instr-ref.mir2025-07-15 07:15 6.4K 
[ ]aarch64-ldst-subsuperReg-no-ldp.mir2025-07-15 07:15 1.1K 
[ ]aarch64-load-ext.ll2025-07-15 07:15 15K 
[ ]aarch64-loop-gep-opt.ll2025-07-15 07:15 1.6K 
[ ]aarch64-lsr-bfi.ll2025-07-15 07:15 2.0K 
[ ]aarch64-matmul.ll2025-07-15 07:15 5.8K 
[ ]aarch64-matrix-umull-smull.ll2025-07-15 07:15 55K 
[ ]aarch64-minmaxv.ll2025-07-15 07:15 58K 
[ ]aarch64-mixed-ptr-sizes.ll2025-07-15 07:15 6.1K 
[ ]aarch64-mops-consecutive.ll2025-07-15 07:15 3.1K 
[ ]aarch64-mops-mte.ll2025-07-15 07:15 12K 
[ ]aarch64-mops.ll2025-07-15 07:15 81K 
[ ]aarch64-mov-debug-locs.mir2025-07-15 07:15 12K 
[ ]aarch64-mull-masks.ll2025-07-15 07:15 52K 
[ ]aarch64-mulv.ll2025-07-15 07:15 17K 
[ ]aarch64-named-reg-w18.ll2025-07-15 07:15 293  
[ ]aarch64-named-reg-x18.ll2025-07-15 07:15 293  
[ ]aarch64-neon-faminmax.ll2025-07-15 07:15 23K 
[ ]aarch64-neon-vector-insert-uaddlv.ll2025-07-15 07:15 20K 
[ ]aarch64-p2align-max-bytes-neoverse.ll2025-07-15 07:15 4.9K 
[ ]aarch64-p2align-max-bytes.ll2025-07-15 07:15 4.8K 
[ ]aarch64-pmull2.ll2025-07-15 07:15 3.2K 
[ ]aarch64-reassociate-accumulators-sve.ll2025-07-15 07:15 25K 
[ ]aarch64-reassociate-accumulators.ll2025-07-15 07:15 18K 
[ ]aarch64-saturating-arithmetic.ll2025-07-15 07:15 6.4K 
[ ]aarch64-scalarize-vec-load-ext.ll2025-07-15 07:15 1.3K 
[ ]aarch64-sched-store.ll2025-07-15 07:15 3.7K 
[ ]aarch64-signedreturnaddress.ll2025-07-15 07:15 1.5K 
[ ]aarch64-smax-constantfold.ll2025-07-15 07:15 426  
[ ]aarch64-sme-stubs.ll2025-07-15 07:15 1.1K 
[ ]aarch64-sme2-asm.ll2025-07-15 07:15 6.2K 
[ ]aarch64-smov-gen.ll2025-07-15 07:15 3.2K 
[ ]aarch64-smull.ll2025-07-15 07:15 105K 
[ ]aarch64-split-and-bitmask-immediate.ll2025-07-15 07:15 7.8K 
[ ]aarch64-stp-cluster.ll2025-07-15 07:15 9.7K 
[ ]aarch64-sve-and-combine-crash.ll2025-07-15 07:15 957  
[ ]aarch64-sve-asm-negative.ll2025-07-15 07:15 566  
[ ]aarch64-sve-asm.ll2025-07-15 07:15 10K 
[ ]aarch64-sve-fill-spill-pair.ll2025-07-15 07:15 12K 
[ ]aarch64-sve-ldst-one.ll2025-07-15 07:15 15K 
[ ]aarch64-sve2-faminmax.ll2025-07-15 07:15 30K 
[ ]aarch64-swp-ws-live-intervals-1.mir2025-07-15 07:15 10K 
[ ]aarch64-swp-ws-live-intervals.mir2025-07-15 07:15 4.5K 
[ ]aarch64-sysreg128.ll2025-07-15 07:15 1.5K 
[ ]aarch64-tail-dup-size.ll2025-07-15 07:15 3.0K 
[ ]aarch64-tbz.ll2025-07-15 07:15 2.8K 
[ ]aarch64-tls-flags.ll2025-07-15 07:15 1.2K 
[ ]aarch64-tryBitfieldInsertOpFromOr-crash.ll2025-07-15 07:15 1.3K 
[ ]aarch64-unroll-and-jam.ll2025-07-15 07:15 4.7K 
[ ]aarch64-uzp1-combine.ll2025-07-15 07:15 10K 
[ ]aarch64-v1f32-arg.ll2025-07-15 07:15 310  
[ ]aarch64-vcvtfp2fxs-combine.ll2025-07-15 07:15 834  
[ ]aarch64-vector-pcs.mir2025-07-15 07:15 9.6K 
[ ]aarch64-vectorcombine-invalid-extract-index-crash.ll2025-07-15 07:15 1.1K 
[ ]aarch64-vuzp.ll2025-07-15 07:15 4.2K 
[ ]aarch64-wide-mul.ll2025-07-15 07:15 8.3K 
[ ]aarch64-wide-shuffle.ll2025-07-15 07:15 1.1K 
[ ]aarch64-za-clobber.ll2025-07-15 07:15 732  
[ ]aarch64_be-global-const.ll2025-07-15 07:15 167  
[ ]aarch64_f16_be.ll2025-07-15 07:15 1.7K 
[ ]aarch64_fnmadd.ll2025-07-15 07:15 4.4K 
[ ]aarch64_tree_tests.ll2025-07-15 07:15 1.3K 
[ ]aarch64_win64cc_vararg.ll2025-07-15 07:15 4.4K 
[ ]aarch64st1.mir2025-07-15 07:15 4.6K 
[ ]abd-combine.ll2025-07-15 07:15 20K 
[ ]abds-neg.ll2025-07-15 07:15 15K 
[ ]abds.ll2025-07-15 07:15 17K 
[ ]abdu-neg.ll2025-07-15 07:15 12K 
[ ]abdu.ll2025-07-15 07:15 14K 
[ ]abs.ll2025-07-15 07:15 11K 
[ ]active_lane_mask.ll2025-07-15 07:15 20K 
[ ]adc.ll2025-07-15 07:15 2.6K 
[ ]add-extract.ll2025-07-15 07:15 3.1K 
[ ]add-i256.ll2025-07-15 07:15 2.3K 
[ ]add-negative.ll2025-07-15 07:15 801  
[ ]add.ll2025-07-15 07:15 14K 
[ ]addcarry-crash.ll2025-07-15 07:15 750  
[ ]addg_subg.mir2025-07-15 07:15 1.4K 
[ ]addimm-mulimm.ll2025-07-15 07:15 12K 
[ ]addp-shuffle.ll2025-07-15 07:15 9.0K 
[ ]addr-of-ret-addr.ll2025-07-15 07:15 2.5K 
[ ]addrsig-macho.ll2025-07-15 07:15 5.2K 
[ ]adds_cmn.ll2025-07-15 07:15 2.7K 
[ ]addsub-24bit-imm.mir2025-07-15 07:15 5.6K 
[ ]addsub-constant-folding.ll2025-07-15 07:15 23K 
[ ]addsub-shifted-reg-cheap-as-move.ll2025-07-15 07:15 3.9K 
[ ]addsub-shifted.ll2025-07-15 07:15 8.9K 
[ ]addsub.ll2025-07-15 07:15 25K 
[ ]addsub_ext.ll2025-07-15 07:15 15K 
[ ]aes.ll2025-07-15 07:15 1.3K 
[ ]align-down.ll2025-07-15 07:15 4.3K 
[ ]alloca-load-store-scalable-array.ll2025-07-15 07:15 3.7K 
[ ]alloca-load-store-scalable-struct.ll2025-07-15 07:15 1.1K 
[ ]alloca-oversized.ll2025-07-15 07:15 1.2K 
[ ]alloca.ll2025-07-15 07:15 4.9K 
[ ]allow-check.ll2025-07-15 07:15 969  
[ ]ampere1-sched-add.mir2025-07-15 07:15 1.9K 
[ ]analyze-branch.ll2025-07-15 07:15 4.7K 
[ ]analyzecmp.ll2025-07-15 07:15 798  
[ ]and-mask-removal.ll2025-07-15 07:15 16K 
[ ]and-sink.ll2025-07-15 07:15 3.5K 
[ ]andandshift.ll2025-07-15 07:15 911  
[ ]andcompare.ll2025-07-15 07:15 63K 
[ ]andorbrcompare.ll2025-07-15 07:15 11K 
[ ]andorxor.ll2025-07-15 07:15 45K 
[ ]apple-latest-cpu.ll2025-07-15 07:15 208  
[ ]apply-disjoint-flag-in-dagcombine.ll2025-07-15 07:15 392  
[ ]arg_promotion.ll2025-07-15 07:15 7.0K 
[ ]argument-blocks-array-of-struct.ll2025-07-15 07:15 26K 
[ ]argument-blocks.ll2025-07-15 07:15 6.2K 
[ ]arithmetic_fence.ll2025-07-15 07:15 3.8K 
[ ]arm64-2011-03-09-CPSRSpill.ll2025-07-15 07:15 1.7K 
[ ]arm64-2011-03-17-AsmPrinterCrash.ll2025-07-15 07:15 2.2K 
[ ]arm64-2011-03-21-Unaligned-Frame-Index.ll2025-07-15 07:15 376  
[ ]arm64-2011-04-21-CPSRBug.ll2025-07-15 07:15 788  
[ ]arm64-2011-10-18-LdStOptBug.ll2025-07-15 07:15 894  
[ ]arm64-2012-01-11-ComparisonDAGCrash.ll2025-07-15 07:15 1.0K 
[ ]arm64-2012-05-07-DAGCombineVectorExtract.ll2025-07-15 07:15 428  
[ ]arm64-2012-05-07-MemcpyAlignBug.ll2025-07-15 07:15 768  
[ ]arm64-2012-05-09-LOADgot-bug.ll2025-07-15 07:15 877  
[ ]arm64-2012-05-22-LdStOptBug.ll2025-07-15 07:15 2.0K 
[ ]arm64-2012-06-06-FPToUI.ll2025-07-15 07:15 2.4K 
[ ]arm64-2012-07-11-InstrEmitterBug.ll2025-07-15 07:15 1.8K 
[ ]arm64-2013-01-13-ffast-fcmp.ll2025-07-15 07:15 638  
[ ]arm64-2013-01-23-frem-crash.ll2025-07-15 07:15 426  
[ ]arm64-2013-01-23-sext-crash.ll2025-07-15 07:15 1.0K 
[ ]arm64-2013-02-12-shufv8i8.ll2025-07-15 07:15 335  
[ ]arm64-AdvSIMD-Scalar.ll2025-07-15 07:15 4.4K 
[ ]arm64-AnInfiniteLoopInDAGCombine.ll2025-07-15 07:15 1.0K 
[ ]arm64-EXT-undef-mask.ll2025-07-15 07:15 1.3K 
[ ]arm64-aapcs-be.ll2025-07-15 07:15 1.4K 
[ ]arm64-aapcs.ll2025-07-15 07:15 5.0K 
[ ]arm64-abi-hfa-args.ll2025-07-15 07:15 1.3K 
[ ]arm64-abi-varargs.ll2025-07-15 07:15 8.9K 
[ ]arm64-abi.ll2025-07-15 07:15 8.8K 
[ ]arm64-abi_align.ll2025-07-15 07:15 19K 
[ ]arm64-addp.ll2025-07-15 07:15 5.0K 
[ ]arm64-addr-mode-folding.ll2025-07-15 07:15 6.0K 
[ ]arm64-addr-type-promotion.ll2025-07-15 07:15 3.6K 
[ ]arm64-addrmode.ll2025-07-15 07:15 15K 
[ ]arm64-alloc-no-stack-realign.ll2025-07-15 07:15 836  
[ ]arm64-alloca-frame-pointer-offset.ll2025-07-15 07:15 821  
[ ]arm64-andCmpBrToTBZ.ll2025-07-15 07:15 3.3K 
[ ]arm64-ands-bad-peephole.ll2025-07-15 07:15 1.1K 
[ ]arm64-anyregcc-crash.ll2025-07-15 07:15 1.2K 
[ ]arm64-anyregcc.ll2025-07-15 07:15 23K 
[ ]arm64-arith-saturating.ll2025-07-15 07:15 8.7K 
[ ]arm64-arith.ll2025-07-15 07:15 5.4K 
[ ]arm64-arm64-dead-def-elimination-flag.ll2025-07-15 07:15 409  
[ ]arm64-assert-zext-sext.ll2025-07-15 07:15 2.7K 
[ ]arm64-atomic-128.ll2025-07-15 07:15 32K 
[ ]arm64-atomic.ll2025-07-15 07:15 14K 
[ ]arm64-bcc.ll2025-07-15 07:15 1.7K 
[ ]arm64-big-endian-bitconverts.ll2025-07-15 07:15 34K 
[ ]arm64-big-endian-eh.ll2025-07-15 07:15 2.2K 
[ ]arm64-big-endian-varargs.ll2025-07-15 07:15 1.8K 
[ ]arm64-big-endian-vector-callee.ll2025-07-15 07:15 21K 
[ ]arm64-big-endian-vector-caller.ll2025-07-15 07:15 34K 
[ ]arm64-big-imm-offsets.ll2025-07-15 07:15 365  
[ ]arm64-big-stack.ll2025-07-15 07:15 614  
[ ]arm64-bitfield-extract.ll2025-07-15 07:15 36K 
[ ]arm64-blockaddress.ll2025-07-15 07:15 1.2K 
[ ]arm64-break.ll2025-07-15 07:15 231  
[ ]arm64-build-vector.ll2025-07-15 07:15 8.9K 
[ ]arm64-builtins-linux.ll2025-07-15 07:15 1.0K 
[ ]arm64-call-tailcalls.ll2025-07-15 07:15 2.6K 
[ ]arm64-cast-opt.ll2025-07-15 07:15 1.0K 
[ ]arm64-ccmp-heuristics.ll2025-07-15 07:15 8.4K 
[ ]arm64-ccmp.ll2025-07-15 07:15 37K 
[ ]arm64-clrsb.ll2025-07-15 07:15 1.8K 
[ ]arm64-coalesce-ext.ll2025-07-15 07:15 596  
[ ]arm64-coalescing-MOVi32imm.ll2025-07-15 07:15 361  
[ ]arm64-code-model-large-darwin.ll2025-07-15 07:15 446  
[ ]arm64-codegen-prepare-extload.ll2025-07-15 07:15 42K 
[ ]arm64-collect-loh-garbage-crash.ll2025-07-15 07:15 1.6K 
[ ]arm64-collect-loh-str.ll2025-07-15 07:15 797  
[ ]arm64-collect-loh.ll2025-07-15 07:15 24K 
[ ]arm64-complex-ret.ll2025-07-15 07:15 245  
[ ]arm64-const-addr.ll2025-07-15 07:15 685  
[ ]arm64-constrained-fcmp-no-nans-opt.ll2025-07-15 07:15 4.2K 
[ ]arm64-convert-v4f64.ll2025-07-15 07:15 3.4K 
[ ]arm64-copy-tuple.ll2025-07-15 07:15 8.6K 
[ ]arm64-crc32.ll2025-07-15 07:15 2.1K 
[ ]arm64-crypto.ll2025-07-15 07:15 5.7K 
[ ]arm64-cse.ll2025-07-15 07:15 2.0K 
[ ]arm64-csel.ll2025-07-15 07:15 13K 
[ ]arm64-csldst-mmo.ll2025-07-15 07:15 838  
[ ]arm64-custom-call-saved-reg.ll2025-07-15 07:15 4.6K 
[ ]arm64-cvt.ll2025-07-15 07:15 11K 
[ ]arm64-dagcombiner-convergence.ll2025-07-15 07:15 654  
[ ]arm64-dagcombiner-dead-indexed-load.ll2025-07-15 07:15 928  
[ ]arm64-dagcombiner-load-slicing.ll2025-07-15 07:15 4.3K 
[ ]arm64-darwin-cc.ll2025-07-15 07:15 475  
[ ]arm64-dead-def-frame-index.ll2025-07-15 07:15 438  
[ ]arm64-dead-register-def-bug.ll2025-07-15 07:15 887  
[ ]arm64-detect-vec-redux.ll2025-07-15 07:15 3.2K 
[ ]arm64-dup.ll2025-07-15 07:15 25K 
[ ]arm64-early-ifcvt.ll2025-07-15 07:15 9.8K 
[ ]arm64-elf-calls.ll2025-07-15 07:15 526  
[ ]arm64-elf-constpool.ll2025-07-15 07:15 406  
[ ]arm64-ext.ll2025-07-15 07:15 5.3K 
[ ]arm64-extend-int-to-fp.ll2025-07-15 07:15 522  
[ ]arm64-extend.ll2025-07-15 07:15 505  
[ ]arm64-extload-knownzero.ll2025-07-15 07:15 603  
[ ]arm64-extract-insert-varidx.ll2025-07-15 07:15 13K 
[ ]arm64-extract.ll2025-07-15 07:15 1.5K 
[ ]arm64-extract_subvector.ll2025-07-15 07:15 3.5K 
[ ]arm64-fast-isel-addr-offset.ll2025-07-15 07:15 1.6K 
[ ]arm64-fast-isel-alloca.ll2025-07-15 07:15 698  
[ ]arm64-fast-isel-br.ll2025-07-15 07:15 3.7K 
[ ]arm64-fast-isel-call.ll2025-07-15 07:15 8.1K 
[ ]arm64-fast-isel-conversion-fallback.ll2025-07-15 07:15 11K 
[ ]arm64-fast-isel-conversion.ll2025-07-15 07:15 10K 
[ ]arm64-fast-isel-crc32.ll2025-07-15 07:15 2.1K 
[ ]arm64-fast-isel-fcmp.ll2025-07-15 07:15 3.8K 
[ ]arm64-fast-isel-gv.ll2025-07-15 07:15 1.4K 
[ ]arm64-fast-isel-icmp.ll2025-07-15 07:15 6.9K 
[ ]arm64-fast-isel-indirectbr.ll2025-07-15 07:15 1.2K 
[ ]arm64-fast-isel-intrinsic.ll2025-07-15 07:15 4.9K 
[ ]arm64-fast-isel-materialize.ll2025-07-15 07:15 1.4K 
[ ]arm64-fast-isel-noconvert.ll2025-07-15 07:15 1.5K 
[ ]arm64-fast-isel-rem.ll2025-07-15 07:15 1.1K 
[ ]arm64-fast-isel-ret.ll2025-07-15 07:15 1.4K 
[ ]arm64-fast-isel-store.ll2025-07-15 07:15 701  
[ ]arm64-fast-isel-tag.ll2025-07-15 07:15 814  
[ ]arm64-fast-isel.ll2025-07-15 07:15 3.3K 
[ ]arm64-fastcc-tailcall.ll2025-07-15 07:15 592  
[ ]arm64-fastisel-gep-promote-before-add.ll2025-07-15 07:15 553  
[ ]arm64-fcmp-opt.ll2025-07-15 07:15 5.4K 
[ ]arm64-fcopysign.ll2025-07-15 07:15 2.5K 
[ ]arm64-fixed-point-scalar-cvt-dagcombine.ll2025-07-15 07:15 2.5K 
[ ]arm64-fma-combine-with-fpfusion.ll2025-07-15 07:15 766  
[ ]arm64-fma-combines.ll2025-07-15 07:15 10K 
[ ]arm64-fmadd.ll2025-07-15 07:15 8.2K 
[ ]arm64-fmax-safe.ll2025-07-15 07:15 2.1K 
[ ]arm64-fmax.ll2025-07-15 07:15 2.7K 
[ ]arm64-fminv.ll2025-07-15 07:15 4.0K 
[ ]arm64-fml-combines.ll2025-07-15 07:15 7.4K 
[ ]arm64-fmuladd.ll2025-07-15 07:15 3.1K 
[ ]arm64-fold-address.ll2025-07-15 07:15 3.1K 
[ ]arm64-fold-lshr.ll2025-07-15 07:15 3.9K 
[ ]arm64-fold-lsl.ll2025-07-15 07:15 12K 
[ ]arm64-fp-contract-zero.ll2025-07-15 07:15 613  
[ ]arm64-fp-imm-size.ll2025-07-15 07:15 2.0K 
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[ ]arm64-fp.ll2025-07-15 07:15 2.4K 
[ ]arm64-fp128-folding.ll2025-07-15 07:15 536  
[ ]arm64-fp128.ll2025-07-15 07:15 57K 
[ ]arm64-fpcr.ll2025-07-15 07:15 486  
[ ]arm64-fpenv.ll2025-07-15 07:15 1.3K 
[ ]arm64-frame-index.ll2025-07-15 07:15 287  
[ ]arm64-global-address.ll2025-07-15 07:15 372  
[ ]arm64-hello.ll2025-07-15 07:15 1.0K 
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[ ]arm64-homogeneous-prolog-epilog-bad-outline.mir2025-07-15 07:15 1.5K 
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[ ]arm64-homogeneous-prolog-epilog-no-helper.ll2025-07-15 07:15 4.4K 
[ ]arm64-homogeneous-prolog-epilog-odd-csrs.ll2025-07-15 07:15 1.3K 
[ ]arm64-homogeneous-prolog-epilog.ll2025-07-15 07:15 2.7K 
[ ]arm64-i16-subreg-extract.ll2025-07-15 07:15 364  
[ ]arm64-icmp-opt.ll2025-07-15 07:15 440  
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[ ]arm64-indexed-vector-ldst.ll2025-07-15 07:15 591K 
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[ ]arm64-inline-asm-error-K.ll2025-07-15 07:15 368  
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[ ]arm64-inline-asm-error-M.ll2025-07-15 07:15 362  
[ ]arm64-inline-asm-error-N.ll2025-07-15 07:15 372  
[ ]arm64-inline-asm-zero-reg-error.ll2025-07-15 07:15 333  
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[ ]arm64-instruction-mix-remarks.ll2025-07-15 07:15 2.5K 
[ ]arm64-isel-or.ll2025-07-15 07:15 1.3K 
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[ ]arm64-jumptable.ll2025-07-15 07:15 948  
[ ]arm64-large-frame.ll2025-07-15 07:15 2.1K 
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[ ]arm64-memset-inline.ll2025-07-15 07:15 18K 
[ ]arm64-memset-to-bzero-pgso.ll2025-07-15 07:15 3.9K 
[ ]arm64-memset-to-bzero.ll2025-07-15 07:15 2.7K 
[ ]arm64-misaligned-memcpy-inline.ll2025-07-15 07:15 1.8K 
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[ ]arm64-misched-memdep-bug.ll2025-07-15 07:15 1.0K 
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[ ]arm64-named-reg-notareg.ll2025-07-15 07:15 410  
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[ ]arm64-neon-2velem-high.ll2025-07-15 07:15 28K 
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[ ]arm64-neon-3vdiff.ll2025-07-15 07:15 100K 
[ ]arm64-neon-aba-abd.ll2025-07-15 07:15 17K 
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[ ]arm64-neon-add-pairwise.ll2025-07-15 07:15 7.2K 
[ ]arm64-neon-add-sub.ll2025-07-15 07:15 9.4K 
[ ]arm64-neon-copy.ll2025-07-15 07:15 79K 
[ ]arm64-neon-copyPhysReg-tuple.ll2025-07-15 07:15 4.1K 
[ ]arm64-neon-mul-div-cte.ll2025-07-15 07:15 7.1K 
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[ ]arm64-neon-scalar-by-elem-mul.ll2025-07-15 07:15 7.1K 
[ ]arm64-neon-select_cc.ll2025-07-15 07:15 10K 
[ ]arm64-neon-simd-ldst-one.ll2025-07-15 07:15 21K 
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[ ]arm64-neon-v1i1-setcc.ll2025-07-15 07:15 8.7K 
[ ]arm64-neon-v8.1a.ll2025-07-15 07:15 36K 
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[ ]arm64-non-pow2-ldst.ll2025-07-15 07:15 4.9K 
[ ]arm64-nvcast.ll2025-07-15 07:15 2.7K 
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[ ]arm64-platform-reg.ll2025-07-15 07:15 9.3K 
[ ]arm64-popcnt.ll2025-07-15 07:15 16K 
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[ ]arm64-reg-copy-noneon.ll2025-07-15 07:15 727  
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[ ]arm64-regress-interphase-shift.ll2025-07-15 07:15 1.0K 
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[ ]arm64-return-vector.ll2025-07-15 07:15 260  
[ ]arm64-returnaddr.ll2025-07-15 07:15 674  
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[ ]arm64-sli-sri-opt.ll2025-07-15 07:15 25K 
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[ ]arm64-st1.ll2025-07-15 07:15 48K 
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[ ]arm64-stur.ll2025-07-15 07:15 2.6K 
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[ ]arm64-subvector-extend.ll2025-07-15 07:15 32K 
[ ]arm64-summary-remarks.ll2025-07-15 07:15 551  
[ ]arm64-swizzle-tbl-i16-layout.ll2025-07-15 07:15 1.6K 
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[ ]arm64-tls-dynamic-together.ll2025-07-15 07:15 1.7K 
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[ ]arm64-triv-disjoint-mem-access.ll2025-07-15 07:15 1.2K 
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[ ]arm64-uzp2-combine.ll2025-07-15 07:15 2.0K 
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[ ]arm64-vabs.ll2025-07-15 07:15 64K 
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[ ]arm64-vcmp.ll2025-07-15 07:15 7.4K 
[ ]arm64-vcnt.ll2025-07-15 07:15 1.7K 
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[ ]arm64-vcvt.ll2025-07-15 07:15 27K 
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[ ]arm64-vcvtxd_f32_f64.ll2025-07-15 07:15 317  
[ ]arm64-vecCmpBr.ll2025-07-15 07:15 6.7K 
[ ]arm64-vecFold.ll2025-07-15 07:15 6.8K 
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[ ]arm64-vector-imm.ll2025-07-15 07:15 5.1K 
[ ]arm64-vector-insertion.ll2025-07-15 07:15 16K 
[ ]arm64-vector-ldst.ll2025-07-15 07:15 24K 
[ ]arm64-vext.ll2025-07-15 07:15 18K 
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[ ]arm64-vhsub.ll2025-07-15 07:15 4.3K 
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[ ]arm64-vmax.ll2025-07-15 07:15 32K 
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[ ]arm64-vmul.ll2025-07-15 07:15 121K 
[ ]arm64-volatile.ll2025-07-15 07:15 849  
[ ]arm64-vqadd.ll2025-07-15 07:15 17K 
[ ]arm64-vqsub.ll2025-07-15 07:15 7.8K 
[ ]arm64-vselect.ll2025-07-15 07:15 642  
[ ]arm64-vsetcc_fp.ll2025-07-15 07:15 544  
[ ]arm64-vshift.ll2025-07-15 07:15 152K 
[ ]arm64-vshr.ll2025-07-15 07:15 2.2K 
[ ]arm64-vshuffle.ll2025-07-15 07:15 2.9K 
[ ]arm64-vsqrt.ll2025-07-15 07:15 7.7K 
[ ]arm64-vsra.ll2025-07-15 07:15 4.4K 
[ ]arm64-vsub.ll2025-07-15 07:15 15K 
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[ ]arm64-windows-calls.ll2025-07-15 07:15 8.0K 
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[ ]arm64-zero-cycle-regmov-gpr.ll2025-07-15 07:15 1.8K 
[ ]arm64-zero-cycle-zeroing.ll2025-07-15 07:15 5.8K 
[ ]arm64-zeroreg.ll2025-07-15 07:15 2.9K 
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[ ]arm64-zextload-unscaled.ll2025-07-15 07:15 1.0K 
[ ]arm64-zip.ll2025-07-15 07:15 19K 
[ ]arm64_32-addrs.ll2025-07-15 07:15 1.5K 
[ ]arm64_32-atomics.ll2025-07-15 07:15 6.3K 
[ ]arm64_32-fastisel.ll2025-07-15 07:15 1.3K 
[ ]arm64_32-frame-pointers.ll2025-07-15 07:15 869  
[ ]arm64_32-gep-sink.ll2025-07-15 07:15 3.0K 
[ ]arm64_32-memcpy.ll2025-07-15 07:15 1.6K 
[ ]arm64_32-neon.ll2025-07-15 07:15 8.5K 
[ ]arm64_32-null.ll2025-07-15 07:15 703  
[ ]arm64_32-pointer-extend.ll2025-07-15 07:15 1.1K 
[ ]arm64_32-stack-pointers.ll2025-07-15 07:15 397  
[ ]arm64_32-tls.ll2025-07-15 07:15 549  
[ ]arm64_32-va.ll2025-07-15 07:15 1.4K 
[ ]arm64_32.ll2025-07-15 07:15 23K 
[ ]arm64ec-alias.ll2025-07-15 07:15 1.4K 
[ ]arm64ec-builtins.ll2025-07-15 07:15 1.9K 
[ ]arm64ec-dllimport.ll2025-07-15 07:15 1.1K 
[ ]arm64ec-eh.ll2025-07-15 07:15 2.2K 
[ ]arm64ec-entry-thunks-local-linkage.ll2025-07-15 07:15 777  
[ ]arm64ec-entry-thunks.ll2025-07-15 07:15 31K 
[ ]arm64ec-exit-thunks.ll2025-07-15 07:15 29K 
[ ]arm64ec-hybrid-patchable.ll2025-07-15 07:15 15K 
[ ]arm64ec-reservedregs.ll2025-07-15 07:15 4.6K 
[ ]arm64ec-symbols.ll2025-07-15 07:15 1.0K 
[ ]arm64ec-varargs.ll2025-07-15 07:15 6.3K 
[ ]asm-large-immediate.ll2025-07-15 07:15 412  
[ ]asm-ld1-wrong-constraint.ll2025-07-15 07:15 886  
[ ]asm-print-comments.ll2025-07-15 07:15 319  
[ ]asm-srcloc.ll2025-07-15 07:15 534  
[ ]assertion-rc-mismatch.ll2025-07-15 07:15 683  
[ ]atomic-ops-ldapr.ll2025-07-15 07:15 3.1K 
[ ]atomic-ops-lse.ll2025-07-15 07:15 366K 
[ ]atomic-ops-msvc.ll2025-07-15 07:15 34K 
[ ]atomic-ops-not-barriers.ll2025-07-15 07:15 1.0K 
[ ]atomic-ops.ll2025-07-15 07:15 49K 
[ ]atomic-oversize.ll2025-07-15 07:15 338  
[ ]atomicrmw-O0.ll2025-07-15 07:15 25K 
[ ]atomicrmw-cond-sub-clamp.ll2025-07-15 07:15 4.6K 
[ ]atomicrmw-fadd.ll2025-07-15 07:15 42K 
[ ]atomicrmw-fmax.ll2025-07-15 07:15 38K 
[ ]atomicrmw-fmin.ll2025-07-15 07:15 38K 
[ ]atomicrmw-fsub.ll2025-07-15 07:15 42K 
[ ]atomicrmw-uinc-udec-wrap.ll2025-07-15 07:15 4.8K 
[ ]atomicrmw-xchg-fp.ll2025-07-15 07:15 3.9K 
[ ]autoupgrade-aarch64-neon-addp-float.ll2025-07-15 07:15 383  
[ ]avg.ll2025-07-15 07:15 12K 
[ ]avoid-free-ext-promotion.ll2025-07-15 07:15 5.1K 
[ ]avoid-pre-trunc.ll2025-07-15 07:15 5.8K 
[ ]avoid-zero-copy.mir2025-07-15 07:15 1.7K 
[ ]basic-block-sections-cold.ll2025-07-15 07:15 1.9K 
[ ]basic-block-sections-unsafe.ll2025-07-15 07:15 4.0K 
[ ]basic-pic.ll2025-07-15 07:15 609  
[ ]bcax.ll2025-07-15 07:15 3.7K 
[ ]bcmp-inline-small.ll2025-07-15 07:15 3.2K 
[ ]bcmp.ll2025-07-15 07:15 15K 
[ ]bf16-convert-intrinsics.ll2025-07-15 07:15 1.2K 
[ ]bf16-imm.ll2025-07-15 07:15 3.2K 
[ ]bf16-instructions.ll2025-07-15 07:15 83K 
[ ]bf16-select.ll2025-07-15 07:15 2.5K 
[ ]bf16-shuffle.ll2025-07-15 07:15 14K 
[ ]bf16-v4-instructions.ll2025-07-15 07:15 22K 
[ ]bf16-v8-instructions.ll2025-07-15 07:15 39K 
[ ]bf16-vector-bitcast.ll2025-07-15 07:15 6.4K 
[ ]bf16-vector-shuffle.ll2025-07-15 07:15 12K 
[ ]bf16.ll2025-07-15 07:15 7.3K 
[ ]bf16_fast_math.ll2025-07-15 07:15 24K 
[ ]bfis-in-loop.ll2025-07-15 07:15 5.1K 
[ ]bics.ll2025-07-15 07:15 856  
[ ]big-callframe.ll2025-07-15 07:15 613  
[ ]bisect-post-ra-machine-sink.mir2025-07-15 07:15 1.4K 
[ ]bitcast-extend.ll2025-07-15 07:15 9.9K 
[ ]bitcast-promote-widen.ll2025-07-15 07:15 722  
[ ]bitcast-v2i8.ll2025-07-15 07:15 734  
[ ]bitcast.ll2025-07-15 07:15 19K 
[ ]bitfield-extract.ll2025-07-15 07:15 2.6K 
[ ]bitfield-insert-0.ll2025-07-15 07:15 650  
[ ]bitfield-insert.ll2025-07-15 07:15 22K 
[ ]bitfield.ll2025-07-15 07:15 6.8K 
[ ]bitreverse.ll2025-07-15 07:15 8.4K 
[ ]block-placement-optimize-branches.ll2025-07-15 07:15 2.1K 
[ ]blockaddress.ll2025-07-15 07:15 1.5K 
[ ]blr-bti-preserves-operands.mir2025-07-15 07:15 1.1K 
[ ]bool-ext-inc.ll2025-07-15 07:15 3.5K 
[ ]bool-loads.ll2025-07-15 07:15 1.4K 
[ ]br-cond-not-merge.ll2025-07-15 07:15 2.5K 
[ ]br-to-eh-lpad.ll2025-07-15 07:15 3.5K 
[ ]br-undef-cond.ll2025-07-15 07:15 601  
[ ]branch-folder-merge-mmos.ll2025-07-15 07:15 1.2K 
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[ ]branch-relax-alignment.ll2025-07-15 07:15 878  
[ ]branch-relax-asm.ll2025-07-15 07:15 1.1K 
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[ ]branch-relax-cross-section.mir2025-07-15 07:15 32K 
[ ]branch-relax-xray.ll2025-07-15 07:15 4.0K 
[ ]branch-target-enforcement-indirect-calls.ll2025-07-15 07:15 2.9K 
[ ]breg.ll2025-07-15 07:15 479  
[ ]bsl.ll2025-07-15 07:15 16K 
[ ]bswap-known-bits.ll2025-07-15 07:15 2.8K 
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[ ]bti-linkage.ll2025-07-15 07:15 1.9K 
[ ]build-attributes-all.ll2025-07-15 07:15 852  
[ ]build-attributes-bti.ll2025-07-15 07:15 750  
[ ]build-attributes-gcs.ll2025-07-15 07:15 745  
[ ]build-attributes-pac.ll2025-07-15 07:15 743  
[ ]build-attributes-pauthabi.ll2025-07-15 07:15 689  
[ ]build-one-lane.ll2025-07-15 07:15 11K 
[ ]build-pair-isel.ll2025-07-15 07:15 846  
[ ]build-vector-dup-simd.ll2025-07-15 07:15 12K 
[ ]build-vector-extract.ll2025-07-15 07:15 20K 
[ ]build-vector-to-extract-subvec-crash.ll2025-07-15 07:15 1.8K 
[ ]build-vector-two-dup.ll2025-07-15 07:15 11K 
[ ]byval-type.ll2025-07-15 07:15 1.0K 
[ ]call-rv-marker.ll2025-07-15 07:15 22K 
[ ]callbr-asm-label-bti.ll2025-07-15 07:15 1.2K 
[ ]callbr-asm-label.ll2025-07-15 07:15 1.3K 
[ ]callbr-asm-obj-file.ll2025-07-15 07:15 2.9K 
[ ]callbr-asm-outputs-indirect-isel.ll2025-07-15 07:15 20K 
[ ]callbr-prepare.ll2025-07-15 07:15 13K 
[ ]callee-save.ll2025-07-15 07:15 3.0K 
[ ]ccmp-successor-probs.mir2025-07-15 07:15 1.2K 
[ ]cfguard-arm64ec.ll2025-07-15 07:15 359  
[ ]cfguard-checks.ll2025-07-15 07:15 4.4K 
[ ]cfguard-module-flag.ll2025-07-15 07:15 696  
[ ]cfi-fixup-multi-block-prologue.mir2025-07-15 07:15 13K 
[ ]cfi-fixup-multi-section.mir2025-07-15 07:15 14K 
[ ]cfi-fixup.ll2025-07-15 07:15 4.2K 
[ ]cfi-fixup.mir2025-07-15 07:15 19K 
[ ]cfi-sync-async.ll2025-07-15 07:15 7.5K 
[ ]cfi_restore.mir2025-07-15 07:15 1.3K 
[ ]cfinv-def-nzcv.mir2025-07-15 07:15 365  
[ ]cfinv-use-nzcv.mir2025-07-15 07:15 365  
[ ]cgdata-global-hash.ll2025-07-15 07:15 1.5K 
[ ]cgdata-merge-crash.ll2025-07-15 07:15 306  
[ ]cgdata-merge-gvar-nsconst.ll2025-07-15 07:15 1.4K 
[ ]cgdata-merge-gvar-objc.ll2025-07-15 07:15 1.9K 
[ ]cgdata-merge-gvar-string.ll2025-07-15 07:15 1.4K 
[ ]cgdata-merge-local.ll2025-07-15 07:15 2.8K 
[ ]cgdata-merge-no-params.ll2025-07-15 07:15 1.5K 
[ ]cgdata-no-merge-attached-call-garget.ll2025-07-15 07:15 1.3K 
[ ]cgdata-outline-gvar.ll2025-07-15 07:15 2.5K 
[ ]cgdata-outlined-name.ll2025-07-15 07:15 2.0K 
[ ]cgdata-read-double-outline.ll2025-07-15 07:15 2.0K 
[ ]cgdata-read-lto-outline.ll2025-07-15 07:15 3.6K 
[ ]cgdata-read-priority.ll2025-07-15 07:15 2.4K 
[ ]cgdata-read-single-outline-suffix.ll2025-07-15 07:15 4.6K 
[ ]cgdata-read-single-outline.ll2025-07-15 07:15 1.4K 
[ ]cgdata-write-outline.ll2025-07-15 07:15 1.8K 
[ ]cgp-trivial-phi-node.ll2025-07-15 07:15 875  
[ ]cgp-usubo.ll2025-07-15 07:15 5.2K 
[ ]cheap-as-a-move.ll2025-07-15 07:15 3.5K 
[ ]check-sign-bit-before-extension.ll2025-07-15 07:15 4.5K 
[ ]chkstk.ll2025-07-15 07:15 1.5K 
[ ]clear-dead-implicit-def-impdef.ll2025-07-15 07:15 5.6K 
[ ]clear-dead-implicit-def-impdef.mir2025-07-15 07:15 6.6K 
[ ]cls.ll2025-07-15 07:15 522  
[ ]cluster-frame-index.mir2025-07-15 07:15 1.4K 
[ ]cmp-bool.ll2025-07-15 07:15 1.0K 
[ ]cmp-chains.ll2025-07-15 07:15 14K 
[ ]cmp-const-max.ll2025-07-15 07:15 808  
[ ]cmp-frameindex.ll2025-07-15 07:15 814  
[ ]cmp-select-sign.ll2025-07-15 07:15 13K 
[ ]cmp-to-cmn.ll2025-07-15 07:15 16K 
[ ]cmpbr-branch-relaxation.mir2025-07-15 07:15 5.7K 
[ ]cmpbr-early-ifcvt.mir2025-07-15 07:15 3.3K 
[ ]cmpbr-reg-imm-at-bounds.ll2025-07-15 07:15 35K 
[ ]cmpbr-reg-imm.ll2025-07-15 07:15 15K 
[ ]cmpbr-reg-reg.ll2025-07-15 07:15 15K 
[ ]cmpwithshort.ll2025-07-15 07:15 903  
[ ]cmpxchg-O0.ll2025-07-15 07:15 4.8K 
[ ]cmpxchg-idioms.ll2025-07-15 07:15 12K 
[ ]cmpxchg-lse-even-regs.ll2025-07-15 07:15 954  
[ ]coalescer-drop-subreg-to-reg-imm-ops.mir2025-07-15 07:15 6.0K 
[ ]code-model-large.ll2025-07-15 07:15 4.2K 
[ ]code-model-tiny-abs.ll2025-07-15 07:15 1.2K 
[ ]combine-and-like.ll2025-07-15 07:15 360  
[ ]combine-andintoload.ll2025-07-15 07:15 12K 
[ ]combine-comparisons-by-cse.ll2025-07-15 07:15 29K 
[ ]combine-mul.ll2025-07-15 07:15 3.8K 
[ ]combine-sdiv.ll2025-07-15 07:15 65K 
[ ]combine_andor_with_cmps.ll2025-07-15 07:15 2.1K 
[ ]commandline-metadata.ll2025-07-15 07:15 814  
[ ]compare-branch.ll2025-07-15 07:15 924  
[ ]compiler-ident.ll2025-07-15 07:15 277  
[ ]complex-copy-noneon.ll2025-07-15 07:15 882  
[ ]complex-deinterleaving-add-mull-fixed-contract.ll2025-07-15 07:15 13K 
[ ]complex-deinterleaving-add-mull-fixed-fast.ll2025-07-15 07:15 11K 
[ ]complex-deinterleaving-add-mull-scalable-contract.ll2025-07-15 07:15 16K 
[ ]complex-deinterleaving-add-mull-scalable-fast.ll2025-07-15 07:15 14K 
[ ]complex-deinterleaving-cdot.ll2025-07-15 07:15 100K 
[ ]complex-deinterleaving-crash.ll2025-07-15 07:15 5.1K 
[ ]complex-deinterleaving-f16-add-scalable.ll2025-07-15 07:15 6.7K 
[ ]complex-deinterleaving-f16-add.ll2025-07-15 07:15 12K 
[ ]complex-deinterleaving-f16-mul-scalable.ll2025-07-15 07:15 8.2K 
[ ]complex-deinterleaving-f16-mul.ll2025-07-15 07:15 7.4K 
[ ]complex-deinterleaving-f32-add-scalable.ll2025-07-15 07:15 4.8K 
[ ]complex-deinterleaving-f32-add.ll2025-07-15 07:15 4.0K 
[ ]complex-deinterleaving-f32-mul-scalable.ll2025-07-15 07:15 6.1K 
[ ]complex-deinterleaving-f32-mul.ll2025-07-15 07:15 5.6K 
[ ]complex-deinterleaving-f64-add-scalable.ll2025-07-15 07:15 4.9K 
[ ]complex-deinterleaving-f64-add.ll2025-07-15 07:15 3.0K 
[ ]complex-deinterleaving-f64-mul-scalable.ll2025-07-15 07:15 6.2K 
[ ]complex-deinterleaving-f64-mul.ll2025-07-15 07:15 4.3K 
[ ]complex-deinterleaving-i8-add-scalable.ll2025-07-15 07:15 4.7K 
[ ]complex-deinterleaving-i16-add-scalable.ll2025-07-15 07:15 6.4K 
[ ]complex-deinterleaving-i16-mul-scalable.ll2025-07-15 07:15 7.8K 
[ ]complex-deinterleaving-i32-add-scalable.ll2025-07-15 07:15 4.5K 
[ ]complex-deinterleaving-i32-mul-scalable.ll2025-07-15 07:15 5.6K 
[ ]complex-deinterleaving-i64-add-scalable.ll2025-07-15 07:15 4.5K 
[ ]complex-deinterleaving-i64-mul-scalable.ll2025-07-15 07:15 7.6K 
[ ]complex-deinterleaving-mixed-cases.ll2025-07-15 07:15 23K 
[ ]complex-deinterleaving-multiuses.ll2025-07-15 07:15 20K 
[ ]complex-deinterleaving-opt-crash.ll2025-07-15 07:15 6.0K 
[ ]complex-deinterleaving-reductions-predicated-scalable.ll2025-07-15 07:15 18K 
[ ]complex-deinterleaving-reductions-scalable.ll2025-07-15 07:15 18K 
[ ]complex-deinterleaving-reductions.ll2025-07-15 07:15 13K 
[ ]complex-deinterleaving-splat-scalable.ll2025-07-15 07:15 6.1K 
[ ]complex-deinterleaving-splat.ll2025-07-15 07:15 4.8K 
[ ]complex-deinterleaving-uniform-cases.ll2025-07-15 07:15 14K 
[ ]complex-deinterleaving-unrolled-cdot.ll2025-07-15 07:15 19K 
[ ]complex-fp-to-int.ll2025-07-15 07:15 3.8K 
[ ]complex-int-to-fp.ll2025-07-15 07:15 6.4K 
[ ]compute-call-frame-size-unreachable-pass.ll2025-07-15 07:15 921  
[ ]concat-vector-add-combine.ll2025-07-15 07:15 6.7K 
[ ]concat-vector.ll2025-07-15 07:15 21K 
[ ]concat_vector-scalar-combine.ll2025-07-15 07:15 4.4K 
[ ]concat_vector-truncate-combine.ll2025-07-15 07:15 4.3K 
[ ]concat_vector-truncated-scalar-combine.ll2025-07-15 07:15 608  
[ ]concatbinop.ll2025-07-15 07:15 8.3K 
[ ]cond-br-tuning-instr-ref.mir2025-07-15 07:15 3.6K 
[ ]cond-br-tuning.ll2025-07-15 07:15 5.3K 
[ ]cond-sel-value-prop.ll2025-07-15 07:15 3.6K 
[ ]cond-sel.ll2025-07-15 07:15 8.2K 
[ ]consecutive-stores-of-faddv.ll2025-07-15 07:15 4.7K 
[ ]const-isel.ll2025-07-15 07:15 577  
[ ]const-shift-of-constmasked.ll2025-07-15 07:15 29K 
[ ]constant-pool-partition.ll2025-07-15 07:15 7.5K 
[ ]consthoist-gep.ll2025-07-15 07:15 8.3K 
[ ]convert-highly-predictable-select-to-branch.ll2025-07-15 07:15 3.1K 
[ ]convertphitype.ll2025-07-15 07:15 34K 
[ ]copyprop.ll2025-07-15 07:15 1.1K 
[ ]copyprop.mir2025-07-15 07:15 3.0K 
[ ]cpa-globalisel.ll2025-07-15 07:15 29K 
[ ]cpa-selectiondag.ll2025-07-15 07:15 29K 
[ ]cpus.ll2025-07-15 07:15 3.7K 
[ ]csel-andor-onebit.ll2025-07-15 07:15 3.9K 
[ ]csel-cmp-cse.ll2025-07-15 07:15 32K 
[ ]csel-subs-swapped.ll2025-07-15 07:15 8.0K 
[ ]csel-zero-float.ll2025-07-15 07:15 557  
[ ]csinc-cmp-removal.mir2025-07-15 07:15 10K 
[ ]csr-copy-hint.mir2025-07-15 07:15 681  
[ ]csr-split.ll2025-07-15 07:15 8.9K 
[ ]ctlo.ll2025-07-15 07:15 3.6K 
[ ]ctlz.ll2025-07-15 07:15 19K 
[ ]ctlz_zero_undef.ll2025-07-15 07:15 1.3K 
[ ]ctpop-nonean.ll2025-07-15 07:15 1.6K 
[ ]ctpop.ll2025-07-15 07:15 15K 
[ ]cttz.ll2025-07-15 07:15 27K 
[ ]custom-sections.ll2025-07-15 07:15 884  
[ ]cvt-fp-int-fp.ll2025-07-15 07:15 8.7K 
[ ]cxx-tlscc.ll2025-07-15 07:15 6.7K 
[ ]dag-ReplaceAllUsesOfValuesWith.ll2025-07-15 07:15 2.4K 
[ ]dag-combine-concat-vectors.ll2025-07-15 07:15 3.2K 
[ ]dag-combine-freeze.ll2025-07-15 07:15 1.3K 
[ ]dag-combine-insert-subvector.ll2025-07-15 07:15 1.3K 
[ ]dag-combine-invaraints.ll2025-07-15 07:15 1.4K 
[ ]dag-combine-lifetime-end-store-typesize.ll2025-07-15 07:15 683  
[ ]dag-combine-mul-shl.ll2025-07-15 07:15 3.9K 
[ ]dag-combine-select.ll2025-07-15 07:15 2.6K 
[ ]dag-combine-setcc.ll2025-07-15 07:15 12K 
[ ]dag-combine-trunc-build-vec.ll2025-07-15 07:15 2.3K 
[ ]dag-numsignbits.ll2025-07-15 07:15 1.4K 
[ ]darwinpcs-tail.ll2025-07-15 07:15 1.6K 
[ ]dbg-assign-tag-offset-mix-loc.ll2025-07-15 07:15 3.4K 
[ ]dbg-assign-tag-offset.ll2025-07-15 07:15 3.6K 
[ ]dbg-declare-swift-async.ll2025-07-15 07:15 2.2K 
[ ]dbg-declare-tag-offset.ll2025-07-15 07:15 1.8K 
[ ]dbg-value-swift-async-non-entry-block.ll2025-07-15 07:15 2.0K 
[ ]dbg-value-swift-async.ll2025-07-15 07:15 2.0K 
[ ]dbg-value-tag-offset.ll2025-07-15 07:15 3.1K 
[ ]debug-info-sve-dbg-declare.mir2025-07-15 07:15 14K 
[ ]debug-info-sve-dbg-value.mir2025-07-15 07:15 6.0K 
[ ]debugtrap.ll2025-07-15 07:15 923  
[ ]directcond.ll2025-07-15 07:15 2.0K 
[ ]div-rem-pair-recomposition-signed.ll2025-07-15 07:15 9.3K 
[ ]div-rem-pair-recomposition-unsigned.ll2025-07-15 07:15 9.4K 
[ ]div_minsize.ll2025-07-15 07:15 1.0K 
[ ]divrem.ll2025-07-15 07:15 747  
[ ]dllexport.ll2025-07-15 07:15 3.9K 
[ ]dllimport.ll2025-07-15 07:15 2.8K 
[ ]dont-shrink-wrap-stack-mayloadorstore.mir2025-07-15 07:15 6.2K 
[ ]dont-take-over-the-world.ll2025-07-15 07:15 355  
[ ]double_reduct.ll2025-07-15 07:15 48K 
[ ]dp-3source.ll2025-07-15 07:15 4.8K 
[ ]dp1.ll2025-07-15 07:15 7.6K 
[ ]dp2.ll2025-07-15 07:15 4.8K 
[ ]dump-reserved-cycles.mir2025-07-15 07:15 2.6K 
[ ]dump-schedule-trace.mir2025-07-15 07:15 5.2K 
[ ]dup.ll2025-07-15 07:15 81K 
[ ]duplane-index-patfrags.ll2025-07-15 07:15 4.6K 
[ ]dwarf-cfi.ll2025-07-15 07:15 905  
[ ]dwarf-eh-prepare-dbg.ll2025-07-15 07:15 145K 
[ ]dynamic-regmask-preserve-none.ll2025-07-15 07:15 2.9K 
[ ]early-ifcvt-likely-predictable.mir2025-07-15 07:15 9.2K 
[ ]early-ifcvt-on-double-killed-reg.mir2025-07-15 07:15 1.7K 
[ ]early-ifcvt-regclass-mismatch.mir2025-07-15 07:15 5.6K 
[ ]early-ifcvt-same-value.mir2025-07-15 07:15 7.6K 
[ ]eh_recoverfp.ll2025-07-15 07:15 279  
[ ]ehcontguard.ll2025-07-15 07:15 1.1K 
[ ]elf-globals-pic.ll2025-07-15 07:15 2.0K 
[ ]elf-globals-static.ll2025-07-15 07:15 2.8K 
[ ]elf-preemption.ll2025-07-15 07:15 4.1K 
[ ]elim-dead-mi.mir2025-07-15 07:15 2.2K 
[ ]eliminate-trunc.ll2025-07-15 07:15 1.5K 
[ ]emit-prologue-clobber-verification.mir2025-07-15 07:15 959  
[ ]emit_fneg_with_non_register_operand.mir2025-07-15 07:15 4.6K 
[ ]emutls.ll2025-07-15 07:15 5.8K 
[ ]emutls_alias.ll2025-07-15 07:15 575  
[ ]emutls_generic.ll2025-07-15 07:15 3.9K 
[ ]eon.ll2025-07-15 07:15 1.2K 
[ ]eor3.ll2025-07-15 07:15 8.6K 
[ ]exception-handling-windows-elf.ll2025-07-15 07:15 1.4K 
[ ]execute-only-empty.ll2025-07-15 07:15 405  
[ ]execute-only-section.ll2025-07-15 07:15 1.0K 
[ ]exp10-libcall-names.ll2025-07-15 07:15 2.1K 
[ ]expand-blr-rvmarker-pseudo.mir2025-07-15 07:15 7.9K 
[ ]expand-load-got-pseudo.mir2025-07-15 07:15 3.6K 
[ ]expand-movi-renamable.mir2025-07-15 07:15 3.6K 
[ ]expand-select.ll2025-07-15 07:15 1.8K 
[ ]expand-subs-pseudo.mir2025-07-15 07:15 765  
[ ]expand-vector-rot.ll2025-07-15 07:15 862  
[ ]ext-narrow-index.ll2025-07-15 07:15 13K 
[ ]extbinopload.ll2025-07-15 07:15 77K 
[ ]extend_inreg_of_concat_subvectors.ll2025-07-15 07:15 5.7K 
[ ]extern-weak.ll2025-07-15 07:15 2.3K 
[ ]extra-callee-save.mir2025-07-15 07:15 784  
[ ]extract-bits.ll2025-07-15 07:15 36K 
[ ]extract-insert.ll2025-07-15 07:15 3.4K 
[ ]extract-lowbits.ll2025-07-15 07:15 23K 
[ ]extract-sext-zext.ll2025-07-15 07:15 12K 
[ ]extract-subvec-combine.ll2025-07-15 07:15 7.9K 
[ ]extract-vector-cmp.ll2025-07-15 07:15 7.2K 
[ ]extract-vector-elt-sve.ll2025-07-15 07:15 7.8K 
[ ]extract-vector-elt.ll2025-07-15 07:15 38K 
[ ]extract.ll2025-07-15 07:15 1.5K 
[ ]extractvector-of-load.mir2025-07-15 07:15 1.7K 
[ ]extractvector-oob-load.mir2025-07-15 07:15 1.0K 
[ ]f16-convert.ll2025-07-15 07:15 7.5K 
[ ]f16-imm.ll2025-07-15 07:15 3.6K 
[ ]f16-instructions.ll2025-07-15 07:15 53K 
[ ]f16-neon-intrinsics.ll2025-07-15 07:15 1.0K 
[ ]fabd-no-neon.ll2025-07-15 07:15 2.1K 
[ ]fabs-combine.ll2025-07-15 07:15 2.5K 
[ ]fabs-fp128.ll2025-07-15 07:15 5.9K 
[ ]fabs.ll2025-07-15 07:15 8.9K 
[ ]fadd-combines.ll2025-07-15 07:15 11K 
[ ]faddp-half.ll2025-07-15 07:15 7.8K 
[ ]faddp.ll2025-07-15 07:15 11K 
[ ]faddsub.ll2025-07-15 07:15 24K 
[ ]falkor-hwpf-fix.ll2025-07-15 07:15 1.9K 
[ ]falkor-hwpf-fix.mir2025-07-15 07:15 8.8K 
[ ]falkor-hwpf.ll2025-07-15 07:15 2.8K 
[ ]fast-isel-address-extends.ll2025-07-15 07:15 1.5K 
[ ]fast-isel-addressing-modes.ll2025-07-15 07:15 20K 
[ ]fast-isel-assume.ll2025-07-15 07:15 343  
[ ]fast-isel-atomic-fallback.ll2025-07-15 07:15 1.8K 
[ ]fast-isel-atomic.ll2025-07-15 07:15 7.0K 
[ ]fast-isel-branch-cond-mask.ll2025-07-15 07:15 498  
[ ]fast-isel-branch-cond-split.ll2025-07-15 07:15 5.3K 
[ ]fast-isel-branch_weights.ll2025-07-15 07:15 656  
[ ]fast-isel-call-return.ll2025-07-15 07:15 344  
[ ]fast-isel-call-struct-return-fallback.ll2025-07-15 07:15 759  
[ ]fast-isel-call-struct-return.ll2025-07-15 07:15 1.5K 
[ ]fast-isel-cbz.ll2025-07-15 07:15 1.4K 
[ ]fast-isel-cmp-branch.ll2025-07-15 07:15 5.5K 
[ ]fast-isel-cmp-vec.ll2025-07-15 07:15 2.4K 
[ ]fast-isel-cmpxchg.ll2025-07-15 07:15 2.7K 
[ ]fast-isel-const-float.ll2025-07-15 07:15 799  
[ ]fast-isel-dbg.ll2025-07-15 07:15 1.1K 
[ ]fast-isel-erase.ll2025-07-15 07:15 616  
[ ]fast-isel-folded-shift.ll2025-07-15 07:15 2.7K 
[ ]fast-isel-folding.ll2025-07-15 07:15 1.1K 
[ ]fast-isel-fpimm.ll2025-07-15 07:15 836  
[ ]fast-isel-gep.ll2025-07-15 07:15 1.7K 
[ ]fast-isel-int-ext.ll2025-07-15 07:15 12K 
[ ]fast-isel-int-ext2.ll2025-07-15 07:15 9.2K 
[ ]fast-isel-int-ext3.ll2025-07-15 07:15 3.3K 
[ ]fast-isel-int-ext4.ll2025-07-15 07:15 421  
[ ]fast-isel-int-ext5.ll2025-07-15 07:15 414  
[ ]fast-isel-intrinsic.ll2025-07-15 07:15 562  
[ ]fast-isel-logic-op.ll2025-07-15 07:15 8.1K 
[ ]fast-isel-memcpy.ll2025-07-15 07:15 656  
[ ]fast-isel-mul.ll2025-07-15 07:15 1.0K 
[ ]fast-isel-runtime-libcall.ll2025-07-15 07:15 3.6K 
[ ]fast-isel-sdiv.ll2025-07-15 07:15 1.8K 
[ ]fast-isel-select.ll2025-07-15 07:15 17K 
[ ]fast-isel-shift.ll2025-07-15 07:15 15K 
[ ]fast-isel-sp-adjust.ll2025-07-15 07:15 14K 
[ ]fast-isel-sqrt.ll2025-07-15 07:15 661  
[ ]fast-isel-switch-phi.ll2025-07-15 07:15 553  
[ ]fast-isel-tail-call.ll2025-07-15 07:15 751  
[ ]fast-isel-tbz.ll2025-07-15 07:15 6.5K 
[ ]fast-isel-trunc.ll2025-07-15 07:15 355  
[ ]fast-isel-vector-arithmetic.ll2025-07-15 07:15 1.9K 
[ ]fast-isel-vret.ll2025-07-15 07:15 317  
[ ]fast-regalloc-empty-bb-with-liveins.mir2025-07-15 07:15 894  
[ ]fastcc-reserved.ll2025-07-15 07:15 1.6K 
[ ]fastcc.ll2025-07-15 07:15 8.0K 
[ ]fastisel-debugvalue-undef.ll2025-07-15 07:15 1.2K 
[ ]fcmp-fp128.ll2025-07-15 07:15 21K 
[ ]fcmp.ll2025-07-15 07:15 70K 
[ ]fcopysign-noneon.ll2025-07-15 07:15 6.0K 
[ ]fcopysign.ll2025-07-15 07:15 10K 
[ ]fcsel-zero.ll2025-07-15 07:15 2.3K 
[ ]fcvt-fixed.ll2025-07-15 07:15 56K 
[ ]fcvt-int.ll2025-07-15 07:15 4.2K 
[ ]fcvt.ll2025-07-15 07:15 73K 
[ ]fcvt_combine.ll2025-07-15 07:15 19K 
[ ]fdiv-combine.ll2025-07-15 07:15 10K 
[ ]fdiv-const.ll2025-07-15 07:15 4.2K 
[ ]fdiv.ll2025-07-15 07:15 12K 
[ ]fence-singlethread.ll2025-07-15 07:15 649  
[ ]fexplog.ll2025-07-15 07:15 271K 
[ ]fix-shuffle-vector-be-rev.ll2025-07-15 07:15 1.7K 
[ ]fixed-point-conv-vec-pat.ll2025-07-15 07:15 7.4K 
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[ ]fjcvtzs.ll2025-07-15 07:15 266  
[ ]fjcvtzs.mir2025-07-15 07:15 383  
[ ]flags-multiuse.ll2025-07-15 07:15 1.8K 
[ ]float-conv-elim.ll2025-07-15 07:15 2.3K 
[ ]floatdp_1source.ll2025-07-15 07:15 4.7K 
[ ]floatdp_2source.ll2025-07-15 07:15 1.6K 
[ ]fmaximum-legalization.ll2025-07-15 07:15 1.5K 
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[ ]fmlal-loreg.ll2025-07-15 07:15 6.1K 
[ ]fmov-imm-licm.ll2025-07-15 07:15 967  
[ ]fmul.ll2025-07-15 07:15 12K 
[ ]fneg.ll2025-07-15 07:15 8.1K 
[ ]fnmul.ll2025-07-15 07:15 1.9K 
[ ]fold-constants.ll2025-07-15 07:15 1.8K 
[ ]fold-csel-cttz-and.ll2025-07-15 07:15 3.9K 
[ ]fold-global-offsets.ll2025-07-15 07:15 3.7K 
[ ]fold-int-pow2-with-fmul-or-fdiv.ll2025-07-15 07:15 23K 
[ ]force-enable-intervals.mir2025-07-15 07:15 3.0K 
[ ]fp-cond-sel.ll2025-07-15 07:15 1.0K 
[ ]fp-const-fold.ll2025-07-15 07:15 4.9K 
[ ]fp-conversion-to-tbl.ll2025-07-15 07:15 33K 
[ ]fp-dp3.ll2025-07-15 07:15 6.2K 
[ ]fp-fcanonicalize.ll2025-07-15 07:15 22K 
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[ ]fp-intrinsics-vector.ll2025-07-15 07:15 44K 
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[ ]fp-maximumnum-minimumnum.ll2025-07-15 07:15 80K 
[ ]fp-veclib-expansion.ll2025-07-15 07:15 4.3K 
[ ]fp8-neon-fdot.ll2025-07-15 07:15 2.9K 
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[ ]fp8-sve-fdot.ll2025-07-15 07:15 1.9K 
[ ]fp8-sve-fmla.ll2025-07-15 07:15 5.3K 
[ ]fp16-fmla.ll2025-07-15 07:15 7.2K 
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[ ]fp16-vector-load-store.ll2025-07-15 07:15 23K 
[ ]fp16-vector-nvcast.ll2025-07-15 07:15 3.0K 
[ ]fp16-vector-shuffle.ll2025-07-15 07:15 13K 
[ ]fp16_fast_math.ll2025-07-15 07:15 11K 
[ ]fp16_intrinsic_lane.ll2025-07-15 07:15 22K 
[ ]fp16_intrinsic_scalar_1op.ll2025-07-15 07:15 11K 
[ ]fp16_intrinsic_scalar_2op.ll2025-07-15 07:15 13K 
[ ]fp16_intrinsic_scalar_3op.ll2025-07-15 07:15 2.4K 
[ ]fp16_intrinsic_vector_1op.ll2025-07-15 07:15 1.2K 
[ ]fp16_intrinsic_vector_2op.ll2025-07-15 07:15 4.2K 
[ ]fp16_intrinsic_vector_3op.ll2025-07-15 07:15 810  
[ ]fp128-folding.ll2025-07-15 07:15 564  
[ ]fpclamptosat.ll2025-07-15 07:15 34K 
[ ]fpclamptosat_vec.ll2025-07-15 07:15 52K 
[ ]fpconv-vector-op-scalarize.ll2025-07-15 07:15 1.2K 
[ ]fpenv.ll2025-07-15 07:15 1.9K 
[ ]fpext.ll2025-07-15 07:15 16K 
[ ]fpimm.ll2025-07-15 07:15 2.1K 
[ ]fpmode.ll2025-07-15 07:15 2.0K 
[ ]fpow.ll2025-07-15 07:15 70K 
[ ]fpowi.ll2025-07-15 07:15 62K 
[ ]fprcvt-cvtf.ll2025-07-15 07:15 14K 
[ ]fptoi.ll2025-07-15 07:15 294K 
[ ]fptosi-sat-scalar.ll2025-07-15 07:15 37K 
[ ]fptosi-sat-vector.ll2025-07-15 07:15 219K 
[ ]fptosi-strictfp.ll2025-07-15 07:15 784  
[ ]fptoui-sat-scalar.ll2025-07-15 07:15 28K 
[ ]fptoui-sat-vector.ll2025-07-15 07:15 175K 
[ ]fptouint-i8-zext.ll2025-07-15 07:15 530  
[ ]fptrunc.ll2025-07-15 07:15 14K 
[ ]frameaddr.ll2025-07-15 07:15 856  
[ ]framelayout-fp-csr.ll2025-07-15 07:15 802  
[ ]framelayout-frame-record.mir2025-07-15 07:15 633  
[ ]framelayout-offset-immediate-change.mir2025-07-15 07:15 522  
[ ]framelayout-scavengingslot-stack-hazard.mir2025-07-15 07:15 3.6K 
[ ]framelayout-scavengingslot.mir2025-07-15 07:15 1.1K 
[ ]framelayout-sve-basepointer.mir2025-07-15 07:15 1.6K 
[ ]framelayout-sve-calleesaves-fix.mir2025-07-15 07:15 2.0K 
[ ]framelayout-sve-fixed-width-access.mir2025-07-15 07:15 1.1K 
[ ]framelayout-sve-scavengingslot.mir2025-07-15 07:15 1.2K 
[ ]framelayout-sve-win.mir2025-07-15 07:15 45K 
[ ]framelayout-sve.mir2025-07-15 07:15 64K 
[ ]framelayout-unaligned-fp.ll2025-07-15 07:15 1.4K 
[ ]free-zext.ll2025-07-15 07:15 2.2K 
[ ]freeze.ll2025-07-15 07:15 10K 
[ ]frem-power2.ll2025-07-15 07:15 21K 
[ ]frem.ll2025-07-15 07:15 69K 
[ ]frexp-arm64ec.ll2025-07-15 07:15 618  
[ ]frintn.ll2025-07-15 07:15 1.4K 
[ ]fsh-combiner-disabled.ll2025-07-15 07:15 3.7K 
[ ]fsh.ll2025-07-15 07:15 155K 
[ ]fsincos.ll2025-07-15 07:15 101K 
[ ]fsqrt.ll2025-07-15 07:15 17K 
[ ]ftrunc.ll2025-07-15 07:15 1.1K 
[ ]func-argpassing.ll2025-07-15 07:15 7.0K 
[ ]func-calls.ll2025-07-15 07:15 5.4K 
[ ]func-sanitizer.ll2025-07-15 07:15 650  
[ ]funclet-local-stack-size.ll2025-07-15 07:15 1.8K 
[ ]funclet-match-add-sub-stack.ll2025-07-15 07:15 2.0K 
[ ]funcptr_cast.ll2025-07-15 07:15 400  
[ ]function-info-noredzone-present.ll2025-07-15 07:15 567  
[ ]function-subtarget-features.ll2025-07-15 07:15 705  
[ ]funnel-shift-rot.ll2025-07-15 07:15 6.4K 
[ ]funnel-shift.ll2025-07-15 07:15 21K 
[ ]fuse-addr-mode.mir2025-07-15 07:15 2.0K 
[ ]gcs-intrinsics.ll2025-07-15 07:15 1.6K 
[ ]gep-nullptr.ll2025-07-15 07:15 895  
[ ]get-active-lane-mask-extract.ll2025-07-15 07:15 15K 
[ ]get_vector_length.ll2025-07-15 07:15 1.3K 
[ ]ghc-cc.ll2025-07-15 07:15 2.8K 
[ ]global-alignment.ll2025-07-15 07:15 2.5K 
[ ]global-merge-1.ll2025-07-15 07:15 1.4K 
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[ ]global-merge-ignore-single-use-minsize.ll2025-07-15 07:15 2.2K 
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[ ]global-merge-minsize.ll2025-07-15 07:15 653  
[ ]global-merge.ll2025-07-15 07:15 1.1K 
[ ]got-abuse.ll2025-07-15 07:15 856  
[ ]gpr_cttz.ll2025-07-15 07:15 4.7K 
[ ]graalcc.ll2025-07-15 07:15 269  
[ ]hadd-combine.ll2025-07-15 07:15 40K 
[ ]half-precision-signof-no-assert.ll2025-07-15 07:15 1.6K 
[ ]half.ll2025-07-15 07:15 3.3K 
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[ ]highextractbitcast.ll2025-07-15 07:15 25K 
[ ]hints.ll2025-07-15 07:15 1.1K 
[ ]hoist-and-by-const-from-lshr-in-eqcmp-zero.ll2025-07-15 07:15 9.6K 
[ ]hoist-and-by-const-from-shl-in-eqcmp-zero.ll2025-07-15 07:15 10K 
[ ]hwasan-check-memaccess-fixedshadow.ll2025-07-15 07:15 5.8K 
[ ]hwasan-check-memaccess.ll2025-07-15 07:15 4.4K 
[ ]hwasan-prefer-fp.ll2025-07-15 07:15 1.7K 
[ ]hwasan-zero-ptr.ll2025-07-15 07:15 2.6K 
[ ]i1-contents.ll2025-07-15 07:15 2.3K 
[ ]i128-align.ll2025-07-15 07:15 668  
[ ]i128-cmp.ll2025-07-15 07:15 8.5K 
[ ]i128-fast-isel-fallback.ll2025-07-15 07:15 422  
[ ]i128-math.ll2025-07-15 07:15 16K 
[ ]i128_volatile_load_store.ll2025-07-15 07:15 4.6K 
[ ]i128_with_overflow.ll2025-07-15 07:15 11K 
[ ]i256-math.ll2025-07-15 07:15 8.7K 
[ ]iabs.ll2025-07-15 07:15 1.9K 
[ ]icmp-cst.ll2025-07-15 07:15 19K 
[ ]icmp-or-load.ll2025-07-15 07:15 7.0K 
[ ]icmp-shift-opt.ll2025-07-15 07:15 4.3K 
[ ]icmp-ult-eq-fold.ll2025-07-15 07:15 4.5K 
[ ]icmp.ll2025-07-15 07:15 63K 
[ ]ifcvt-select.ll2025-07-15 07:15 1.1K 
[ ]ifunc-asm.ll2025-07-15 07:15 2.8K 
[ ]illegal-float-ops.ll2025-07-15 07:15 13K 
[ ]illegal-floating-point-vector-compares.ll2025-07-15 07:15 2.8K 
[ ]ilp32-tlsdesc.ll2025-07-15 07:15 828  
[ ]ilp32-va.ll2025-07-15 07:15 3.8K 
[ ]immcost.ll2025-07-15 07:15 2.2K 
[ ]implicit-def-remat-requires-impdef-check.mir2025-07-15 07:15 4.2K 
[ ]implicit-def-subreg-to-reg-regression.ll2025-07-15 07:15 6.8K 
[ ]implicit-def-with-impdef-greedy-assert.mir2025-07-15 07:15 6.7K 
[ ]implicit-null-check.ll2025-07-15 07:15 11K 
[ ]implicit-sret.ll2025-07-15 07:15 375  
[ ]implicitly-set-zero-high-64-bits.ll2025-07-15 07:15 8.5K 
[ ]inc-of-add.ll2025-07-15 07:15 2.6K 
[ ]init-array.ll2025-07-15 07:15 404  
[ ]init-undef.mir2025-07-15 07:15 1.4K 
[ ]inline-asm-blockaddress.ll2025-07-15 07:15 321  
[ ]inline-asm-clobber-arm64ec.ll2025-07-15 07:15 8.9K 
[ ]inline-asm-clobber-base-frame-pointer.ll2025-07-15 07:15 560  
[ ]inline-asm-clobber.ll2025-07-15 07:15 229  
[ ]inline-asm-constraints-bad-sve.ll2025-07-15 07:15 1.4K 
[ ]inline-asm-constraints-badI.ll2025-07-15 07:15 183  
[ ]inline-asm-constraints-badK.ll2025-07-15 07:15 199  
[ ]inline-asm-constraints-badK2.ll2025-07-15 07:15 211  
[ ]inline-asm-constraints-badL.ll2025-07-15 07:15 199  
[ ]inline-asm-flag-output.ll2025-07-15 07:15 7.7K 
[ ]inline-asm-globaladdress.ll2025-07-15 07:15 632  
[ ]inline-asm-i-constraint-i1.ll2025-07-15 07:15 385  
[ ]inline-asm-multilevel-gep.ll2025-07-15 07:15 373  
[ ]inline-asm-speculation.ll2025-07-15 07:15 1.1K 
[ ]inlineasm-S-constraint.ll2025-07-15 07:15 1.7K 
[ ]inlineasm-Uc-constraint.ll2025-07-15 07:15 2.2K 
[ ]inlineasm-X-allocation.ll2025-07-15 07:15 467  
[ ]inlineasm-X-constraint.ll2025-07-15 07:15 3.6K 
[ ]inlineasm-illegal-type.ll2025-07-15 07:15 1.0K 
[ ]inlineasm-ldr-pseudo.ll2025-07-15 07:15 1.0K 
[ ]inlineasm-output-template.ll2025-07-15 07:15 840  
[ ]insert-extend.ll2025-07-15 07:15 15K 
[ ]insert-subvector-res-legalization.ll2025-07-15 07:15 9.1K 
[ ]insert-subvector.ll2025-07-15 07:15 31K 
[ ]insertextract.ll2025-07-15 07:15 80K 
[ ]insertshuffleload.ll2025-07-15 07:15 15K 
[ ]instr-ref-ldv.ll2025-07-15 07:15 5.3K 
[ ]int-to-fp-no-neon.ll2025-07-15 07:15 11K 
[ ]interleaved-load-combine-pr90695.ll2025-07-15 07:15 819  
[ ]intrinsic-cttz-elts-sve.ll2025-07-15 07:15 22K 
[ ]intrinsic-cttz-elts.ll2025-07-15 07:15 4.2K 
[ ]intrinsic-vector-match-sve2.ll2025-07-15 07:15 22K 
[ ]intrinsics-memory-barrier.ll2025-07-15 07:15 1.6K 
[ ]inttoptr_debug_value.ll2025-07-15 07:15 1.1K 
[ ]irg-nomem.mir2025-07-15 07:15 2.0K 
[ ]irg.ll2025-07-15 07:15 900  
[ ]irg_sp_tagp.ll2025-07-15 07:15 3.6K 
[ ]isinf.ll2025-07-15 07:15 2.4K 
[ ]itofp-bf16.ll2025-07-15 07:15 76K 
[ ]itofp.ll2025-07-15 07:15 309K 
[ ]jti-correct-datatype.mir2025-07-15 07:15 3.0K 
[ ]jump-table-32.ll2025-07-15 07:15 917  
[ ]jump-table-compress.mir2025-07-15 07:15 15K 
[ ]jump-table-duplicate.mir2025-07-15 07:15 6.0K 
[ ]jump-table-exynos.ll2025-07-15 07:15 1.7K 
[ ]jump-table-partition.ll2025-07-15 07:15 7.3K 
[ ]jump-table.ll2025-07-15 07:15 6.2K 
[ ]kcfi-bti.ll2025-07-15 07:15 2.9K 
[ ]kcfi-patchable-function-prefix.ll2025-07-15 07:15 1.2K 
[ ]kcfi.ll2025-07-15 07:15 2.9K 
[ ]known-never-nan.ll2025-07-15 07:15 1.6K 
[ ]lack-of-signed-truncation-check.ll2025-07-15 07:15 11K 
[ ]landingpad-ifcvt.ll2025-07-15 07:15 1.1K 
[ ]large-consts.ll2025-07-15 07:15 641  
[ ]large-offset-ldr-merge.mir2025-07-15 07:15 3.0K 
[ ]large-stack-cmp.ll2025-07-15 07:15 1.3K 
[ ]large-stack.ll2025-07-15 07:15 2.8K 
[ ]large_shift.ll2025-07-15 07:15 372  
[ ]latency.ll2025-07-15 07:15 556  
[ ]ld1postmul.ll2025-07-15 07:15 5.9K 
[ ]ldexp-arm64ec.ll2025-07-15 07:15 652  
[ ]ldexp.ll2025-07-15 07:15 4.7K 
[ ]ldp-stp-control-features.ll2025-07-15 07:15 13K 
[ ]ldp-stp-scaled-unscaled-pairs.ll2025-07-15 07:15 3.7K 
[ ]ldp-stp-unknown-size.mir2025-07-15 07:15 2.2K 
[ ]ldradr.ll2025-07-15 07:15 3.0K 
[ ]ldrpre-ldr-merge.mir2025-07-15 07:15 32K 
[ ]ldst-miflags.mir2025-07-15 07:15 2.3K 
[ ]ldst-nopreidx-sp-redzone.mir2025-07-15 07:15 19K 
[ ]ldst-opt-aa.mir2025-07-15 07:15 1.0K 
[ ]ldst-opt-after-block-placement.ll2025-07-15 07:15 1.4K 
[ ]ldst-opt-mte-with-dbg.mir2025-07-15 07:15 7.7K 
[ ]ldst-opt-mte.mir2025-07-15 07:15 5.7K 
[ ]ldst-opt-non-imm-offset.mir2025-07-15 07:15 768  
[ ]ldst-opt-zr-clobber.mir2025-07-15 07:15 832  
[ ]ldst-opt.ll2025-07-15 07:15 53K 
[ ]ldst-opt.mir2025-07-15 07:15 4.6K 
[ ]ldst-paired-aliasing.ll2025-07-15 07:15 2.3K 
[ ]ldst-regoffset.ll2025-07-15 07:15 14K 
[ ]ldst-unscaledimm.ll2025-07-15 07:15 7.7K 
[ ]ldst-unsignedimm.ll2025-07-15 07:15 9.7K 
[ ]ldst-zero.ll2025-07-15 07:15 2.3K 
[ ]ldst_update_cfpath.mir2025-07-15 07:15 14K 
[ ]legalize-bug-bogus-cpu.ll2025-07-15 07:15 252  
[ ]lit.local.cfg2025-07-15 07:15 71  
[ ]literal_pools_float.ll2025-07-15 07:15 3.3K 
[ ]literal_pools_float_apple.ll2025-07-15 07:15 3.3K 
[ ]live-debugvalues-sve.mir2025-07-15 07:15 9.5K 
[ ]live-interval-analysis.mir2025-07-15 07:15 940  
[ ]llrint-conv-fp16.ll2025-07-15 07:15 2.3K 
[ ]llrint-conv.ll2025-07-15 07:15 2.2K 
[ ]llround-conv-fp16.ll2025-07-15 07:15 1.9K 
[ ]llround-conv.ll2025-07-15 07:15 1.3K 
[ ]llvm-ir-to-intrinsic.ll2025-07-15 07:15 38K 
[ ]llvm-masked-gather-legal-for-sve.ll2025-07-15 07:15 3.3K 
[ ]llvm-masked-scatter-legal-for-sve.ll2025-07-15 07:15 3.0K 
[ ]llvm.exp10.ll2025-07-15 07:15 28K 
[ ]llvm.frexp.ll2025-07-15 07:15 45K 
[ ]llvm.modf.ll2025-07-15 07:15 9.8K 
[ ]llvm.sincos-fmf.ll2025-07-15 07:15 762  
[ ]llvm.sincos.ll2025-07-15 07:15 20K 
[ ]llvm.sincospi.ll2025-07-15 07:15 10K 
[ ]load-combine-big-endian.ll2025-07-15 07:15 19K 
[ ]load-combine.ll2025-07-15 07:15 22K 
[ ]load-insert-undef.ll2025-07-15 07:15 30K 
[ ]load-insert-zero.ll2025-07-15 07:15 39K 
[ ]load-store-forwarding.ll2025-07-15 07:15 1.9K 
[ ]load.ll2025-07-15 07:15 9.9K 
[ ]local-sym-storage-class.ll2025-07-15 07:15 351  
[ ]local_vars.ll2025-07-15 07:15 2.0K 
[ ]logic-reassociate.ll2025-07-15 07:15 3.1K 
[ ]logic-shift.ll2025-07-15 07:15 22K 
[ ]logical-imm.ll2025-07-15 07:15 2.3K 
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[ ]loh-adrp-add-ldr-clobber.mir2025-07-15 07:15 1.4K 
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[ ]loop-micro-op-buffer-size-t99.ll2025-07-15 07:15 4.2K 
[ ]loop-sink-limit.mir2025-07-15 07:15 6.8K 
[ ]loop-sink.mir2025-07-15 07:15 56K 
[ ]lower-ptrmask-arm64_32.ll2025-07-15 07:15 429  
[ ]lower-ptrmask.ll2025-07-15 07:15 440  
[ ]lower-range-metadata-func-call.ll2025-07-15 07:15 2.4K 
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[ ]lr-reserved-for-ra-live-in.ll2025-07-15 07:15 2.3K 
[ ]lrint-conv-fp16-win.ll2025-07-15 07:15 852  
[ ]lrint-conv-fp16.ll2025-07-15 07:15 2.3K 
[ ]lrint-conv-win.ll2025-07-15 07:15 1.3K 
[ ]lrint-conv.ll2025-07-15 07:15 2.2K 
[ ]lround-conv-fp16-win.ll2025-07-15 07:15 766  
[ ]lround-conv-fp16.ll2025-07-15 07:15 1.8K 
[ ]lround-conv-win.ll2025-07-15 07:15 1.0K 
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[ ]ls64-inline-asm.ll2025-07-15 07:15 5.5K 
[ ]ls64-intrinsics.ll2025-07-15 07:15 4.3K 
[ ]lslfast.ll2025-07-15 07:15 3.7K 
[ ]luti-with-sme2.ll2025-07-15 07:15 8.7K 
[ ]machine-combiner-copy.ll2025-07-15 07:15 4.8K 
[ ]machine-combiner-eor.mir2025-07-15 07:15 3.1K 
[ ]machine-combiner-fmul-dup.mir2025-07-15 07:15 22K 
[ ]machine-combiner-instr-fmf.mir2025-07-15 07:15 11K 
[ ]machine-combiner-madd.ll2025-07-15 07:15 1.8K 
[ ]machine-combiner-maddimm.mir2025-07-15 07:15 5.0K 
[ ]machine-combiner-reassociate-accumulators.mir2025-07-15 07:15 8.6K 
[ ]machine-combiner-reassociate-ops-in-different-blocks.mir2025-07-15 07:15 15K 
[ ]machine-combiner-reassociate.mir2025-07-15 07:15 4.7K 
[ ]machine-combiner-subadd.ll2025-07-15 07:15 2.0K 
[ ]machine-combiner-subadd2.mir2025-07-15 07:15 8.7K 
[ ]machine-combiner-transient.ll2025-07-15 07:15 1.3K 
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[ ]machine-combiner.mir2025-07-15 07:15 1.3K 
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[ ]machine-sink-cache-invalidation.ll2025-07-15 07:15 1.9K 
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[ ]machine_cse_illegal_hoist.ll2025-07-15 07:15 1.7K 
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[ ]macro-fusion-addsub-2reg-const1.mir2025-07-15 07:15 1.3K 
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[ ]neon-inline-asm-16-bit-fp.ll2025-07-15 07:15 587  
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[ ]nested-iv-regalloc.mir2025-07-15 07:15 21K 
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[ ]no-fp-asm-clobbers-crash.ll2025-07-15 07:15 454  
[ ]no-promote-scalabale-const-to-global.ll2025-07-15 07:15 588  
[ ]no-quad-ldp-stp.ll2025-07-15 07:15 954  
[ ]no-reorder-cfi-merge-back-load.mir2025-07-15 07:15 3.4K 
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[ ]no-stack-arg-probe.ll2025-07-15 07:15 291  
[ ]no-sve-no-neon.ll2025-07-15 07:15 1.3K 
[ ]no-tail-call-bzero-from-memset.ll2025-07-15 07:15 753  
[ ]no_cfi.ll2025-07-15 07:15 361  
[ ]nofpclass.ll2025-07-15 07:15 6.5K 
[ ]nomerge.ll2025-07-15 07:15 1.5K 
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[ ]note-gnu-property-elf-pauthabi.ll2025-07-15 07:15 1.9K 
[ ]note-gnu-property-gcs.ll2025-07-15 07:15 487  
[ ]note-gnu-property-pac-bti-0.ll2025-07-15 07:15 732  
[ ]note-gnu-property-pac-bti-1.ll2025-07-15 07:15 653  
[ ]note-gnu-property-pac-bti-2.ll2025-07-15 07:15 653  
[ ]note-gnu-property-pac-bti-3.ll2025-07-15 07:15 659  
[ ]note-gnu-property-pac-bti-4.ll2025-07-15 07:15 658  
[ ]null-mctargetstreamer.ll2025-07-15 07:15 126  
[ ]nzcv-save.ll2025-07-15 07:15 1.2K 
[ ]optimize-cond-branch.ll2025-07-15 07:15 1.9K 
[ ]optimize-imm.ll2025-07-15 07:15 2.5K 
[ ]optimize_combine_large_shifts.ll2025-07-15 07:15 1.8K 
[ ]or-combine.ll2025-07-15 07:15 1.1K 
[ ]outlining-with-streaming-mode-changes.ll2025-07-15 07:15 3.4K 
[ ]overeager_mla_fusing.ll2025-07-15 07:15 2.0K 
[ ]overflow.ll2025-07-15 07:15 7.6K 
[ ]overlapping-copy-bundle-cycle.mir2025-07-15 07:15 442  
[ ]overlapping-copy-bundle.mir2025-07-15 07:15 2.0K 
[ ]p2align-zero-fillvalue.ll2025-07-15 07:15 222  
[ ]pacbti-llvm-generated-funcs-1.ll2025-07-15 07:15 1.0K 
[ ]pacbti-llvm-generated-funcs-2.ll2025-07-15 07:15 2.3K 
[ ]pacbti-module-attrs.ll2025-07-15 07:15 1.9K 
[ ]paired-load.ll2025-07-15 07:15 445  
[ ]parity.ll2025-07-15 07:15 6.9K 
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[ ]patchable-function-entry-bti.ll2025-07-15 07:15 3.1K 
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[ ]pauthlr-prologue-duplication.mir2025-07-15 07:15 3.0K 
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[ ]peephole-opt-check-cflags.mir2025-07-15 07:15 1.6K 
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[ ]pmull-ldr-merge.ll2025-07-15 07:15 2.6K 
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[ ]pr72777.ll2025-07-15 07:15 759  
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[ ]pr90936.ll2025-07-15 07:15 1.4K 
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[ ]pr96366.ll2025-07-15 07:15 759  
[ ]pr135776.ll2025-07-15 07:15 562  
[ ]pr135821.ll2025-07-15 07:15 1.0K 
[ ]pre-indexed-addrmode-with-constant-offset.ll2025-07-15 07:15 767  
[ ]predicated-add-sub.ll2025-07-15 07:15 16K 
[ ]preferred-alignment.ll2025-07-15 07:15 713  
[ ]preferred-function-alignment.ll2025-07-15 07:15 2.9K 
[ ]prefixdata.ll2025-07-15 07:15 623  
[ ]preserve.ll2025-07-15 07:15 19K 
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[ ]preserve_nonecc_musttail.ll2025-07-15 07:15 350  
[ ]preserve_nonecc_swift.ll2025-07-15 07:15 550  
[ ]preserve_nonecc_varargs_aapcs.ll2025-07-15 07:15 4.7K 
[ ]preserve_nonecc_varargs_darwin.ll2025-07-15 07:15 2.9K 
[ ]preserve_nonecc_varargs_win64.ll2025-07-15 07:15 2.9K 
[ ]prologue-epilogue-remarks.mir2025-07-15 07:15 1.7K 
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[ ]ptrauth-arm64-tls-dynamics.ll2025-07-15 07:15 4.2K 
[ ]ptrauth-basic-pic.ll2025-07-15 07:15 4.4K 
[ ]ptrauth-bti-call.ll2025-07-15 07:15 4.0K 
[ ]ptrauth-call-rv-marker.ll2025-07-15 07:15 5.8K 
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[ ]ptrauth-constant-in-code.ll2025-07-15 07:15 12K 
[ ]ptrauth-elf-globals-pic.ll2025-07-15 07:15 2.0K 
[ ]ptrauth-elf-got-function-symbols.ll2025-07-15 07:15 1.4K 
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[ ]ptrauth-got-abuse.ll2025-07-15 07:15 3.8K 
[ ]ptrauth-indirectbr.ll2025-07-15 07:15 8.2K 
[ ]ptrauth-init-fini.ll2025-07-15 07:15 4.8K 
[ ]ptrauth-intrinsic-auth-resign-with-blend.ll2025-07-15 07:15 12K 
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[ ]ptrauth-intrinsic-blend.ll2025-07-15 07:15 1.7K 
[ ]ptrauth-intrinsic-sign-generic.ll2025-07-15 07:15 854  
[ ]ptrauth-intrinsic-sign.ll2025-07-15 07:15 2.4K 
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[ ]ptrauth-reloc.ll2025-07-15 07:15 6.3K 
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[ ]ptrauth-ret.ll2025-07-15 07:15 5.7K 
[ ]ptrauth-sign-personality.ll2025-07-15 07:15 3.0K 
[ ]ptrauth-tagged-globals-pic.ll2025-07-15 07:15 4.1K 
[ ]ptrauth-tail-call-regalloc.ll2025-07-15 07:15 4.6K 
[ ]ptrauth-tiny-model-pic.ll2025-07-15 07:15 5.8K 
[ ]ptrauth-tiny-model-static.ll2025-07-15 07:15 5.0K 
[ ]ptrauth-tls-darwin.ll2025-07-15 07:15 911  
[ ]ptrauth-type-info-vptr-discr.ll2025-07-15 07:15 1.2K 
[ ]pull-binop-through-shift.ll2025-07-15 07:15 8.2K 
[ ]pull-conditional-binop-through-shift.ll2025-07-15 07:15 11K 
[ ]pull-negations-after-concat-of-truncates.ll2025-07-15 07:15 3.2K 
[ ]qmovn.ll2025-07-15 07:15 23K 
[ ]qshrn.ll2025-07-15 07:15 13K 
[ ]ragreedy-csr.ll2025-07-15 07:15 22K 
[ ]ragreedy-local-interval-cost.ll2025-07-15 07:15 19K 
[ ]rand.ll2025-07-15 07:15 1.2K 
[ ]rax1.ll2025-07-15 07:15 840  
[ ]rbit.ll2025-07-15 07:15 964  
[ ]rcpc3-sve.ll2025-07-15 07:15 2.2K 
[ ]rcpc3.ll2025-07-15 07:15 11K 
[ ]read-pc.ll2025-07-15 07:15 244  
[ ]readcyclecounter.ll2025-07-15 07:15 329  
[ ]reassocmls.ll2025-07-15 07:15 11K 
[ ]recp-fastmath.ll2025-07-15 07:15 5.0K 
[ ]reduce-and.ll2025-07-15 07:15 18K 
[ ]reduce-or-opt.ll2025-07-15 07:15 6.5K 
[ ]reduce-or.ll2025-07-15 07:15 18K 
[ ]reduce-shuffle.ll2025-07-15 07:15 44K 
[ ]reduce-xor.ll2025-07-15 07:15 17K 
[ ]redundant-copy-elim-empty-mbb.ll2025-07-15 07:15 814  
[ ]redundant-mov-from-zero-extend.ll2025-07-15 07:15 2.1K 
[ ]redundant-orrwrs-from-zero-extend.mir2025-07-15 07:15 1.4K 
[ ]reg-scavenge-frame.mir2025-07-15 07:15 2.3K 
[ ]regalloc-last-chance-recolor-with-split.mir2025-07-15 07:15 41K 
[ ]regalloc-spill-weight-basic.ll2025-07-15 07:15 5.5K 
[ ]regcoal-physreg.mir2025-07-15 07:15 3.7K 
[ ]register-coalesce-update-subranges-remat.mir2025-07-15 07:15 4.5K 
[ ]regress-bitcast-formals.ll2025-07-15 07:15 344  
[ ]regress-combine-extract-vectors.ll2025-07-15 07:15 647  
[ ]regress-f128csel-flags.ll2025-07-15 07:15 934  
[ ]regress-fp128-livein.ll2025-07-15 07:15 525  
[ ]regress-tail-livereg.ll2025-07-15 07:15 933  
[ ]regress-tblgen-chains.ll2025-07-15 07:15 1.6K 
[ ]regress-w29-reserved-with-fp.ll2025-07-15 07:15 1.8K 
[ ]relaxed-fp-atomics.ll2025-07-15 07:15 7.0K 
[ ]reloc-specifiers.mir2025-07-15 07:15 829  
[ ]rem-by-const.ll2025-07-15 07:15 125K 
[ ]rem.ll2025-07-15 07:15 166K 
[ ]rem_crash.ll2025-07-15 07:15 4.4K 
[ ]remat-const-float-simd.ll2025-07-15 07:15 1.2K 
[ ]remat-float0.ll2025-07-15 07:15 690  
[ ]remat.ll2025-07-15 07:15 2.6K 
[ ]replace-load-with-shrink-store-indexed-crash.ll2025-07-15 07:15 1.1K 
[ ]replace-with-veclib-armpl.ll2025-07-15 07:15 37K 
[ ]replace-with-veclib-libmvec-scalable.ll2025-07-15 07:15 30K 
[ ]replace-with-veclib-libmvec.ll2025-07-15 07:15 22K 
[ ]replace-with-veclib-sleef-scalable.ll2025-07-15 07:15 30K 
[ ]replace-with-veclib-sleef.ll2025-07-15 07:15 22K 
[ ]reserveXreg-for-regalloc.ll2025-07-15 07:15 1.7K 
[ ]reserveXreg.ll2025-07-15 07:15 7.3K 
[ ]returnaddr.ll2025-07-15 07:15 561  
[ ]rm_redundant_cmp.ll2025-07-15 07:15 12K 
[ ]rmif-def-nzcv.mir2025-07-15 07:15 361  
[ ]rmif-use-nzcv.mir2025-07-15 07:15 361  
[ ]rotate-extract.ll2025-07-15 07:15 4.1K 
[ ]rotate.ll2025-07-15 07:15 1.1K 
[ ]round-conv.ll2025-07-15 07:15 7.8K 
[ ]round-fptosi-sat-scalar.ll2025-07-15 07:15 13K 
[ ]round-fptoui-sat-scalar.ll2025-07-15 07:15 9.9K 
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[ ]rvmarker-pseudo-expansion-and-outlining.mir2025-07-15 07:15 2.0K 
[ ]sadd_sat.ll2025-07-15 07:15 4.3K 
[ ]sadd_sat_plus.ll2025-07-15 07:15 4.9K 
[ ]sadd_sat_vec.ll2025-07-15 07:15 18K 
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[ ]scalable-vector-promotion.ll2025-07-15 07:15 1.1K 
[ ]scalar-mla-mls.ll2025-07-15 07:15 2.1K 
[ ]scavenge-large-call.ll2025-07-15 07:15 1.4K 
[ ]sched-loop-align.ll2025-07-15 07:15 458  
[ ]sched-movprfx.ll2025-07-15 07:15 1.4K 
[ ]sched-past-vector-ldst.ll2025-07-15 07:15 2.5K 
[ ]sched-postidxalias.mir2025-07-15 07:15 2.5K 
[ ]sched-print-cycle.mir2025-07-15 07:15 1.6K 
[ ]scheduledag-constreg.mir2025-07-15 07:15 1.1K 
[ ]scmp.ll2025-07-15 07:15 10K 
[ ]sdag-no-typesize-warnings-regandsizes.ll2025-07-15 07:15 949  
[ ]sdag-store-merging-bug.ll2025-07-15 07:15 1.0K 
[ ]sdivpow2.ll2025-07-15 07:15 3.4K 
[ ]seh-finally.ll2025-07-15 07:15 8.8K 
[ ]seh_funclet_x1.ll2025-07-15 07:15 4.4K 
[ ]select-constant-xor.ll2025-07-15 07:15 9.3K 
[ ]select-to-and-zext.ll2025-07-15 07:15 3.7K 
[ ]select-with-and-or.ll2025-07-15 07:15 8.7K 
[ ]select_cc.ll2025-07-15 07:15 4.7K 
[ ]select_const.ll2025-07-15 07:15 29K 
[ ]select_fmf.ll2025-07-15 07:15 7.5K 
[ ]selectcc-to-shiftand.ll2025-07-15 07:15 10K 
[ ]selectiondag-order.ll2025-07-15 07:15 3.1K 
[ ]selectopt-cast.ll2025-07-15 07:15 41K 
[ ]selectopt-const.ll2025-07-15 07:15 2.9K 
[ ]selectopt-logical.ll2025-07-15 07:15 7.5K 
[ ]selectopt-not.ll2025-07-15 07:15 44K 
[ ]selectopt.ll2025-07-15 07:15 58K 
[ ]semantic-interposition-asm.ll2025-07-15 07:15 1.7K 
[ ]semantic-interposition-memtag.ll2025-07-15 07:15 1.4K 
[ ]seqpaircopy.mir2025-07-15 07:15 732  
[ ]seqpairspill.mir2025-07-15 07:15 3.4K 
[ ]setcc-fsh.ll2025-07-15 07:15 7.7K 
[ ]setcc-takes-i32.ll2025-07-15 07:15 904  
[ ]setcc-type-mismatch.ll2025-07-15 07:15 740  
[ ]setcc_knownbits.ll2025-07-15 07:15 3.5K 
[ ]setf8-def-nzcv.mir2025-07-15 07:15 356  
[ ]setf8-use-nzcv.mir2025-07-15 07:15 356  
[ ]setf16-def-nzcv.mir2025-07-15 07:15 357  
[ ]setf16-use-nzcv.mir2025-07-15 07:15 357  
[ ]setjmp-bti-no-enforcement.ll2025-07-15 07:15 1.6K 
[ ]setjmp-bti-outliner.ll2025-07-15 07:15 2.6K 
[ ]setjmp-bti.ll2025-07-15 07:15 2.6K 
[ ]settag-merge-nonaligned-fp.ll2025-07-15 07:15 1.0K 
[ ]settag-merge-order.ll2025-07-15 07:15 4.0K 
[ ]settag-merge.ll2025-07-15 07:15 11K 
[ ]settag-merge.mir2025-07-15 07:15 2.7K 
[ ]settag.ll2025-07-15 07:15 6.5K 
[ ]sext.ll2025-07-15 07:15 40K 
[ ]shadow-call-stack.ll2025-07-15 07:15 1.5K 
[ ]shift-accumulate.ll2025-07-15 07:15 6.3K 
[ ]shift-amount-mod.ll2025-07-15 07:15 38K 
[ ]shift-by-signext.ll2025-07-15 07:15 3.6K 
[ ]shift-const-ne-0.ll2025-07-15 07:15 3.0K 
[ ]shift-logic.ll2025-07-15 07:15 8.5K 
[ ]shift-mod.ll2025-07-15 07:15 4.0K 
[ ]shift.ll2025-07-15 07:15 35K 
[ ]shift_minsize.ll2025-07-15 07:15 9.3K 
[ ]shiftregister-from-and.ll2025-07-15 07:15 7.9K 
[ ]shl-to-add.ll2025-07-15 07:15 3.7K 
[ ]shr-exact-demanded-bits.ll2025-07-15 07:15 1.3K 
[ ]shrink-constant-multiple-users.ll2025-07-15 07:15 506  
[ ]shrink-wrap-byval-inalloca-preallocated.ll2025-07-15 07:15 6.5K 
[ ]shrink-wrap.ll2025-07-15 07:15 7.0K 
[ ]shrink-wrapping-vla.ll2025-07-15 07:15 3.5K 
[ ]shrinkwrap-split-restore-point.mir2025-07-15 07:15 27K 
[ ]shuffle-extend.ll2025-07-15 07:15 9.0K 
[ ]shuffle-mask-legal.ll2025-07-15 07:15 736  
[ ]shuffle-select.ll2025-07-15 07:15 5.3K 
[ ]shuffle-tbl34.ll2025-07-15 07:15 37K 
[ ]shuffles.ll2025-07-15 07:15 21K 
[ ]shufflevector.ll2025-07-15 07:15 28K 
[ ]sibling-call.ll2025-07-15 07:15 3.4K 
[ ]sign-return-address-cfi-negate-ra-state.ll2025-07-15 07:15 9.4K 
[ ]sign-return-address-pauth-lr.ll2025-07-15 07:15 19K 
[ ]sign-return-address-tailcall.ll2025-07-15 07:15 6.0K 
[ ]sign-return-address.ll2025-07-15 07:15 33K 
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[ ]simple-macho.ll2025-07-15 07:15 300  
[ ]sincos-expansion.ll2025-07-15 07:15 1.7K 
[ ]sincos-stack-slots.ll2025-07-15 07:15 11K 
[ ]sink-addsub-of-const.ll2025-07-15 07:15 9.7K 
[ ]sink-and-fold-clear-kill-flags.mir2025-07-15 07:15 6.7K 
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[ ]sink-and-fold-illegal-shift.mir2025-07-15 07:15 2.7K 
[ ]sink-and-fold-preserve-debugloc.mir2025-07-15 07:15 7.9K 
[ ]sink-and-fold.ll2025-07-15 07:15 11K 
[ ]sink-copy-for-shrink-wrap.ll2025-07-15 07:15 508  
[ ]sink-mul-exts.ll2025-07-15 07:15 7.2K 
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[ ]sls-crash.ll2025-07-15 07:15 122  
[ ]sls-stackprotector-outliner.ll2025-07-15 07:15 4.2K 
[ ]sme-aarch64-svcount-O3.ll2025-07-15 07:15 1.9K 
[ ]sme-aarch64-svcount.ll2025-07-15 07:15 6.3K 
[ ]sme-agnostic-za.ll2025-07-15 07:15 7.6K 
[ ]sme-avoid-coalescing-locally-streaming.ll2025-07-15 07:15 8.5K 
[ ]sme-call-streaming-compatible-to-normal-fn-wihout-sme-attr.ll2025-07-15 07:15 3.3K 
[ ]sme-callee-save-restore-pairs.ll2025-07-15 07:15 26K 
[ ]sme-darwin-no-sve-vg.ll2025-07-15 07:15 6.9K 
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[ ]sme-disable-gisel-fisel.ll2025-07-15 07:15 25K 
[ ]sme-disable-rematerialize-with-streaming-mode-changes.ll2025-07-15 07:15 2.7K 
[ ]sme-framelower-use-bp.ll2025-07-15 07:15 48K 
[ ]sme-intrinsics-add.ll2025-07-15 07:15 2.0K 
[ ]sme-intrinsics-loads.ll2025-07-15 07:15 23K 
[ ]sme-intrinsics-mopa.ll2025-07-15 07:15 6.7K 
[ ]sme-intrinsics-mops.ll2025-07-15 07:15 6.7K 
[ ]sme-intrinsics-mova-extract.ll2025-07-15 07:15 28K 
[ ]sme-intrinsics-mova-insert.ll2025-07-15 07:15 26K 
[ ]sme-intrinsics-rdsvl.ll2025-07-15 07:15 1.1K 
[ ]sme-intrinsics-state.ll2025-07-15 07:15 674  
[ ]sme-intrinsics-stores.ll2025-07-15 07:15 23K 
[ ]sme-intrinsics-zero.ll2025-07-15 07:15 24K 
[ ]sme-lazy-save-call-remarks.ll2025-07-15 07:15 1.1K 
[ ]sme-lazy-save-call.ll2025-07-15 07:15 6.7K 
[ ]sme-machine-licm-vg.mir2025-07-15 07:15 2.6K 
[ ]sme-must-save-lr-for-vg.ll2025-07-15 07:15 2.0K 
[ ]sme-new-za-function.ll2025-07-15 07:15 2.5K 
[ ]sme-new-zt0-function.ll2025-07-15 07:15 526  
[ ]sme-peephole-opts.ll2025-07-15 07:15 20K 
[ ]sme-pstate-sm-changing-call-disable-coalescing.ll2025-07-15 07:15 72K 
[ ]sme-read-write-tpidr2.ll2025-07-15 07:15 657  
[ ]sme-shared-za-interface.ll2025-07-15 07:15 2.5K 
[ ]sme-streaming-body-streaming-compatible-interface.ll2025-07-15 07:15 6.0K 
[ ]sme-streaming-body.ll2025-07-15 07:15 15K 
[ ]sme-streaming-compatible-interface.ll2025-07-15 07:15 25K 
[ ]sme-streaming-interface-remarks.ll2025-07-15 07:15 3.8K 
[ ]sme-streaming-interface.ll2025-07-15 07:15 21K 
[ ]sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll2025-07-15 07:15 4.1K 
[ ]sme-support-routines-calling-convention.ll2025-07-15 07:15 2.9K 
[ ]sme-toggle-pstateza.ll2025-07-15 07:15 813  
[ ]sme-vg-to-stack.ll2025-07-15 07:15 53K 
[ ]sme-write-fpmr.ll2025-07-15 07:15 737  
[ ]sme-write-vg.ll2025-07-15 07:15 773  
[ ]sme-za-lazy-save-buffer.ll2025-07-15 07:15 4.2K 
[ ]sme-zt0-state.ll2025-07-15 07:15 9.2K 
[ ]sme2-fp8-intrinsics-cvt.ll2025-07-15 07:15 14K 
[ ]sme2-fp8-intrinsics-fmopa.ll2025-07-15 07:15 1.1K 
[ ]sme2-fp8-intrinsics-mla.ll2025-07-15 07:15 16K 
[ ]sme2-intrinsics-add-sub-za16.ll2025-07-15 07:15 8.1K 
[ ]sme2-intrinsics-add.ll2025-07-15 07:15 33K 
[ ]sme2-intrinsics-cvt.ll2025-07-15 07:15 8.9K 
[ ]sme2-intrinsics-cvtl.ll2025-07-15 07:15 631  
[ ]sme2-intrinsics-cvtn.ll2025-07-15 07:15 1.5K 
[ ]sme2-intrinsics-extract-mova.ll2025-07-15 07:15 44K 
[ ]sme2-intrinsics-faminmax.ll2025-07-15 07:15 14K 
[ ]sme2-intrinsics-fclamp.ll2025-07-15 07:15 7.1K 
[ ]sme2-intrinsics-fmlas.ll2025-07-15 07:15 43K 
[ ]sme2-intrinsics-fmlas16.ll2025-07-15 07:15 26K 
[ ]sme2-intrinsics-fp-dots.ll2025-07-15 07:15 21K 
[ ]sme2-intrinsics-fp8-fdot.ll2025-07-15 07:15 8.8K 
[ ]sme2-intrinsics-fp8-fvdot.ll2025-07-15 07:15 2.3K 
[ ]sme2-intrinsics-frint.ll2025-07-15 07:15 7.4K 
[ ]sme2-intrinsics-fscale.ll2025-07-15 07:15 16K 
[ ]sme2-intrinsics-insert-mova.ll2025-07-15 07:15 47K 
[ ]sme2-intrinsics-int-dots.ll2025-07-15 07:15 167K 
[ ]sme2-intrinsics-ld1.ll2025-07-15 07:15 160K 
[ ]sme2-intrinsics-ldnt1.ll2025-07-15 07:15 116K 
[ ]sme2-intrinsics-luti2-lane-x2.ll2025-07-15 07:15 3.3K 
[ ]sme2-intrinsics-luti2-lane-x4.ll2025-07-15 07:15 4.3K 
[ ]sme2-intrinsics-luti2-lane.ll2025-07-15 07:15 2.7K 
[ ]sme2-intrinsics-luti4-lane-x2.ll2025-07-15 07:15 3.3K 
[ ]sme2-intrinsics-luti4-lane-x4.ll2025-07-15 07:15 3.7K 
[ ]sme2-intrinsics-luti4-lane.ll2025-07-15 07:15 2.7K 
[ ]sme2-intrinsics-luti4.ll2025-07-15 07:15 1.0K 
[ ]sme2-intrinsics-max.ll2025-07-15 07:15 77K 
[ ]sme2-intrinsics-min.ll2025-07-15 07:15 77K 
[ ]sme2-intrinsics-mlall.ll2025-07-15 07:15 87K 
[ ]sme2-intrinsics-mlals.ll2025-07-15 07:15 83K 
[ ]sme2-intrinsics-mop.ll2025-07-15 07:15 3.6K 
[ ]sme2-intrinsics-mop4-fp8.ll2025-07-15 07:15 4.3K 
[ ]sme2-intrinsics-mop4a_1x1.ll2025-07-15 07:15 15K 
[ ]sme2-intrinsics-mop4a_1x2.ll2025-07-15 07:15 19K 
[ ]sme2-intrinsics-mop4a_2x1.ll2025-07-15 07:15 18K 
[ ]sme2-intrinsics-mop4a_2x2.ll2025-07-15 07:15 27K 
[ ]sme2-intrinsics-mopa.ll2025-07-15 07:15 1.9K 
[ ]sme2-intrinsics-qcvt.ll2025-07-15 07:15 13K 
[ ]sme2-intrinsics-qcvtn.ll2025-07-15 07:15 4.9K 
[ ]sme2-intrinsics-qrshr.ll2025-07-15 07:15 21K 
[ ]sme2-intrinsics-rshl.ll2025-07-15 07:15 38K 
[ ]sme2-intrinsics-sclamp.ll2025-07-15 07:15 9.0K 
[ ]sme2-intrinsics-select-sme-tileslice.ll2025-07-15 07:15 1.4K 
[ ]sme2-intrinsics-sqdmulh.ll2025-07-15 07:15 20K 
[ ]sme2-intrinsics-sub.ll2025-07-15 07:15 24K 
[ ]sme2-intrinsics-tmop.ll2025-07-15 07:15 8.3K 
[ ]sme2-intrinsics-uclamp.ll2025-07-15 07:15 9.0K 
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[ ]sme2-intrinsics-zero-zt.ll2025-07-15 07:15 494  
[ ]sme2-intrinsics-zt0.ll2025-07-15 07:15 798  
[ ]sme2-multivec-regalloc.mir2025-07-15 07:15 8.3K 
[ ]sme2p1-intrinsics-movaz.ll2025-07-15 07:15 57K 
[ ]sme2p1-intrinsics-zero.ll2025-07-15 07:15 5.4K 
[ ]sms-acceptable-loop1.mir2025-07-15 07:15 2.8K 
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[ ]special-reg.ll2025-07-15 07:15 1.1K 
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[ ]spill-fill-zpr-predicates.mir2025-07-15 07:15 51K 
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[ ]stack-id-pei-alloc.mir2025-07-15 07:15 1.8K 
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[ ]stack-tagging-initializer-merge.ll2025-07-15 07:15 19K 
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[ ]stack-tagging-merge-past-memcpy.mir2025-07-15 07:15 5.6K 
[ ]stack-tagging-musttail.ll2025-07-15 07:15 961  
[ ]stack-tagging-prologue.ll2025-07-15 07:15 3.1K 
[ ]stack-tagging-setjmp.ll2025-07-15 07:15 1.5K 
[ ]stack-tagging-split-lifetime.ll2025-07-15 07:15 4.1K 
[ ]stack-tagging-stack-coloring.ll2025-07-15 07:15 1.2K 
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[ ]stackmap-args.ll2025-07-15 07:15 690  
[ ]stackmap-dynamic-alloca.ll2025-07-15 07:15 746  
[ ]stackmap-frame-setup.ll2025-07-15 07:15 876  
[ ]stackmap-liveness.ll2025-07-15 07:15 2.9K 
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[ ]stgp.ll2025-07-15 07:15 1.9K 
[ ]store-swift-async-context-clobber-live-reg.ll2025-07-15 07:15 17K 
[ ]store.ll2025-07-15 07:15 9.5K 
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[ ]storepairsuppress.ll2025-07-15 07:15 29K 
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[ ]stp-opt-with-renaming-debug.mir2025-07-15 07:15 3.5K 
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[ ]stp-opt-with-renaming-reserved-regs.mir2025-07-15 07:15 3.9K 
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[ ]strict-fp-func.ll2025-07-15 07:15 575  
[ ]strict-fp-int-promote.ll2025-07-15 07:15 2.7K 
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[ ]subs-to-sub-opt.ll2025-07-15 07:15 586  
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[ ]sve-bad-intrinsics.ll2025-07-15 07:15 660  
[ ]sve-bad-select.ll2025-07-15 07:15 490  
[ ]sve-bf16-arith.ll2025-07-15 07:15 26K 
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[ ]sve-bf16-int-converts.ll2025-07-15 07:15 29K 
[ ]sve-bf16-reductions.ll2025-07-15 07:15 9.3K 
[ ]sve-bf16-rounding.ll2025-07-15 07:15 12K 
[ ]sve-bit-counting-pred.ll2025-07-15 07:15 4.3K 
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[ ]sve-bitcast.ll2025-07-15 07:15 86K 
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[ ]sve-callee-save-restore-pairs.ll2025-07-15 07:15 35K 
[ ]sve-calling-convention-byref.ll2025-07-15 07:15 19K 
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[ ]sve-cntp-combine-i64.ll2025-07-15 07:15 10K 
[ ]sve-coalesce-ptrue-intrinsics.ll2025-07-15 07:15 13K 
[ ]sve-copy-zprpair.mir2025-07-15 07:15 3.1K 
[ ]sve-dead-masked-store.ll2025-07-15 07:15 3.3K 
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[ ]sve-extload-icmp.ll2025-07-15 07:15 3.2K 
[ ]sve-extract-element.ll2025-07-15 07:15 19K 
[ ]sve-extract-fixed-from-scalable-vector.ll2025-07-15 07:15 15K 
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[ ]sve-extract-vector-to-predicate-store.ll2025-07-15 07:15 3.5K 
[ ]sve-fadda-select.ll2025-07-15 07:15 3.9K 
[ ]sve-fcmp.ll2025-07-15 07:15 24K 
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[ ]sve-fixed-length-fcopysign.ll2025-07-15 07:15 20K 
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[ ]sve-fixed-length-int-arith.ll2025-07-15 07:15 52K 
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[ ]sve-fixed-length-int-div.ll2025-07-15 07:15 54K 
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[ ]sve-fixed-length-int-minmax.ll2025-07-15 07:15 62K 
[ ]sve-fixed-length-int-mulh.ll2025-07-15 07:15 37K 
[ ]sve-fixed-length-int-reduce.ll2025-07-15 07:15 59K 
[ ]sve-fixed-length-int-rem.ll2025-07-15 07:15 61K 
[ ]sve-fixed-length-int-select.ll2025-07-15 07:15 18K 
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[ ]sve-fixed-length-int-to-fp.ll2025-07-15 07:15 59K 
[ ]sve-fixed-length-int-vselect.ll2025-07-15 07:15 16K 
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[ ]sve-fixed-length-log-reduce.ll2025-07-15 07:15 37K 
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[ ]sve-fixed-length-masked-128bit-stores.ll2025-07-15 07:15 2.5K 
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[ ]sve-fixed-length-splat-vector.ll2025-07-15 07:15 26K 
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[ ]sve-fixed-length-trunc-stores.ll2025-07-15 07:15 7.9K 
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[ ]sve-fp-combine.ll2025-07-15 07:15 55K 
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[ ]sve-fp-int-min-max.ll2025-07-15 07:15 4.0K 
[ ]sve-fp-reciprocal.ll2025-07-15 07:15 5.9K 
[ ]sve-fp-reduce-fadda.ll2025-07-15 07:15 6.4K 
[ ]sve-fp-reduce.ll2025-07-15 07:15 14K 
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[ ]sve-fp.ll2025-07-15 07:15 44K 
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[ ]sve-gather-scatter-addr-opts.ll2025-07-15 07:15 25K 
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[ ]sve-implicit-zero-filling.ll2025-07-15 07:15 12K 
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[ ]sve-insert-vector-to-predicate-load.ll2025-07-15 07:15 5.0K 
[ ]sve-insert-vector.ll2025-07-15 07:15 59K 
[ ]sve-insr.ll2025-07-15 07:15 2.1K 
[ ]sve-int-arith-imm.ll2025-07-15 07:15 22K 
[ ]sve-int-arith-pred.ll2025-07-15 07:15 21K 
[ ]sve-int-arith.ll2025-07-15 07:15 30K 
[ ]sve-int-div-pred.ll2025-07-15 07:15 4.8K 
[ ]sve-int-imm.ll2025-07-15 07:15 15K 
[ ]sve-int-log-imm.ll2025-07-15 07:15 2.8K 
[ ]sve-int-log-pred.ll2025-07-15 07:15 9.4K 
[ ]sve-int-log.ll2025-07-15 07:15 11K 
[ ]sve-int-mad-pred.ll2025-07-15 07:15 11K 
[ ]sve-int-mul-pred.ll2025-07-15 07:15 7.1K 
[ ]sve-int-mulh-pred.ll2025-07-15 07:15 4.4K 
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[ ]sve-int-reduce.ll2025-07-15 07:15 14K 
[ ]sve-intrinsics-adr.ll2025-07-15 07:15 4.1K 
[ ]sve-intrinsics-bfloat.ll2025-07-15 07:15 14K 
[ ]sve-intrinsics-contiguous-prefetches.ll2025-07-15 07:15 9.8K 
[ ]sve-intrinsics-conversion.ll2025-07-15 07:15 7.7K 
[ ]sve-intrinsics-counting-bits.ll2025-07-15 07:15 10K 
[ ]sve-intrinsics-counting-elems-i32.ll2025-07-15 07:15 9.5K 
[ ]sve-intrinsics-counting-elems.ll2025-07-15 07:15 14K 
[ ]sve-intrinsics-dup-x.ll2025-07-15 07:15 6.0K 
[ ]sve-intrinsics-fexpa.ll2025-07-15 07:15 1.1K 
[ ]sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll2025-07-15 07:15 15K 
[ ]sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll2025-07-15 07:15 19K 
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[ ]sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll2025-07-15 07:15 5.5K 
[ ]sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll2025-07-15 07:15 21K 
[ ]sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll2025-07-15 07:15 11K 
[ ]sve-intrinsics-ffr-manipulation.ll2025-07-15 07:15 1.9K 
[ ]sve-intrinsics-fp-arith-imm.ll2025-07-15 07:15 59K 
[ ]sve-intrinsics-fp-arith-merging.ll2025-07-15 07:15 21K 
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[ ]sve-intrinsics-fp-arith.ll2025-07-15 07:15 87K 
[ ]sve-intrinsics-fp-compares.ll2025-07-15 07:15 16K 
[ ]sve-intrinsics-fp-converts.ll2025-07-15 07:15 22K 
[ ]sve-intrinsics-fp-reduce.ll2025-07-15 07:15 9.5K 
[ ]sve-intrinsics-gather-loads-32bit-scaled-offsets.ll2025-07-15 07:15 14K 
[ ]sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll2025-07-15 07:15 19K 
[ ]sve-intrinsics-gather-loads-64bit-scaled-offset.ll2025-07-15 07:15 15K 
[ ]sve-intrinsics-gather-loads-64bit-unscaled-offset.ll2025-07-15 07:15 19K 
[ ]sve-intrinsics-gather-loads-vector-base-imm-offset.ll2025-07-15 07:15 20K 
[ ]sve-intrinsics-gather-loads-vector-base-scalar-offset.ll2025-07-15 07:15 11K 
[ ]sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll2025-07-15 07:15 13K 
[ ]sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll2025-07-15 07:15 5.1K 
[ ]sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll2025-07-15 07:15 18K 
[ ]sve-intrinsics-index.ll2025-07-15 07:15 8.5K 
[ ]sve-intrinsics-int-arith-imm-zero.ll2025-07-15 07:15 7.7K 
[ ]sve-intrinsics-int-arith-imm.ll2025-07-15 07:15 98K 
[ ]sve-intrinsics-int-arith-merging.ll2025-07-15 07:15 23K 
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[ ]sve-intrinsics-int-arith-undef.ll2025-07-15 07:15 58K 
[ ]sve-intrinsics-int-arith.ll2025-07-15 07:15 20K 
[ ]sve-intrinsics-int-binaryComm-merging.mir2025-07-15 07:15 1.9K 
[ ]sve-intrinsics-int-binaryCommWithRev-merging.mir2025-07-15 07:15 2.0K 
[ ]sve-intrinsics-int-compares-with-imm.ll2025-07-15 07:15 54K 
[ ]sve-intrinsics-int-compares.ll2025-07-15 07:15 55K 
[ ]sve-intrinsics-ld1-addressing-mode-reg-imm.ll2025-07-15 07:15 13K 
[ ]sve-intrinsics-ld1-addressing-mode-reg-reg.ll2025-07-15 07:15 9.6K 
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[ ]sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll2025-07-15 07:15 6.6K 
[ ]sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll2025-07-15 07:15 4.1K 
[ ]sve-intrinsics-ld1ro.ll2025-07-15 07:15 3.1K 
[ ]sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll2025-07-15 07:15 30K 
[ ]sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll2025-07-15 07:15 16K 
[ ]sve-intrinsics-ldst-ext.ll2025-07-15 07:15 7.8K 
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[ ]sve-intrinsics-logical-imm.ll2025-07-15 07:15 14K 
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[ ]sve-intrinsics-mask-ldst-ext.ll2025-07-15 07:15 9.6K 
[ ]sve-intrinsics-matmul-fp32.ll2025-07-15 07:15 724  
[ ]sve-intrinsics-matmul-fp64.ll2025-07-15 07:15 737  
[ ]sve-intrinsics-matmul-int8.ll2025-07-15 07:15 5.9K 
[ ]sve-intrinsics-perm-select-matmul-fp64.ll2025-07-15 07:15 25K 
[ ]sve-intrinsics-perm-select.ll2025-07-15 07:15 120K 
[ ]sve-intrinsics-pred-creation.ll2025-07-15 07:15 1.5K 
[ ]sve-intrinsics-pred-operations.ll2025-07-15 07:15 9.3K 
[ ]sve-intrinsics-pred-testing.ll2025-07-15 07:15 1.4K 
[ ]sve-intrinsics-reinterpret-no-streaming.ll2025-07-15 07:15 673  
[ ]sve-intrinsics-reinterpret.ll2025-07-15 07:15 8.9K 
[ ]sve-intrinsics-reversal.ll2025-07-15 07:15 6.4K 
[ ]sve-intrinsics-scalar-to-vec.ll2025-07-15 07:15 6.1K 
[ ]sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll2025-07-15 07:15 11K 
[ ]sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll2025-07-15 07:15 13K 
[ ]sve-intrinsics-scatter-stores-64bit-scaled-offset.ll2025-07-15 07:15 3.1K 
[ ]sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll2025-07-15 07:15 3.6K 
[ ]sve-intrinsics-scatter-stores-vector-base-imm-offset.ll2025-07-15 07:15 14K 
[ ]sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll2025-07-15 07:15 7.6K 
[ ]sve-intrinsics-sel.ll2025-07-15 07:15 5.9K 
[ ]sve-intrinsics-shifts-merging.ll2025-07-15 07:15 19K 
[ ]sve-intrinsics-shifts-undef.ll2025-07-15 07:15 14K 
[ ]sve-intrinsics-shifts.ll2025-07-15 07:15 19K 
[ ]sve-intrinsics-sqdec.ll2025-07-15 07:15 12K 
[ ]sve-intrinsics-sqinc.ll2025-07-15 07:15 12K 
[ ]sve-intrinsics-st1-addressing-mode-reg-imm.ll2025-07-15 07:15 9.8K 
[ ]sve-intrinsics-st1-addressing-mode-reg-reg.ll2025-07-15 07:15 8.2K 
[ ]sve-intrinsics-st1.ll2025-07-15 07:15 7.6K 
[ ]sve-intrinsics-stN-reg-imm-addr-mode.ll2025-07-15 07:15 40K 
[ ]sve-intrinsics-stN-reg-reg-addr-mode.ll2025-07-15 07:15 21K 
[ ]sve-intrinsics-stores.ll2025-07-15 07:15 30K 
[ ]sve-intrinsics-unpred-form.ll2025-07-15 07:15 62K 
[ ]sve-intrinsics-uqdec.ll2025-07-15 07:15 8.7K 
[ ]sve-intrinsics-uqinc.ll2025-07-15 07:15 8.7K 
[ ]sve-intrinsics-while.ll2025-07-15 07:15 19K 
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[ ]sve-ld-post-inc.ll2025-07-15 07:15 3.4K 
[ ]sve-ld1-addressing-mode-reg-imm.ll2025-07-15 07:15 3.5K 
[ ]sve-ld1-addressing-mode-reg-reg.ll2025-07-15 07:15 12K 
[ ]sve-ld1r.ll2025-07-15 07:15 63K 
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[ ]sve-ldN.mir2025-07-15 07:15 14K 
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[ ]sve-llrint.ll2025-07-15 07:15 73K 
[ ]sve-load-compare-store.ll2025-07-15 07:15 1.9K 
[ ]sve-load-store-strict-align.ll2025-07-15 07:15 3.0K 
[ ]sve-localstackalloc.mir2025-07-15 07:15 2.2K 
[ ]sve-lrint.ll2025-07-15 07:15 73K 
[ ]sve-lsr-scaled-index-addressing-mode.ll2025-07-15 07:15 6.2K 
[ ]sve-lsrchain.ll2025-07-15 07:15 14K 
[ ]sve-masked-gather-32b-signed-scaled.ll2025-07-15 07:15 10K 
[ ]sve-masked-gather-32b-signed-unscaled.ll2025-07-15 07:15 14K 
[ ]sve-masked-gather-32b-unsigned-scaled.ll2025-07-15 07:15 11K 
[ ]sve-masked-gather-32b-unsigned-unscaled.ll2025-07-15 07:15 15K 
[ ]sve-masked-gather-64b-scaled.ll2025-07-15 07:15 6.0K 
[ ]sve-masked-gather-64b-unscaled.ll2025-07-15 07:15 7.7K 
[ ]sve-masked-gather-legalize.ll2025-07-15 07:15 13K 
[ ]sve-masked-gather-vec-plus-imm.ll2025-07-15 07:15 9.5K 
[ ]sve-masked-gather-vec-plus-reg.ll2025-07-15 07:15 7.6K 
[ ]sve-masked-gather.ll2025-07-15 07:15 8.3K 
[ ]sve-masked-int-arith.ll2025-07-15 07:15 7.4K 
[ ]sve-masked-ldst-nonext.ll2025-07-15 07:15 16K 
[ ]sve-masked-ldst-sext.ll2025-07-15 07:15 12K 
[ ]sve-masked-ldst-trunc.ll2025-07-15 07:15 2.9K 
[ ]sve-masked-ldst-zext.ll2025-07-15 07:15 12K 
[ ]sve-masked-scatter-32b-scaled.ll2025-07-15 07:15 15K 
[ ]sve-masked-scatter-32b-unscaled.ll2025-07-15 07:15 20K 
[ ]sve-masked-scatter-64b-scaled.ll2025-07-15 07:15 3.8K 
[ ]sve-masked-scatter-64b-unscaled.ll2025-07-15 07:15 6.3K 
[ ]sve-masked-scatter-legalize.ll2025-07-15 07:15 6.0K 
[ ]sve-masked-scatter-vec-plus-imm.ll2025-07-15 07:15 6.5K 
[ ]sve-masked-scatter-vec-plus-reg.ll2025-07-15 07:15 5.2K 
[ ]sve-masked-scatter.ll2025-07-15 07:15 6.0K 
[ ]sve-merging-stores.ll2025-07-15 07:15 1.3K 
[ ]sve-merging-unary.ll2025-07-15 07:15 68K 
[ ]sve-min-max-pred.ll2025-07-15 07:15 11K 
[ ]sve-mov-imm-pred.ll2025-07-15 07:15 3.3K 
[ ]sve-no-typesize-warnings.ll2025-07-15 07:15 731  
[ ]sve-nontemporal-masked-ldst.ll2025-07-15 07:15 3.0K 
[ ]sve-partial-reduce-dot-product.ll2025-07-15 07:15 54K 
[ ]sve-partial-reduce-wide-add.ll2025-07-15 07:15 9.6K 
[ ]sve-pfalse-machine-cse.mir2025-07-15 07:15 1.0K 
[ ]sve-pr62151.ll2025-07-15 07:15 854  
[ ]sve-pr92779.ll2025-07-15 07:15 1.4K 
[ ]sve-pred-arith.ll2025-07-15 07:15 6.0K 
[ ]sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll2025-07-15 07:15 34K 
[ ]sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll2025-07-15 07:15 30K 
[ ]sve-pred-log.ll2025-07-15 07:15 14K 
[ ]sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll2025-07-15 07:15 10K 
[ ]sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll2025-07-15 07:15 7.5K 
[ ]sve-pred-pair-spill-fill.ll2025-07-15 07:15 2.7K 
[ ]sve-pred-selectop.ll2025-07-15 07:15 56K 
[ ]sve-pred-selectop2.ll2025-07-15 07:15 113K 
[ ]sve-pred-selectop3.ll2025-07-15 07:15 70K 
[ ]sve-pseudos-expand-undef.mir2025-07-15 07:15 1.2K 
[ ]sve-ptest-removal-brk.ll2025-07-15 07:15 6.7K 
[ ]sve-ptest-removal-cmpeq.ll2025-07-15 07:15 5.0K 
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[ ]sve-ptest-removal-cmpge.ll2025-07-15 07:15 5.0K 
[ ]sve-ptest-removal-cmpgt.ll2025-07-15 07:15 5.1K 
[ ]sve-ptest-removal-cmphi.ll2025-07-15 07:15 5.0K 
[ ]sve-ptest-removal-cmphs.ll2025-07-15 07:15 5.0K 
[ ]sve-ptest-removal-cmple.ll2025-07-15 07:15 24K 
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[ ]sve-ptest-removal-cmpls.ll2025-07-15 07:15 3.7K 
[ ]sve-ptest-removal-cmplt.ll2025-07-15 07:15 3.7K 
[ ]sve-ptest-removal-cmpne.ll2025-07-15 07:15 5.0K 
[ ]sve-ptest-removal-log.ll2025-07-15 07:15 4.5K 
[ ]sve-ptest-removal-match.ll2025-07-15 07:15 2.8K 
[ ]sve-ptest-removal-pfirst-pnext.ll2025-07-15 07:15 3.2K 
[ ]sve-ptest-removal-ptrue.ll2025-07-15 07:15 658  
[ ]sve-ptest-removal-rdffr.mir2025-07-15 07:15 4.7K 
[ ]sve-ptest-removal-sink.ll2025-07-15 07:15 1.8K 
[ ]sve-ptest-removal-whilege.mir2025-07-15 07:15 18K 
[ ]sve-ptest-removal-whilegt.mir2025-07-15 07:15 19K 
[ ]sve-ptest-removal-whilehi.mir2025-07-15 07:15 18K 
[ ]sve-ptest-removal-whilehs.mir2025-07-15 07:15 18K 
[ ]sve-ptest-removal-whilele.mir2025-07-15 07:15 18K 
[ ]sve-ptest-removal-whilelo.mir2025-07-15 07:15 18K 
[ ]sve-ptest-removal-whilels.mir2025-07-15 07:15 18K 
[ ]sve-ptest-removal-whilelt.mir2025-07-15 07:15 18K 
[ ]sve-ptest-removal-whilerw.mir2025-07-15 07:15 12K 
[ ]sve-ptest-removal-whilewr.mir2025-07-15 07:15 12K 
[ ]sve-ptest.ll2025-07-15 07:15 4.1K 
[ ]sve-punpklo-combine.ll2025-07-15 07:15 13K 
[ ]sve-reassocadd.ll2025-07-15 07:15 9.6K 
[ ]sve-redundant-store.ll2025-07-15 07:15 2.1K 
[ ]sve-rev.ll2025-07-15 07:15 2.9K 
[ ]sve-saba.ll2025-07-15 07:15 4.9K 
[ ]sve-saturating-arith.ll2025-07-15 07:15 7.1K 
[ ]sve-scmp.ll2025-07-15 07:15 6.0K 
[ ]sve-sdiv-pow2.ll2025-07-15 07:15 2.8K 
[ ]sve-select.ll2025-07-15 07:15 28K 
[ ]sve-setcc.ll2025-07-15 07:15 5.8K 
[ ]sve-sext-zext.ll2025-07-15 07:15 14K 
[ ]sve-smulo-sdnode.ll2025-07-15 07:15 22K 
[ ]sve-splat-one-and-ptrue.ll2025-07-15 07:15 2.8K 
[ ]sve-splat-sext.ll2025-07-15 07:15 1.2K 
[ ]sve-split-extract-elt.ll2025-07-15 07:15 7.3K 
[ ]sve-split-fcvt.ll2025-07-15 07:15 13K 
[ ]sve-split-fp-reduce.ll2025-07-15 07:15 3.3K 
[ ]sve-split-insert-elt.ll2025-07-15 07:15 6.9K 
[ ]sve-split-int-pred-reduce.ll2025-07-15 07:15 3.4K 
[ ]sve-split-int-reduce.ll2025-07-15 07:15 6.4K 
[ ]sve-split-load.ll2025-07-15 07:15 5.1K 
[ ]sve-split-store.ll2025-07-15 07:15 4.5K 
[ ]sve-split-trunc.ll2025-07-15 07:15 2.1K 
[ ]sve-srem-combine-loop.ll2025-07-15 07:15 622  
[ ]sve-st1-addressing-mode-reg-imm.ll2025-07-15 07:15 3.9K 
[ ]sve-st1-addressing-mode-reg-reg.ll2025-07-15 07:15 8.9K 
[ ]sve-stN.mir2025-07-15 07:15 14K 
[ ]sve-stack-frame-layout-win.ll2025-07-15 07:15 2.9K 
[ ]sve-stack-frame-layout.ll2025-07-15 07:15 30K 
[ ]sve-stepvector.ll2025-07-15 07:15 14K 
[ ]sve-streaming-mode-cvt-fp-int-fp.ll2025-07-15 07:15 4.8K 
[ ]sve-streaming-mode-cvt-fp-to-int.ll2025-07-15 07:15 6.7K 
[ ]sve-streaming-mode-cvt-int-to-fp.ll2025-07-15 07:15 6.8K 
[ ]sve-streaming-mode-fixed-length-and-combine.ll2025-07-15 07:15 17K 
[ ]sve-streaming-mode-fixed-length-bit-counting.ll2025-07-15 07:15 130K 
[ ]sve-streaming-mode-fixed-length-bitcast.ll2025-07-15 07:15 8.6K 
[ ]sve-streaming-mode-fixed-length-bitselect.ll2025-07-15 07:15 4.6K 
[ ]sve-streaming-mode-fixed-length-build-vector.ll2025-07-15 07:15 18K 
[ ]sve-streaming-mode-fixed-length-concat.ll2025-07-15 07:15 31K 
[ ]sve-streaming-mode-fixed-length-ext-loads.ll2025-07-15 07:15 15K 
[ ]sve-streaming-mode-fixed-length-extract-subvector.ll2025-07-15 07:15 16K 
[ ]sve-streaming-mode-fixed-length-extract-vector-elt.ll2025-07-15 07:15 6.4K 
[ ]sve-streaming-mode-fixed-length-fcopysign.ll2025-07-15 07:15 54K 
[ ]sve-streaming-mode-fixed-length-fp-arith.ll2025-07-15 07:15 141K 
[ ]sve-streaming-mode-fixed-length-fp-compares.ll2025-07-15 07:15 125K 
[ ]sve-streaming-mode-fixed-length-fp-convert.ll2025-07-15 07:15 2.2K 
[ ]sve-streaming-mode-fixed-length-fp-extend-trunc.ll2025-07-15 07:15 39K 
[ ]sve-streaming-mode-fixed-length-fp-fma.ll2025-07-15 07:15 26K 
[ ]sve-streaming-mode-fixed-length-fp-minmax.ll2025-07-15 07:15 73K 
[ ]sve-streaming-mode-fixed-length-fp-reduce-fa64.ll2025-07-15 07:15 2.3K 
[ ]sve-streaming-mode-fixed-length-fp-reduce.ll2025-07-15 07:15 72K 
[ ]sve-streaming-mode-fixed-length-fp-rounding.ll2025-07-15 07:15 111K 
[ ]sve-streaming-mode-fixed-length-fp-select.ll2025-07-15 07:15 18K 
[ ]sve-streaming-mode-fixed-length-fp-to-int.ll2025-07-15 07:15 120K 
[ ]sve-streaming-mode-fixed-length-fp-vselect.ll2025-07-15 07:15 23K 
[ ]sve-streaming-mode-fixed-length-insert-vector-elt.ll2025-07-15 07:15 29K 
[ ]sve-streaming-mode-fixed-length-int-abd.ll2025-07-15 07:15 11K 
[ ]sve-streaming-mode-fixed-length-int-arith.ll2025-07-15 07:15 115K 
[ ]sve-streaming-mode-fixed-length-int-compares.ll2025-07-15 07:15 54K 
[ ]sve-streaming-mode-fixed-length-int-div.ll2025-07-15 07:15 72K 
[ ]sve-streaming-mode-fixed-length-int-extends.ll2025-07-15 07:15 113K 
[ ]sve-streaming-mode-fixed-length-int-immediates.ll2025-07-15 07:15 158K 
[ ]sve-streaming-mode-fixed-length-int-log.ll2025-07-15 07:15 77K 
[ ]sve-streaming-mode-fixed-length-int-minmax.ll2025-07-15 07:15 126K 
[ ]sve-streaming-mode-fixed-length-int-mla-neon-fa64.ll2025-07-15 07:15 3.1K 
[ ]sve-streaming-mode-fixed-length-int-mul.ll2025-07-15 07:15 1.3K 
[ ]sve-streaming-mode-fixed-length-int-mulh.ll2025-07-15 07:15 96K 
[ ]sve-streaming-mode-fixed-length-int-reduce.ll2025-07-15 07:15 89K 
[ ]sve-streaming-mode-fixed-length-int-rem.ll2025-07-15 07:15 81K 
[ ]sve-streaming-mode-fixed-length-int-select.ll2025-07-15 07:15 32K 
[ ]sve-streaming-mode-fixed-length-int-shifts.ll2025-07-15 07:15 86K 
[ ]sve-streaming-mode-fixed-length-int-to-fp.ll2025-07-15 07:15 103K 
[ ]sve-streaming-mode-fixed-length-int-vselect.ll2025-07-15 07:15 43K 
[ ]sve-streaming-mode-fixed-length-ld2-alloca.ll2025-07-15 07:15 8.3K 
[ ]sve-streaming-mode-fixed-length-limit-duplane.ll2025-07-15 07:15 7.3K 
[ ]sve-streaming-mode-fixed-length-loads.ll2025-07-15 07:15 9.4K 
[ ]sve-streaming-mode-fixed-length-log-reduce.ll2025-07-15 07:15 49K 
[ ]sve-streaming-mode-fixed-length-masked-gather-scatter.ll2025-07-15 07:15 6.6K 
[ ]sve-streaming-mode-fixed-length-masked-load.ll2025-07-15 07:15 118K 
[ ]sve-streaming-mode-fixed-length-masked-store.ll2025-07-15 07:15 50K 
[ ]sve-streaming-mode-fixed-length-optimize-ptrue.ll2025-07-15 07:15 46K 
[ ]sve-streaming-mode-fixed-length-permute-rev.ll2025-07-15 07:15 30K 
[ ]sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll2025-07-15 07:15 87K 
[ ]sve-streaming-mode-fixed-length-ptest.ll2025-07-15 07:15 21K 
[ ]sve-streaming-mode-fixed-length-reductions.ll2025-07-15 07:15 5.5K 
[ ]sve-streaming-mode-fixed-length-reshuffle.ll2025-07-15 07:15 1.2K 
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[ ]sve-streaming-mode-fixed-length-sdiv-pow2.ll2025-07-15 07:15 37K 
[ ]sve-streaming-mode-fixed-length-shuffle.ll2025-07-15 07:15 6.2K 
[ ]sve-streaming-mode-fixed-length-splat-vector.ll2025-07-15 07:15 23K 
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[ ]sve-streaming-mode-fixed-length-subvector.ll2025-07-15 07:15 12K 
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[ ]sve-streaming-mode-fixed-length-vector-shuffle.ll2025-07-15 07:15 28K 
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[ ]sve-umulo-sdnode.ll2025-07-15 07:15 20K 
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[ ]sve-uunpklo-load-uzp1-store-combine.ll2025-07-15 07:15 9.6K 
[ ]sve-varargs-callee-broken.ll2025-07-15 07:15 706  
[ ]sve-varargs-caller-broken.ll2025-07-15 07:15 1.0K 
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[ ]sve-vselect-fold.ll2025-07-15 07:15 2.9K 
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[ ]sve-widen-scalable-vectortype.ll2025-07-15 07:15 618  
[ ]sve-zeroinit.ll2025-07-15 07:15 4.2K 
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[ ]sve2-intrinsics-binary-narrowing-add-sub.ll2025-07-15 07:15 14K 
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[ ]sve2-intrinsics-bit-permutation.ll2025-07-15 07:15 5.7K 
[ ]sve2-intrinsics-character-match.ll2025-07-15 07:15 2.7K 
[ ]sve2-intrinsics-combine-rshrnb.ll2025-07-15 07:15 13K 
[ ]sve2-intrinsics-complex-dot.ll2025-07-15 07:15 3.2K 
[ ]sve2-intrinsics-contiguous-conflict-detection.ll2025-07-15 07:15 6.1K 
[ ]sve2-intrinsics-crypto.ll2025-07-15 07:15 2.9K 
[ ]sve2-intrinsics-faminmax.ll2025-07-15 07:15 5.2K 
[ ]sve2-intrinsics-fp-converts.ll2025-07-15 07:15 4.3K 
[ ]sve2-intrinsics-fp-int-binary-logarithm-zeroing.ll2025-07-15 07:15 2.3K 
[ ]sve2-intrinsics-fp-int-binary-logarithm.ll2025-07-15 07:15 2.2K 
[ ]sve2-intrinsics-fp-widening-mul-acc.ll2025-07-15 07:15 6.1K 
[ ]sve2-intrinsics-int-arith-imm.ll2025-07-15 07:15 22K 
[ ]sve2-intrinsics-int-mul-lane.ll2025-07-15 07:15 6.4K 
[ ]sve2-intrinsics-luti.ll2025-07-15 07:15 5.2K 
[ ]sve2-intrinsics-non-widening-pairwise-arith.ll2025-07-15 07:15 23K 
[ ]sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll2025-07-15 07:15 4.9K 
[ ]sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll2025-07-15 07:15 4.6K 
[ ]sve2-intrinsics-nt-gather-loads-64bit-unscaled-offset.ll2025-07-15 07:15 5.4K 
[ ]sve2-intrinsics-nt-gather-loads-vector-base-scalar-offset.ll2025-07-15 07:15 11K 
[ ]sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll2025-07-15 07:15 4.4K 
[ ]sve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll2025-07-15 07:15 3.3K 
[ ]sve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll2025-07-15 07:15 3.7K 
[ ]sve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll2025-07-15 07:15 7.6K 
[ ]sve2-intrinsics-perm-tb.ll2025-07-15 07:15 11K 
[ ]sve2-intrinsics-polynomial-arithmetic-128.ll2025-07-15 07:15 1.2K 
[ ]sve2-intrinsics-polynomial-arithmetic.ll2025-07-15 07:15 7.4K 
[ ]sve2-intrinsics-psel.ll2025-07-15 07:15 3.9K 
[ ]sve2-intrinsics-rax1.ll2025-07-15 07:15 822  
[ ]sve2-intrinsics-reinterpret.ll2025-07-15 07:15 22K 
[ ]sve2-intrinsics-revd.ll2025-07-15 07:15 4.5K 
[ ]sve2-intrinsics-sm4.ll2025-07-15 07:15 1.2K 
[ ]sve2-intrinsics-unary-narrowing.ll2025-07-15 07:15 8.1K 
[ ]sve2-intrinsics-uniform-complex-arith.ll2025-07-15 07:15 14K 
[ ]sve2-intrinsics-uniform-dsp-undef.ll2025-07-15 07:15 5.2K 
[ ]sve2-intrinsics-uniform-dsp-zeroing.ll2025-07-15 07:15 3.1K 
[ ]sve2-intrinsics-uniform-dsp.ll2025-07-15 07:15 133K 
[ ]sve2-intrinsics-vec-hist-count.ll2025-07-15 07:15 2.0K 
[ ]sve2-intrinsics-while-reversed.ll2025-07-15 07:15 27K 
[ ]sve2-intrinsics-while.ll2025-07-15 07:15 13K 
[ ]sve2-intrinsics-widening-complex-int-arith.ll2025-07-15 07:15 4.8K 
[ ]sve2-intrinsics-widening-dsp.ll2025-07-15 07:15 59K 
[ ]sve2-intrinsics-widening-pairwise-arith.ll2025-07-15 07:15 4.1K 
[ ]sve2-min-max-clamp.ll2025-07-15 07:15 8.0K 
[ ]sve2-mla-indexed.ll2025-07-15 07:15 35K 
[ ]sve2-mla-unpredicated.ll2025-07-15 07:15 29K 
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[ ]sve2-sli-sri.ll2025-07-15 07:15 9.3K 
[ ]sve2-sra.ll2025-07-15 07:15 11K 
[ ]sve2-unary-movprfx.ll2025-07-15 07:15 12K 
[ ]sve2-vscale-sinking.ll2025-07-15 07:15 18K 
[ ]sve2-xar.ll2025-07-15 07:15 11K 
[ ]sve2p1-intrinsics-bfadd.ll2025-07-15 07:15 3.2K 
[ ]sve2p1-intrinsics-bfclamp.ll2025-07-15 07:15 2.6K 
[ ]sve2p1-intrinsics-bfmax.ll2025-07-15 07:15 3.7K 
[ ]sve2p1-intrinsics-bfmaxnm.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-bfmin.ll2025-07-15 07:15 3.7K 
[ ]sve2p1-intrinsics-bfminnm.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-bfmla.ll2025-07-15 07:15 2.0K 
[ ]sve2p1-intrinsics-bfmla_lane.ll2025-07-15 07:15 1.6K 
[ ]sve2p1-intrinsics-bfmls.ll2025-07-15 07:15 2.0K 
[ ]sve2p1-intrinsics-bfmls_lane.ll2025-07-15 07:15 1.6K 
[ ]sve2p1-intrinsics-bfmlsl.ll2025-07-15 07:15 2.7K 
[ ]sve2p1-intrinsics-bfmul.ll2025-07-15 07:15 3.2K 
[ ]sve2p1-intrinsics-bfmul_lane.ll2025-07-15 07:15 1.9K 
[ ]sve2p1-intrinsics-bfsub.ll2025-07-15 07:15 3.2K 
[ ]sve2p1-intrinsics-cntp.ll2025-07-15 07:15 2.9K 
[ ]sve2p1-intrinsics-dots.ll2025-07-15 07:15 3.6K 
[ ]sve2p1-intrinsics-dupq.ll2025-07-15 07:15 3.6K 
[ ]sve2p1-intrinsics-extq.ll2025-07-15 07:15 4.2K 
[ ]sve2p1-intrinsics-fclamp.ll2025-07-15 07:15 2.0K 
[ ]sve2p1-intrinsics-fp-reduce.ll2025-07-15 07:15 7.8K 
[ ]sve2p1-intrinsics-gather-loads-128bit-index.ll2025-07-15 07:15 12K 
[ ]sve2p1-intrinsics-gather-loads-128bit-unscaled-offset.ll2025-07-15 07:15 12K 
[ ]sve2p1-intrinsics-int-reduce.ll2025-07-15 07:15 14K 
[ ]sve2p1-intrinsics-ld1-single.ll2025-07-15 07:15 6.1K 
[ ]sve2p1-intrinsics-loads.ll2025-07-15 07:15 71K 
[ ]sve2p1-intrinsics-multivec-loads.ll2025-07-15 07:15 45K 
[ ]sve2p1-intrinsics-multivec-stores.ll2025-07-15 07:15 49K 
[ ]sve2p1-intrinsics-pmov-to-pred.ll2025-07-15 07:15 2.9K 
[ ]sve2p1-intrinsics-pmov-to-vector.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-predicate-as-counter.ll2025-07-15 07:15 8.0K 
[ ]sve2p1-intrinsics-qcvtn.ll2025-07-15 07:15 2.2K 
[ ]sve2p1-intrinsics-qrshr.ll2025-07-15 07:15 2.5K 
[ ]sve2p1-intrinsics-scatter-stores-128bit-index.ll2025-07-15 07:15 12K 
[ ]sve2p1-intrinsics-scatter-stores-128bit-unscaled-offset.ll2025-07-15 07:15 13K 
[ ]sve2p1-intrinsics-sclamp.ll2025-07-15 07:15 2.4K 
[ ]sve2p1-intrinsics-selx2.ll2025-07-15 07:15 11K 
[ ]sve2p1-intrinsics-selx4.ll2025-07-15 07:15 16K 
[ ]sve2p1-intrinsics-st1-single.ll2025-07-15 07:15 5.6K 
[ ]sve2p1-intrinsics-stores.ll2025-07-15 07:15 34K 
[ ]sve2p1-intrinsics-tblq.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-tbxq.ll2025-07-15 07:15 4.4K 
[ ]sve2p1-intrinsics-uclamp.ll2025-07-15 07:15 2.4K 
[ ]sve2p1-intrinsics-unpk.ll2025-07-15 07:15 8.1K 
[ ]sve2p1-intrinsics-uzpq1.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-uzpq2.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-uzpx2.ll2025-07-15 07:15 11K 
[ ]sve2p1-intrinsics-uzpx4.ll2025-07-15 07:15 17K 
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[ ]sve2p1-intrinsics-zipq1.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-zipq2.ll2025-07-15 07:15 3.8K 
[ ]sve2p1-intrinsics-zipx2.ll2025-07-15 07:15 11K 
[ ]sve2p1-intrinsics-zipx4.ll2025-07-15 07:15 17K 
[ ]sve2p1-vector-shuffles.ll2025-07-15 07:15 6.2K 
[ ]sve2p1_copy_pnr.mir2025-07-15 07:15 1.8K 
[ ]sve2p2-intrinsics.ll2025-07-15 07:15 4.5K 
[ ]svtcf-fmul-fdiv-combine.ll2025-07-15 07:15 4.0K 
[ ]swap-compare-operands.ll2025-07-15 07:15 16K 
[ ]swift-async-context-seh.ll2025-07-15 07:15 827  
[ ]swift-async-context-slot-offset-win.ll2025-07-15 07:15 1.3K 
[ ]swift-async-pei.ll2025-07-15 07:15 2.7K 
[ ]swift-async-reg.ll2025-07-15 07:15 435  
[ ]swift-async-unwind.ll2025-07-15 07:15 609  
[ ]swift-async-win.ll2025-07-15 07:15 3.1K 
[ ]swift-async.ll2025-07-15 07:15 4.7K 
[ ]swift-csr-win.ll2025-07-15 07:15 936  
[ ]swift-dynamic-async-frame.ll2025-07-15 07:15 2.2K 
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[ ]swift-error.ll2025-07-15 07:15 430  
[ ]swift-return.ll2025-07-15 07:15 11K 
[ ]swiftcc.ll2025-07-15 07:15 493  
[ ]swifterror.ll2025-07-15 07:15 97K 
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[ ]swifttail-arm64_32.ll2025-07-15 07:15 647  
[ ]swifttail-async.ll2025-07-15 07:15 446  
[ ]swifttail-call.ll2025-07-15 07:15 7.1K 
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[ ]tail-call.ll2025-07-15 07:15 4.7K 
[ ]tail-dup-redundant-phi.mir2025-07-15 07:15 24K 
[ ]tail-duplicate-debug-variance.mir2025-07-15 07:15 3.1K 
[ ]tailcall-bitcast-memcpy.ll2025-07-15 07:15 501  
[ ]tailcall-ccmismatch.ll2025-07-15 07:15 877  
[ ]tailcall-ccmismatch2.ll2025-07-15 07:15 868  
[ ]tailcall-explicit-sret.ll2025-07-15 07:15 3.4K 
[ ]tailcall-fastisel.ll2025-07-15 07:15 192  
[ ]tailcall-implicit-sret.ll2025-07-15 07:15 1.4K 
[ ]tailcall-mem-intrinsics.ll2025-07-15 07:15 1.1K 
[ ]tailcall-ssp-split-debug.ll2025-07-15 07:15 1.7K 
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[ ]tailcall_misched_graph.ll2025-07-15 07:15 2.3K 
[ ]tailcc-notail.ll2025-07-15 07:15 317  
[ ]tailcc-tail-call.ll2025-07-15 07:15 6.9K 
[ ]taildup-addrtaken.mir2025-07-15 07:15 3.7K 
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[ ]taildup-inst-dup-loc.mir2025-07-15 07:15 3.8K 
[ ]taildup-ssa-update-pr62712.mir2025-07-15 07:15 8.1K 
[ ]taildup-subreg-compose.mir2025-07-15 07:15 1.9K 
[ ]tailmerging_in_mbp.ll2025-07-15 07:15 2.5K 
[ ]tbi.ll2025-07-15 07:15 2.6K 
[ ]tbl-loops.ll2025-07-15 07:15 36K 
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[ ]tiny-model-pic.ll2025-07-15 07:15 7.5K 
[ ]tiny-model-static.ll2025-07-15 07:15 6.8K 
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[ ]tme.ll2025-07-15 07:15 1.1K 
[ ]trampoline.ll2025-07-15 07:15 10K 
[ ]trunc-nsw-nuw.ll2025-07-15 07:15 1.8K 
[ ]trunc-to-tbl.ll2025-07-15 07:15 38K 
[ ]trunc-v1i64.ll2025-07-15 07:15 2.8K 
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[ ]uadd_sat.ll2025-07-15 07:15 3.3K 
[ ]uadd_sat_plus.ll2025-07-15 07:15 3.9K 
[ ]uadd_sat_vec.ll2025-07-15 07:15 17K 
[ ]uaddlv-vaddlp-combine.ll2025-07-15 07:15 1.7K 
[ ]uaddo.ll2025-07-15 07:15 1.6K 
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[ ]ucmp.ll2025-07-15 07:15 11K 
[ ]udivmodei5.ll2025-07-15 07:15 920  
[ ]umul_fix.ll2025-07-15 07:15 4.6K 
[ ]umul_fix_sat.ll2025-07-15 07:15 6.4K 
[ ]umulo-128-legalisation-lowering.ll2025-07-15 07:15 3.7K 
[ ]unfold-masked-merge-scalar-constmask-innerouter.ll2025-07-15 07:15 7.5K 
[ ]unfold-masked-merge-scalar-constmask-interleavedbits.ll2025-07-15 07:15 7.9K 
[ ]unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll2025-07-15 07:15 7.7K 
[ ]unfold-masked-merge-scalar-constmask-lowhigh.ll2025-07-15 07:15 7.3K 
[ ]unfold-masked-merge-scalar-variablemask.ll2025-07-15 07:15 18K 
[ ]unfold-masked-merge-vector-variablemask-const.ll2025-07-15 07:15 8.0K 
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[ ]unreachable-emergency-spill-slot.mir2025-07-15 07:15 1.3K 
[ ]unsupported-cc-call.ll2025-07-15 07:15 213  
[ ]unsupported-cc-func.ll2025-07-15 07:15 193  
[ ]unsupported-object-format-err.ll2025-07-15 07:15 330  
[ ]unwind-preserved-from-mir.mir2025-07-15 07:15 7.4K 
[ ]unwind-preserved.ll2025-07-15 07:15 29K 
[ ]urem-lkk.ll2025-07-15 07:15 2.8K 
[ ]urem-seteq-illegal-types.ll2025-07-15 07:15 2.9K 
[ ]urem-seteq-nonzero.ll2025-07-15 07:15 6.7K 
[ ]urem-seteq-optsize.ll2025-07-15 07:15 1.2K 
[ ]urem-seteq-vec-nonsplat.ll2025-07-15 07:15 26K 
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[ ]urem-seteq-vec-splat.ll2025-07-15 07:15 7.5K 
[ ]urem-seteq-vec-tautological.ll2025-07-15 07:15 3.5K 
[ ]urem-seteq.ll2025-07-15 07:15 7.6K 
[ ]urem-vector-lkk.ll2025-07-15 07:15 10K 
[ ]use-cr-result-of-dom-icmp-st.ll2025-07-15 07:15 15K 
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[ ]usub_sat.ll2025-07-15 07:15 3.0K 
[ ]usub_sat_plus.ll2025-07-15 07:15 3.6K 
[ ]usub_sat_vec.ll2025-07-15 07:15 17K 
[ ]v3f-to-int.ll2025-07-15 07:15 515  
[ ]v8.2a-neon-intrinsics-constrained.ll2025-07-15 07:15 12K 
[ ]v8.4-atomic-128.ll2025-07-15 07:15 4.9K 
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[ ]v8.5a-scalar-frint3264-intrinsic.ll2025-07-15 07:15 2.2K 
[ ]vacg.ll2025-07-15 07:15 5.7K 
[ ]vararg-tallcall.ll2025-07-15 07:15 1.9K 
[ ]vararg.ll2025-07-15 07:15 14K 
[ ]varargs-fixed-i16.ll2025-07-15 07:15 1.0K 
[ ]variant-pcs.ll2025-07-15 07:15 1.7K 
[ ]vcvt-oversize.ll2025-07-15 07:15 734  
[ ]vec-combine-compare-to-bitmask.ll2025-07-15 07:15 40K 
[ ]vec-combine-compare-truncate-store.ll2025-07-15 07:15 6.6K 
[ ]vec-extract-branch.ll2025-07-15 07:15 946  
[ ]vec-libcalls.ll2025-07-15 07:15 29K 
[ ]vec3-loads-ext-trunc-stores.ll2025-07-15 07:15 28K 
[ ]vec_uaddo.ll2025-07-15 07:15 11K 
[ ]vec_umulo.ll2025-07-15 07:15 14K 
[ ]veclib-llvm.modf.ll2025-07-15 07:15 6.2K 
[ ]veclib-llvm.sincos.ll2025-07-15 07:15 2.8K 
[ ]veclib-llvm.sincospi.ll2025-07-15 07:15 4.8K 
[ ]vecreduce-add-legalization.ll2025-07-15 07:15 4.8K 
[ ]vecreduce-add.ll2025-07-15 07:15 175K 
[ ]vecreduce-and-legalization.ll2025-07-15 07:15 5.5K 
[ ]vecreduce-bitext.ll2025-07-15 07:15 35K 
[ ]vecreduce-bool.ll2025-07-15 07:15 28K 
[ ]vecreduce-fadd-legalization-strict.ll2025-07-15 07:15 7.7K 
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[ ]vecreduce-fmax-legalization-nan.ll2025-07-15 07:15 21K 
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[ ]vecreduce-fmaximum.ll2025-07-15 07:15 17K 
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[ ]vecreduce-propagate-sd-flags.ll2025-07-15 07:15 1.3K 
[ ]vecreduce-umax-legalization.ll2025-07-15 07:15 10K 
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[ ]vector-gep.ll2025-07-15 07:15 894  
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[ ]vector-insert-shuffle-cycle.ll2025-07-15 07:15 1.0K 
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[ ]vector-op-scalarize-strict.ll2025-07-15 07:15 2.3K 
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[ ]vector_splat-const-shift-of-constmasked.ll2025-07-15 07:15 53K 
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[ ]vscale-and-sve-cnt-demandedbits.ll2025-07-15 07:15 7.2K 
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[ ]wide-scalar-shift-by-byte-multiple-legalization.ll2025-07-15 07:15 12K 
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[ ]win-align-chkstk.ll2025-07-15 07:15 1.5K 
[ ]win-alloca-no-stack-probe.ll2025-07-15 07:15 489  
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[ ]win-import-call-optimization-nocalls.ll2025-07-15 07:15 526  
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[ ]win-loader-replaceable-function.ll2025-07-15 07:15 1.3K 
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[ ]win64_vararg_float.ll2025-07-15 07:15 6.5K 
[ ]win64_vararg_float_cc.ll2025-07-15 07:15 8.0K 
[ ]win64cc-backup-x18.ll2025-07-15 07:15 923  
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[ ]wineh-align-stack.ll2025-07-15 07:15 614  
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[ ]wineh-reuse-catch-alloca.ll2025-07-15 07:15 3.0K 
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[ ]wineh-try-catch-cbz.ll2025-07-15 07:15 1.4K 
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[ ]wineh-try-catch-realign.ll2025-07-15 07:15 2.3K 
[ ]wineh-try-catch-vla.ll2025-07-15 07:15 2.0K 
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[ ]wineh-unwindhelp-via-fp.ll2025-07-15 07:15 1.9K 
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[ ]xray-partial-instrumentation-skip-exit.ll2025-07-15 07:15 958  
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