Index of /~tb-builder/tor-browser-build/git_clones/llvm-project/llvm/lib/Target/AMDGPU

[ICO]NameLast modifiedSizeDescription

[PARENTDIR]Parent Directory  -  
[TXT]AMDGPU.h2025-07-15 07:15 20K 
[   ]AMDGPU.td2025-07-15 07:15 88K 
[TXT]AMDGPUAliasAnalysis.cpp2025-07-15 07:15 4.4K 
[TXT]AMDGPUAliasAnalysis.h2025-07-15 07:15 3.0K 
[TXT]AMDGPUAlwaysInlinePass.cpp2025-07-15 07:15 5.3K 
[TXT]AMDGPUAnnotateUniformValues.cpp2025-07-15 07:15 4.7K 
[TXT]AMDGPUArgumentUsageInfo.cpp2025-07-15 07:15 7.8K 
[TXT]AMDGPUArgumentUsageInfo.h2025-07-15 07:15 5.3K 
[TXT]AMDGPUAsanInstrumentation.cpp2025-07-15 07:15 16K 
[TXT]AMDGPUAsanInstrumentation.h2025-07-15 07:15 2.3K 
[TXT]AMDGPUAsmPrinter.cpp2025-07-15 07:15 70K 
[TXT]AMDGPUAsmPrinter.h2025-07-15 07:15 5.0K 
[TXT]AMDGPUAtomicOptimizer.cpp2025-07-15 07:15 36K 
[   ]AMDGPUAttributes.def2025-07-15 07:15 1.6K 
[TXT]AMDGPUAttributor.cpp2025-07-15 07:15 51K 
[TXT]AMDGPUCallLowering.cpp2025-07-15 07:15 60K 
[TXT]AMDGPUCallLowering.h2025-07-15 07:15 3.7K 
[   ]AMDGPUCallingConv.td2025-07-15 07:15 6.5K 
[TXT]AMDGPUCodeGenPrepare.cpp2025-07-15 07:15 84K 
[   ]AMDGPUCombine.td2025-07-15 07:15 8.9K 
[TXT]AMDGPUCombinerHelper.cpp2025-07-15 07:15 18K 
[TXT]AMDGPUCombinerHelper.h2025-07-15 07:15 1.9K 
[TXT]AMDGPUCtorDtorLowering.cpp2025-07-15 07:15 7.3K 
[TXT]AMDGPUCtorDtorLowering.h2025-07-15 07:15 863  
[TXT]AMDGPUExportClustering.cpp2025-07-15 07:15 4.4K 
[TXT]AMDGPUExportClustering.h2025-07-15 07:15 726  
[TXT]AMDGPUExportKernelRuntimeHandles.cpp2025-07-15 07:15 3.4K 
[TXT]AMDGPUExportKernelRuntimeHandles.h2025-07-15 07:15 861  
[   ]AMDGPUFeatures.td2025-07-15 07:15 2.0K 
[TXT]AMDGPUFrameLowering.cpp2025-07-15 07:15 2.0K 
[TXT]AMDGPUFrameLowering.h2025-07-15 07:15 1.4K 
[   ]AMDGPUGISel.td2025-07-15 07:15 16K 
[   ]AMDGPUGenRegisterBankInfo.def2025-07-15 07:15 8.0K 
[TXT]AMDGPUGlobalISelDivergenceLowering.cpp2025-07-15 07:15 12K 
[TXT]AMDGPUGlobalISelUtils.cpp2025-07-15 07:15 5.8K 
[TXT]AMDGPUGlobalISelUtils.h2025-07-15 07:15 1.8K 
[TXT]AMDGPUHSAMetadataStreamer.cpp2025-07-15 07:15 27K 
[TXT]AMDGPUHSAMetadataStreamer.h2025-07-15 07:15 5.4K 
[TXT]AMDGPUIGroupLP.cpp2025-07-15 07:15 93K 
[TXT]AMDGPUIGroupLP.h2025-07-15 07:15 892  
[TXT]AMDGPUISelDAGToDAG.cpp2025-07-15 07:15 139K 
[TXT]AMDGPUISelDAGToDAG.h2025-07-15 07:15 13K 
[TXT]AMDGPUISelLowering.cpp2025-07-15 07:15 224K 
[TXT]AMDGPUISelLowering.h2025-07-15 07:15 22K 
[TXT]AMDGPUImageIntrinsicOptimizer.cpp2025-07-15 07:15 12K 
[TXT]AMDGPUInsertDelayAlu.cpp2025-07-15 07:15 17K 
[TXT]AMDGPUInstCombineIntrinsic.cpp2025-07-15 07:15 68K 
[TXT]AMDGPUInstrInfo.cpp2025-07-15 07:15 1.7K 
[TXT]AMDGPUInstrInfo.h2025-07-15 07:15 2.3K 
[   ]AMDGPUInstrInfo.td2025-07-15 07:15 19K 
[TXT]AMDGPUInstructionSelector.cpp2025-07-15 07:15 234K 
[TXT]AMDGPUInstructionSelector.h2025-07-15 07:15 17K 
[   ]AMDGPUInstructions.td2025-07-15 07:15 30K 
[TXT]AMDGPULateCodeGenPrepare.cpp2025-07-15 07:15 20K 
[TXT]AMDGPULegalizerInfo.cpp2025-07-15 07:15 275K 
[TXT]AMDGPULegalizerInfo.h2025-07-15 07:15 12K 
[TXT]AMDGPULibCalls.cpp2025-07-15 07:15 56K 
[TXT]AMDGPULibFunc.cpp2025-07-15 07:15 41K 
[TXT]AMDGPULibFunc.h2025-07-15 07:15 12K 
[TXT]AMDGPULowerBufferFatPointers.cpp2025-07-15 07:15 98K 
[TXT]AMDGPULowerKernelArguments.cpp2025-07-15 07:15 9.6K 
[TXT]AMDGPULowerKernelAttributes.cpp2025-07-15 07:15 12K 
[TXT]AMDGPULowerModuleLDSPass.cpp2025-07-15 07:15 63K 
[TXT]AMDGPUMCInstLower.cpp2025-07-15 07:15 15K 
[TXT]AMDGPUMCInstLower.h2025-07-15 07:15 2.4K 
[TXT]AMDGPUMCResourceInfo.cpp2025-07-15 07:15 16K 
[TXT]AMDGPUMCResourceInfo.h2025-07-15 07:15 3.8K 
[TXT]AMDGPUMIRFormatter.cpp2025-07-15 07:15 5.0K 
[TXT]AMDGPUMIRFormatter.h2025-07-15 07:15 2.3K 
[TXT]AMDGPUMachineFunction.cpp2025-07-15 07:15 8.7K 
[TXT]AMDGPUMachineFunction.h2025-07-15 07:15 4.0K 
[TXT]AMDGPUMachineModuleInfo.cpp2025-07-15 07:15 1.3K 
[TXT]AMDGPUMachineModuleInfo.h2025-07-15 07:15 5.4K 
[TXT]AMDGPUMacroFusion.cpp2025-07-15 07:15 2.2K 
[TXT]AMDGPUMacroFusion.h2025-07-15 07:15 860  
[TXT]AMDGPUMarkLastScratchLoad.cpp2025-07-15 07:15 5.2K 
[TXT]AMDGPUMemoryUtils.cpp2025-07-15 07:15 14K 
[TXT]AMDGPUMemoryUtils.h2025-07-15 07:15 2.4K 
[TXT]AMDGPUPTNote.h2025-07-15 07:15 913  
[   ]AMDGPUPassRegistry.def2025-07-15 07:15 7.7K 
[TXT]AMDGPUPerfHintAnalysis.cpp2025-07-15 07:15 15K 
[TXT]AMDGPUPerfHintAnalysis.h2025-07-15 07:15 2.3K 
[TXT]AMDGPUPostLegalizerCombiner.cpp2025-07-15 07:15 18K 
[TXT]AMDGPUPreLegalizerCombiner.cpp2025-07-15 07:15 10K 
[   ]AMDGPUPredicateControl.td2025-07-15 07:15 1.2K 
[TXT]AMDGPUPreloadKernArgProlog.cpp2025-07-15 07:15 7.4K 
[TXT]AMDGPUPreloadKernArgProlog.h2025-07-15 07:15 845  
[TXT]AMDGPUPreloadKernelArguments.cpp2025-07-15 07:15 12K 
[TXT]AMDGPUPrintfRuntimeBinding.cpp2025-07-15 07:15 16K 
[TXT]AMDGPUPromoteAlloca.cpp2025-07-15 07:15 60K 
[TXT]AMDGPUPromoteKernelArguments.cpp2025-07-15 07:15 6.4K 
[TXT]AMDGPURegBankCombiner.cpp2025-07-15 07:15 19K 
[TXT]AMDGPURegBankLegalize.cpp2025-07-15 07:15 13K 
[TXT]AMDGPURegBankLegalizeHelper.cpp2025-07-15 07:15 33K 
[TXT]AMDGPURegBankLegalizeHelper.h2025-07-15 07:15 4.9K 
[TXT]AMDGPURegBankLegalizeRules.cpp2025-07-15 07:15 29K 
[TXT]AMDGPURegBankLegalizeRules.h2025-07-15 07:15 9.5K 
[TXT]AMDGPURegBankSelect.cpp2025-07-15 07:15 10K 
[TXT]AMDGPURegisterBankInfo.cpp2025-07-15 07:15 209K 
[TXT]AMDGPURegisterBankInfo.h2025-07-15 07:15 7.7K 
[   ]AMDGPURegisterBanks.td2025-07-15 07:15 1.1K 
[TXT]AMDGPURemoveIncompatibleFunctions.cpp2025-07-15 07:15 7.4K 
[TXT]AMDGPURemoveIncompatibleFunctions.h2025-07-15 07:15 960  
[TXT]AMDGPUReserveWWMRegs.cpp2025-07-15 07:15 3.4K 
[TXT]AMDGPUReserveWWMRegs.h2025-07-15 07:15 868  
[TXT]AMDGPUResourceUsageAnalysis.cpp2025-07-15 07:15 18K 
[TXT]AMDGPUResourceUsageAnalysis.h2025-07-15 07:15 2.8K 
[TXT]AMDGPURewriteAGPRCopyMFMA.cpp2025-07-15 07:15 11K 
[TXT]AMDGPURewriteOutArguments.cpp2025-07-15 07:15 13K 
[TXT]AMDGPURewriteUndefForPHI.cpp2025-07-15 07:15 6.9K 
[   ]AMDGPUSearchableTables.td2025-07-15 07:15 28K 
[TXT]AMDGPUSelectionDAGInfo.cpp2025-07-15 07:15 704  
[TXT]AMDGPUSelectionDAGInfo.h2025-07-15 07:15 805  
[TXT]AMDGPUSetWavePriority.cpp2025-07-15 07:15 7.7K 
[TXT]AMDGPUSplitModule.cpp2025-07-15 07:15 55K 
[TXT]AMDGPUSplitModule.h2025-07-15 07:15 1.3K 
[TXT]AMDGPUSubtarget.cpp2025-07-15 07:15 17K 
[TXT]AMDGPUSubtarget.h2025-07-15 07:15 13K 
[TXT]AMDGPUSwLowerLDS.cpp2025-07-15 07:15 57K 
[TXT]AMDGPUTargetMachine.cpp2025-07-15 07:15 87K 
[TXT]AMDGPUTargetMachine.h2025-07-15 07:15 7.6K 
[TXT]AMDGPUTargetObjectFile.cpp2025-07-15 07:15 1.5K 
[TXT]AMDGPUTargetObjectFile.h2025-07-15 07:15 1.1K 
[TXT]AMDGPUTargetTransformInfo.cpp2025-07-15 07:15 56K 
[TXT]AMDGPUTargetTransformInfo.h2025-07-15 07:15 12K 
[TXT]AMDGPUUnifyDivergentExitNodes.cpp2025-07-15 07:15 13K 
[TXT]AMDGPUUnifyDivergentExitNodes.h2025-07-15 07:15 1.5K 
[TXT]AMDGPUUnifyMetadata.cpp2025-07-15 07:15 4.1K 
[TXT]AMDGPUWaitSGPRHazards.cpp2025-07-15 07:15 19K 
[TXT]AMDGPUWaitSGPRHazards.h2025-07-15 07:15 831  
[TXT]AMDKernelCodeT.h2025-07-15 07:15 33K 
[DIR]AsmParser/2025-07-15 07:15 -  
[   ]BUFInstructions.td2025-07-15 07:15 152K 
[TXT]CMakeLists.txt2025-07-15 07:15 6.1K 
[   ]CaymanInstructions.td2025-07-15 07:15 7.9K 
[   ]DSDIRInstructions.td2025-07-15 07:15 5.8K 
[   ]DSInstructions.td2025-07-15 07:15 82K 
[DIR]Disassembler/2025-07-15 07:15 -  
[   ]EXPInstructions.td2025-07-15 07:15 6.3K 
[   ]EvergreenInstructions.td2025-07-15 07:15 30K 
[   ]FLATInstructions.td2025-07-15 07:15 149K 
[TXT]GCNCreateVOPD.cpp2025-07-15 07:15 7.5K 
[TXT]GCNDPPCombine.cpp2025-07-15 07:15 28K 
[TXT]GCNDPPCombine.h2025-07-15 07:15 905  
[TXT]GCNHazardRecognizer.cpp2025-07-15 07:15 106K 
[TXT]GCNHazardRecognizer.h2025-07-15 07:15 5.5K 
[TXT]GCNILPSched.cpp2025-07-15 07:15 11K 
[TXT]GCNIterativeScheduler.cpp2025-07-15 07:15 22K 
[TXT]GCNIterativeScheduler.h2025-07-15 07:15 4.1K 
[TXT]GCNMinRegStrategy.cpp2025-07-15 07:15 8.2K 
[TXT]GCNNSAReassign.cpp2025-07-15 07:15 12K 
[TXT]GCNNSAReassign.h2025-07-15 07:15 790  
[TXT]GCNPreRALongBranchReg.cpp2025-07-15 07:15 5.9K 
[TXT]GCNPreRALongBranchReg.h2025-07-15 07:15 829  
[TXT]GCNPreRAOptimizations.cpp2025-07-15 07:15 9.7K 
[TXT]GCNPreRAOptimizations.h2025-07-15 07:15 829  
[   ]GCNProcessors.td2025-07-15 07:15 8.3K 
[TXT]GCNRegPressure.cpp2025-07-15 07:15 34K 
[TXT]GCNRegPressure.h2025-07-15 07:15 20K 
[TXT]GCNRewritePartialRegUses.cpp2025-07-15 07:15 18K 
[TXT]GCNRewritePartialRegUses.h2025-07-15 07:15 844  
[TXT]GCNSchedStrategy.cpp2025-07-15 07:15 82K 
[TXT]GCNSchedStrategy.h2025-07-15 07:15 19K 
[TXT]GCNSubtarget.cpp2025-07-15 07:15 24K 
[TXT]GCNSubtarget.h2025-07-15 07:15 53K 
[TXT]GCNVOPDUtils.cpp2025-07-15 07:15 9.5K 
[TXT]GCNVOPDUtils.h2025-07-15 07:15 1.1K 
[   ]InstCombineTables.td2025-07-15 07:15 264  
[DIR]MCA/2025-07-15 07:15 -  
[DIR]MCTargetDesc/2025-07-15 07:15 -  
[   ]MIMGInstructions.td2025-07-15 07:15 96K 
[TXT]R600.h2025-07-15 07:15 1.7K 
[   ]R600.td2025-07-15 07:15 1.5K 
[TXT]R600AsmPrinter.cpp2025-07-15 07:15 4.4K 
[TXT]R600AsmPrinter.h2025-07-15 07:15 1.6K 
[TXT]R600ClauseMergePass.cpp2025-07-15 07:15 7.0K 
[TXT]R600ControlFlowFinalizer.cpp2025-07-15 07:15 22K 
[TXT]R600Defines.h2025-07-15 07:15 4.2K 
[TXT]R600EmitClauseMarkers.cpp2025-07-15 07:15 11K 
[TXT]R600ExpandSpecialInstrs.cpp2025-07-15 07:15 9.8K 
[TXT]R600FrameLowering.cpp2025-07-15 07:15 1.7K 
[TXT]R600FrameLowering.h2025-07-15 07:15 1.3K 
[TXT]R600ISelDAGToDAG.cpp2025-07-15 07:15 6.6K 
[TXT]R600ISelLowering.cpp2025-07-15 07:15 77K 
[TXT]R600ISelLowering.h2025-07-15 07:15 5.4K 
[   ]R600InstrFormats.td2025-07-15 07:15 12K 
[TXT]R600InstrInfo.cpp2025-07-15 07:15 48K 
[TXT]R600InstrInfo.h2025-07-15 07:15 14K 
[   ]R600InstrInfo.td2025-07-15 07:15 921  
[   ]R600Instructions.td2025-07-15 07:15 55K 
[TXT]R600MCInstLower.cpp2025-07-15 07:15 2.7K 
[TXT]R600MachineCFGStructurizer.cpp2025-07-15 07:15 55K 
[TXT]R600MachineFunctionInfo.cpp2025-07-15 07:15 651  
[TXT]R600MachineFunctionInfo.h2025-07-15 07:15 864  
[TXT]R600MachineScheduler.cpp2025-07-15 07:15 13K 
[TXT]R600MachineScheduler.h2025-07-15 07:15 2.5K 
[TXT]R600OpenCLImageTypeLoweringPass.cpp2025-07-15 07:15 11K 
[TXT]R600OptimizeVectorRegisters.cpp2025-07-15 07:15 12K 
[TXT]R600Packetizer.cpp2025-07-15 07:15 13K 
[   ]R600Processors.td2025-07-15 07:15 4.4K 
[TXT]R600RegisterInfo.cpp2025-07-15 07:15 3.8K 
[TXT]R600RegisterInfo.h2025-07-15 07:15 2.0K 
[   ]R600RegisterInfo.td2025-07-15 07:15 9.8K 
[   ]R600Schedule.td2025-07-15 07:15 1.6K 
[TXT]R600Subtarget.cpp2025-07-15 07:15 1.9K 
[TXT]R600Subtarget.h2025-07-15 07:15 4.7K 
[TXT]R600TargetMachine.cpp2025-07-15 07:15 6.6K 
[TXT]R600TargetMachine.h2025-07-15 07:15 2.9K 
[TXT]R600TargetTransformInfo.cpp2025-07-15 07:15 5.5K 
[TXT]R600TargetTransformInfo.h2025-07-15 07:15 3.1K 
[   ]R700Instructions.td2025-07-15 07:15 783  
[TXT]SIAnnotateControlFlow.cpp2025-07-15 07:15 14K 
[TXT]SIDefines.h2025-07-15 07:15 34K 
[TXT]SIFixSGPRCopies.cpp2025-07-15 07:15 42K 
[TXT]SIFixSGPRCopies.h2025-07-15 07:15 832  
[TXT]SIFixVGPRCopies.cpp2025-07-15 07:15 2.5K 
[TXT]SIFixVGPRCopies.h2025-07-15 07:15 795  
[TXT]SIFoldOperands.cpp2025-07-15 07:15 94K 
[TXT]SIFoldOperands.h2025-07-15 07:15 940  
[TXT]SIFormMemoryClauses.cpp2025-07-15 07:15 14K 
[TXT]SIFormMemoryClauses.h2025-07-15 07:15 815  
[TXT]SIFrameLowering.cpp2025-07-15 07:15 84K 
[TXT]SIFrameLowering.h2025-07-15 07:15 5.0K 
[TXT]SIISelLowering.cpp2025-07-15 07:15 668K 
[TXT]SIISelLowering.h2025-07-15 07:15 30K 
[TXT]SIInsertHardClauses.cpp2025-07-15 07:15 11K 
[TXT]SIInsertWaitcnts.cpp2025-07-15 07:15 109K 
[   ]SIInstrFormats.td2025-07-15 07:15 13K 
[TXT]SIInstrInfo.cpp2025-07-15 07:15 370K 
[TXT]SIInstrInfo.h2025-07-15 07:15 59K 
[   ]SIInstrInfo.td2025-07-15 07:15 131K 
[   ]SIInstructions.td2025-07-15 07:15 148K 
[TXT]SILateBranchLowering.cpp2025-07-15 07:15 11K 
[TXT]SILoadStoreOptimizer.cpp2025-07-15 07:15 91K 
[TXT]SILoadStoreOptimizer.h2025-07-15 07:15 942  
[TXT]SILowerControlFlow.cpp2025-07-15 07:15 28K 
[TXT]SILowerControlFlow.h2025-07-15 07:15 810  
[TXT]SILowerI1Copies.cpp2025-07-15 07:15 30K 
[TXT]SILowerI1Copies.h2025-07-15 07:15 3.5K 
[TXT]SILowerSGPRSpills.cpp2025-07-15 07:15 22K 
[TXT]SILowerSGPRSpills.h2025-07-15 07:15 1.0K 
[TXT]SILowerWWMCopies.cpp2025-07-15 07:15 5.7K 
[TXT]SILowerWWMCopies.h2025-07-15 07:15 800  
[TXT]SIMachineFunctionInfo.cpp2025-07-15 07:15 29K 
[TXT]SIMachineFunctionInfo.h2025-07-15 07:15 39K 
[TXT]SIMachineScheduler.cpp2025-07-15 07:15 67K 
[TXT]SIMachineScheduler.h2025-07-15 07:15 16K 
[TXT]SIMemoryLegalizer.cpp2025-07-15 07:15 104K 
[TXT]SIModeRegister.cpp2025-07-15 07:15 19K 
[TXT]SIModeRegisterDefaults.cpp2025-07-15 07:15 14K 
[TXT]SIModeRegisterDefaults.h2025-07-15 07:15 5.7K 
[TXT]SIOptimizeExecMasking.cpp2025-07-15 07:15 28K 
[TXT]SIOptimizeExecMasking.h2025-07-15 07:15 829  
[TXT]SIOptimizeExecMaskingPreRA.cpp2025-07-15 07:15 17K 
[TXT]SIOptimizeExecMaskingPreRA.h2025-07-15 07:15 854  
[TXT]SIOptimizeVGPRLiveRange.cpp2025-07-15 07:15 26K 
[TXT]SIOptimizeVGPRLiveRange.h2025-07-15 07:15 1.0K 
[TXT]SIPeepholeSDWA.cpp2025-07-15 07:15 50K 
[TXT]SIPeepholeSDWA.h2025-07-15 07:15 792  
[TXT]SIPostRABundler.cpp2025-07-15 07:15 7.3K 
[TXT]SIPostRABundler.h2025-07-15 07:15 795  
[TXT]SIPreAllocateWWMRegs.cpp2025-07-15 07:15 7.8K 
[TXT]SIPreAllocateWWMRegs.h2025-07-15 07:15 826  
[TXT]SIPreEmitPeephole.cpp2025-07-15 07:15 15K 
[TXT]SIProgramInfo.cpp2025-07-15 07:15 7.6K 
[TXT]SIProgramInfo.h2025-07-15 07:15 3.9K 
[TXT]SIRegisterInfo.cpp2025-07-15 07:15 148K 
[TXT]SIRegisterInfo.h2025-07-15 07:15 20K 
[   ]SIRegisterInfo.td2025-07-15 07:15 52K 
[   ]SISchedule.td2025-07-15 07:15 19K 
[TXT]SIShrinkInstructions.cpp2025-07-15 07:15 37K 
[TXT]SIShrinkInstructions.h2025-07-15 07:15 838  
[TXT]SIWholeQuadMode.cpp2025-07-15 07:15 62K 
[TXT]SIWholeQuadMode.h2025-07-15 07:15 910  
[   ]SMInstructions.td2025-07-15 07:15 63K 
[   ]SOPInstructions.td2025-07-15 07:15 120K 
[DIR]TargetInfo/2025-07-15 07:15 -  
[DIR]Utils/2025-07-15 07:15 -  
[   ]VIInstrFormats.td2025-07-15 07:15 653  
[   ]VINTERPInstructions.td2025-07-15 07:15 11K 
[   ]VOP1Instructions.td2025-07-15 07:15 70K 
[   ]VOP2Instructions.td2025-07-15 07:15 118K 
[   ]VOP3Instructions.td2025-07-15 07:15 126K 
[   ]VOP3PInstructions.td2025-07-15 07:15 130K 
[   ]VOPCInstructions.td2025-07-15 07:15 123K 
[   ]VOPDInstructions.td2025-07-15 07:15 13K 
[   ]VOPInstructions.td2025-07-15 07:15 74K 

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